kpriv/linux-hardened
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

[ARM] 4190/2: Add the secondary GIC support for the RealView/EB

Browse source 
MPCore platform

This patch adds the registration of the secondary GIC on the
baseboard, together with the IRQ chaining setup.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Catalin Marinas 2007-02-14 19:18:09 +01:00 committed by Russell King
parent b3a1bde4db
commit 3edf22ab34
3 changed files with 29 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

19
arch/arm/mach-realview/realview_eb.c
View file

@ -57,7 +57,21 @@ static struct map_desc realview_eb_io_desc[] __initdata = {
.pfn = __phys_to_pfn(REALVIEW_GIC_DIST_BASE),
.length = SZ_4K,
.type = MT_DEVICE,
},
#ifdef CONFIG_REALVIEW_MPCORE
{
.virtual = IO_ADDRESS(REALVIEW_GIC1_CPU_BASE),
.pfn = __phys_to_pfn(REALVIEW_GIC1_CPU_BASE),
.length = SZ_4K,
.type = MT_DEVICE,
}, {
.virtual = IO_ADDRESS(REALVIEW_GIC1_DIST_BASE),
.pfn = __phys_to_pfn(REALVIEW_GIC1_DIST_BASE),
.length = SZ_4K,
.type = MT_DEVICE,
},
#endif
{
.virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
.pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
.length = SZ_4K,
@ -145,6 +159,11 @@ static void __init gic_init_irq(void)
#endif
gic_dist_init(0, __io_address(REALVIEW_GIC_DIST_BASE), 29);
gic_cpu_init(0, __io_address(REALVIEW_GIC_CPU_BASE));
#ifdef CONFIG_REALVIEW_MPCORE
gic_dist_init(1, __io_address(REALVIEW_GIC1_DIST_BASE), 64);
gic_cpu_init(1, __io_address(REALVIEW_GIC1_CPU_BASE));
gic_cascade_irq(1, IRQ_EB_IRQ1);
#endif
}
static void __init realview_eb_init(void)

5
include/asm-arm/arch-realview/irqs.h
View file

@ -78,6 +78,9 @@
#define IRQ_PMU_SCU6 (IRQ_GIC_START + INT_PMU_SCU6)
#define IRQ_PMU_SCU7 (IRQ_GIC_START + INT_PMU_SCU7)
#define IRQ_EB_IRQ1 (IRQ_GIC_START + INT_EB_IRQ1)
#define IRQ_EB_IRQ2 (IRQ_GIC_START + INT_EB_IRQ2)
#define IRQMASK_WDOGINT INTMASK_WDOGINT
#define IRQMASK_SOFTINT INTMASK_SOFTINT
#define IRQMASK_COMMRx INTMASK_COMMRx
@ -115,4 +118,4 @@
#define IRQMASK_ETH INTMASK_ETH
#define IRQMASK_USB INTMASK_USB
#define NR_IRQS (IRQ_GIC_START + 64)
#define NR_IRQS (IRQ_GIC_START + 96)

6
include/asm-arm/arch-realview/platform.h
View file

@ -212,6 +212,8 @@
#define REALVIEW_TWD_BASE 0x10100700
#define REALVIEW_TWD_SIZE 0x00000100
#define REALVIEW_GIC_DIST_BASE 0x10101000 /* Generic interrupt controller distributor */
#define REALVIEW_GIC1_CPU_BASE 0x10040000 /* Generic interrupt controller CPU interface */
#define REALVIEW_GIC1_DIST_BASE 0x10041000 /* Generic interrupt controller distributor */
#endif
#define REALVIEW_SMC_BASE 0x10080000 /* SMC */
/* Reserved 0x10090000 - 0x100EFFFF */
@ -306,7 +308,11 @@
#define INT_USB 29 /* USB controller */
#define INT_TSPENINT 30 /* Touchscreen pen */
#define INT_TSKPADINT 31 /* Touchscreen keypad */
#else
#define MAX_GIC_NR 2
#define INT_AACI 0
#define INT_TIMERINT0_1 1
#define INT_TIMERINT2_3 2