ASoC: dwc: Use fifo depth to program FCR
This patch makes Designware I2S driver use the fifo depth value to program the fifo configuration register instead of using hardcoded values. Signed-off-by: Jose Abreu <joabreu@synopsys.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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1 changed files with 7 additions and 2 deletions
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@ -100,6 +100,7 @@ struct dw_i2s_dev {
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struct device *dev;
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u32 ccr;
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u32 xfer_resolution;
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u32 fifo_th;
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/* data related to DMA transfers b/w i2s and DMAC */
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union dw_i2s_snd_dma_data play_dma_data;
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@ -232,14 +233,16 @@ static void dw_i2s_config(struct dw_i2s_dev *dev, int stream)
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if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
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i2s_write_reg(dev->i2s_base, TCR(ch_reg),
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dev->xfer_resolution);
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i2s_write_reg(dev->i2s_base, TFCR(ch_reg), 0x02);
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i2s_write_reg(dev->i2s_base, TFCR(ch_reg),
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dev->fifo_th - 1);
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irq = i2s_read_reg(dev->i2s_base, IMR(ch_reg));
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i2s_write_reg(dev->i2s_base, IMR(ch_reg), irq & ~0x30);
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i2s_write_reg(dev->i2s_base, TER(ch_reg), 1);
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} else {
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i2s_write_reg(dev->i2s_base, RCR(ch_reg),
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dev->xfer_resolution);
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i2s_write_reg(dev->i2s_base, RFCR(ch_reg), 0x07);
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i2s_write_reg(dev->i2s_base, RFCR(ch_reg),
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dev->fifo_th - 1);
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irq = i2s_read_reg(dev->i2s_base, IMR(ch_reg));
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i2s_write_reg(dev->i2s_base, IMR(ch_reg), irq & ~0x03);
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i2s_write_reg(dev->i2s_base, RER(ch_reg), 1);
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@ -499,6 +502,7 @@ static int dw_configure_dai(struct dw_i2s_dev *dev,
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*/
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u32 comp1 = i2s_read_reg(dev->i2s_base, dev->i2s_reg_comp1);
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u32 comp2 = i2s_read_reg(dev->i2s_base, dev->i2s_reg_comp2);
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u32 fifo_depth = 1 << (1 + COMP1_FIFO_DEPTH_GLOBAL(comp1));
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u32 idx;
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if (dev->capability & DWC_I2S_RECORD &&
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@ -537,6 +541,7 @@ static int dw_configure_dai(struct dw_i2s_dev *dev,
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dev->capability |= DW_I2S_SLAVE;
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}
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dev->fifo_th = fifo_depth / 2;
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return 0;
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}
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