x86: Embedd irq_2_iommu into irq_cfg
That interrupt remapping code is x86 specific and tied to the io_apic code. No need for separate allocator functions in the interrupt remapping code. This allows to simplify the code and irq_2_iommu is small (13 bytes on 64bit) so it's not a real problem even if interrupt remapping is runtime disabled. If it's compile time disabled the impact is zero. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu> Acked-by: Suresh Siddha <suresh.b.siddha@intel.com> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
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3 changed files with 11 additions and 7 deletions
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@ -78,6 +78,13 @@ static inline void set_io_apic_irq_attr(struct io_apic_irq_attr *irq_attr,
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irq_attr->polarity = polarity;
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}
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struct irq_2_iommu {
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struct intel_iommu *iommu;
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u16 irte_index;
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u16 sub_handle;
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u8 irte_mask;
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};
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/*
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* This is performance-critical, we want to do it O(1)
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*
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@ -89,6 +96,9 @@ struct irq_cfg {
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cpumask_var_t old_domain;
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u8 vector;
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u8 move_in_progress : 1;
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#ifdef CONFIG_INTR_REMAP
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struct irq_2_iommu irq_2_iommu;
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#endif
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};
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extern struct irq_cfg *irq_cfg(unsigned int);
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@ -46,13 +46,6 @@ static __init int setup_intremap(char *str)
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}
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early_param("intremap", setup_intremap);
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struct irq_2_iommu {
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struct intel_iommu *iommu;
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u16 irte_index;
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u16 sub_handle;
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u8 irte_mask;
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};
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#ifdef CONFIG_GENERIC_HARDIRQS
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static struct irq_2_iommu *irq_2_iommu(unsigned int irq)
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{
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@ -106,6 +106,7 @@ struct irte {
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__u64 high;
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};
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};
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#ifdef CONFIG_INTR_REMAP
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extern int intr_remapping_enabled;
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extern int intr_remapping_supported(void);
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