qla2xxx: Add support for online flash update for ISP27XX.
Signed-off-by: Sawan Chandak <sawan.chandak@qlogic.com> Signed-off-by: Himanshu Madhani <himanshu.madhani@qlogic.com> Reviewed-by: Johannes Thumshirn <jthumshirn@suse.de> Reviewed-by: Hannes Reinecke <hare@suse.de> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
parent
f198cafaa4
commit
4243c115f4
9 changed files with 266 additions and 6 deletions
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@ -562,6 +562,7 @@ qla2x00_sysfs_read_vpd(struct file *filp, struct kobject *kobj,
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struct scsi_qla_host *vha = shost_priv(dev_to_shost(container_of(kobj,
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struct device, kobj)));
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struct qla_hw_data *ha = vha->hw;
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uint32_t faddr;
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if (unlikely(pci_channel_offline(ha->pdev)))
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return -EAGAIN;
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@ -569,9 +570,16 @@ qla2x00_sysfs_read_vpd(struct file *filp, struct kobject *kobj,
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if (!capable(CAP_SYS_ADMIN))
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return -EINVAL;
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if (IS_NOCACHE_VPD_TYPE(ha))
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ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
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if (IS_NOCACHE_VPD_TYPE(ha)) {
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faddr = ha->flt_region_vpd << 2;
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if (IS_QLA27XX(ha) &&
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qla27xx_find_valid_image(vha) == QLA27XX_SECONDARY_IMAGE)
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faddr = ha->flt_region_vpd_sec << 2;
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ha->isp_ops->read_optrom(vha, ha->vpd, faddr,
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ha->vpd_size);
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}
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return memory_read_from_buffer(buf, count, &off, ha->vpd, ha->vpd_size);
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}
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@ -2106,6 +2106,80 @@ qla8044_serdes_op(struct fc_bsg_job *bsg_job)
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return 0;
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}
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static int
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qla27xx_get_flash_upd_cap(struct fc_bsg_job *bsg_job)
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{
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struct Scsi_Host *host = bsg_job->shost;
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scsi_qla_host_t *vha = shost_priv(host);
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struct qla_hw_data *ha = vha->hw;
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struct qla_flash_update_caps cap;
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if (!(IS_QLA27XX(ha)))
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return -EPERM;
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memset(&cap, 0, sizeof(cap));
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cap.capabilities = (uint64_t)ha->fw_attributes_ext[1] << 48 |
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(uint64_t)ha->fw_attributes_ext[0] << 32 |
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(uint64_t)ha->fw_attributes_h << 16 |
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(uint64_t)ha->fw_attributes;
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sg_copy_from_buffer(bsg_job->reply_payload.sg_list,
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bsg_job->reply_payload.sg_cnt, &cap, sizeof(cap));
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bsg_job->reply->reply_payload_rcv_len = sizeof(cap);
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bsg_job->reply->reply_data.vendor_reply.vendor_rsp[0] =
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EXT_STATUS_OK;
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bsg_job->reply_len = sizeof(struct fc_bsg_reply);
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bsg_job->reply->result = DID_OK << 16;
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bsg_job->job_done(bsg_job);
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return 0;
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}
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static int
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qla27xx_set_flash_upd_cap(struct fc_bsg_job *bsg_job)
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{
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struct Scsi_Host *host = bsg_job->shost;
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scsi_qla_host_t *vha = shost_priv(host);
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struct qla_hw_data *ha = vha->hw;
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uint64_t online_fw_attr = 0;
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struct qla_flash_update_caps cap;
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if (!(IS_QLA27XX(ha)))
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return -EPERM;
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memset(&cap, 0, sizeof(cap));
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sg_copy_to_buffer(bsg_job->request_payload.sg_list,
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bsg_job->request_payload.sg_cnt, &cap, sizeof(cap));
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online_fw_attr = (uint64_t)ha->fw_attributes_ext[1] << 48 |
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(uint64_t)ha->fw_attributes_ext[0] << 32 |
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(uint64_t)ha->fw_attributes_h << 16 |
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(uint64_t)ha->fw_attributes;
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if (online_fw_attr != cap.capabilities) {
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bsg_job->reply->reply_data.vendor_reply.vendor_rsp[0] =
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EXT_STATUS_INVALID_PARAM;
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return -EINVAL;
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}
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if (cap.outage_duration < MAX_LOOP_TIMEOUT) {
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bsg_job->reply->reply_data.vendor_reply.vendor_rsp[0] =
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EXT_STATUS_INVALID_PARAM;
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return -EINVAL;
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}
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bsg_job->reply->reply_payload_rcv_len = 0;
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bsg_job->reply->reply_data.vendor_reply.vendor_rsp[0] =
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EXT_STATUS_OK;
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bsg_job->reply_len = sizeof(struct fc_bsg_reply);
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bsg_job->reply->result = DID_OK << 16;
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bsg_job->job_done(bsg_job);
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return 0;
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}
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static int
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qla2x00_process_vendor_specific(struct fc_bsg_job *bsg_job)
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{
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@ -2161,6 +2235,12 @@ qla2x00_process_vendor_specific(struct fc_bsg_job *bsg_job)
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case QL_VND_SERDES_OP_EX:
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return qla8044_serdes_op(bsg_job);
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case QL_VND_GET_FLASH_UPDATE_CAPS:
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return qla27xx_get_flash_upd_cap(bsg_job);
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case QL_VND_SET_FLASH_UPDATE_CAPS:
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return qla27xx_set_flash_upd_cap(bsg_job);
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default:
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return -ENOSYS;
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}
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@ -25,6 +25,8 @@
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#define QL_VND_FX00_MGMT_CMD 0x12
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#define QL_VND_SERDES_OP 0x13
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#define QL_VND_SERDES_OP_EX 0x14
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#define QL_VND_GET_FLASH_UPDATE_CAPS 0x15
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#define QL_VND_SET_FLASH_UPDATE_CAPS 0x16
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/* BSG Vendor specific subcode returns */
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#define EXT_STATUS_OK 0
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@ -232,4 +234,9 @@ struct qla_serdes_reg_ex {
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uint32_t val;
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} __packed;
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struct qla_flash_update_caps {
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uint64_t capabilities;
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uint32_t outage_duration;
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uint8_t reserved[20];
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} __packed;
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#endif
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@ -11,7 +11,7 @@
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* ----------------------------------------------------------------------
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* | Level | Last Value Used | Holes |
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* ----------------------------------------------------------------------
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* | Module Init and Probe | 0x017f | 0x0146 |
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* | Module Init and Probe | 0x018f | 0x0146 |
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* | | | 0x015b-0x0160 |
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* | | | 0x016e-0x0170 |
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* | Mailbox commands | 0x1192 | |
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@ -1060,6 +1060,12 @@ struct mbx_cmd_32 {
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#define FSTATE_FATAL_ERROR 4
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#define FSTATE_LOOP_BACK_CONN 5
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#define QLA27XX_IMG_STATUS_VER_MAJOR 0x01
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#define QLA27XX_IMG_STATUS_VER_MINOR 0x00
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#define QLA27XX_IMG_STATUS_SIGN 0xFACEFADE
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#define QLA27XX_PRIMARY_IMAGE 1
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#define QLA27XX_SECONDARY_IMAGE 2
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/*
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* Port Database structure definition
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* Little endian except where noted.
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@ -3433,14 +3439,20 @@ struct qla_hw_data {
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uint32_t flt_region_flt;
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uint32_t flt_region_fdt;
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uint32_t flt_region_boot;
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uint32_t flt_region_boot_sec;
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uint32_t flt_region_fw;
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uint32_t flt_region_fw_sec;
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uint32_t flt_region_vpd_nvram;
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uint32_t flt_region_vpd;
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uint32_t flt_region_vpd_sec;
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uint32_t flt_region_nvram;
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uint32_t flt_region_npiv_conf;
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uint32_t flt_region_gold_fw;
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uint32_t flt_region_fcp_prio;
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uint32_t flt_region_bootload;
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uint32_t flt_region_img_status_pri;
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uint32_t flt_region_img_status_sec;
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uint8_t active_image;
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/* Needed for BEACON */
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uint16_t beacon_blink_led;
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@ -3705,6 +3717,16 @@ typedef struct scsi_qla_host {
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struct qla_tgt_counters tgt_counters;
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} scsi_qla_host_t;
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struct qla27xx_image_status {
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uint8_t image_status_mask;
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uint16_t generation_number;
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uint8_t reserved[3];
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uint8_t ver_minor;
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uint8_t ver_major;
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uint32_t checksum;
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uint32_t signature;
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} __packed;
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#define SET_VP_IDX 1
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#define SET_AL_PA 2
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#define RESET_VP_IDX 3
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@ -1393,6 +1393,16 @@ struct qla_flt_header {
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#define FLT_REG_FCOE_NVRAM_0 0xAA
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#define FLT_REG_FCOE_NVRAM_1 0xAC
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/* 27xx */
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#define FLT_REG_IMG_PRI_27XX 0x95
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#define FLT_REG_IMG_SEC_27XX 0x96
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#define FLT_REG_FW_SEC_27XX 0x02
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#define FLT_REG_BOOTLOAD_SEC_27XX 0x9
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#define FLT_REG_VPD_SEC_27XX_0 0x50
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#define FLT_REG_VPD_SEC_27XX_1 0x52
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#define FLT_REG_VPD_SEC_27XX_2 0xD8
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#define FLT_REG_VPD_SEC_27XX_3 0xDA
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struct qla_flt_region {
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uint32_t code;
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uint32_t size;
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@ -90,6 +90,7 @@ extern int qla2xxx_mctp_dump(scsi_qla_host_t *);
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extern int
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qla2x00_alloc_outstanding_cmds(struct qla_hw_data *, struct req_que *);
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extern int qla2x00_init_rings(scsi_qla_host_t *);
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extern uint8_t qla27xx_find_valid_image(struct scsi_qla_host *);
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/*
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* Global Data in qla_os.c source file.
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@ -5348,6 +5348,93 @@ qla24xx_nvram_config(scsi_qla_host_t *vha)
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return (rval);
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}
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uint8_t qla27xx_find_valid_image(struct scsi_qla_host *vha)
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{
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struct qla27xx_image_status pri_image_status, sec_image_status;
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uint8_t valid_pri_image, valid_sec_image;
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uint32_t *wptr;
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uint32_t cnt, chksum, size;
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struct qla_hw_data *ha = vha->hw;
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valid_pri_image = valid_sec_image = 1;
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ha->active_image = 0;
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size = sizeof(struct qla27xx_image_status) / sizeof(uint32_t);
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if (!ha->flt_region_img_status_pri) {
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valid_pri_image = 0;
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goto check_sec_image;
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}
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qla24xx_read_flash_data(vha, (uint32_t *)(&pri_image_status),
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ha->flt_region_img_status_pri, size);
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if (pri_image_status.signature != QLA27XX_IMG_STATUS_SIGN) {
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ql_dbg(ql_dbg_init, vha, 0x018b,
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"Primary image signature (0x%x) not valid\n",
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pri_image_status.signature);
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valid_pri_image = 0;
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goto check_sec_image;
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}
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wptr = (uint32_t *)(&pri_image_status);
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cnt = size;
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for (chksum = 0; cnt; cnt--)
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chksum += le32_to_cpu(*wptr++);
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if (chksum) {
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ql_dbg(ql_dbg_init, vha, 0x018c,
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"Checksum validation failed for primary image (0x%x)\n",
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chksum);
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valid_pri_image = 0;
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}
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check_sec_image:
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if (!ha->flt_region_img_status_sec) {
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valid_sec_image = 0;
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goto check_valid_image;
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}
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qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status),
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ha->flt_region_img_status_sec, size);
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if (sec_image_status.signature != QLA27XX_IMG_STATUS_SIGN) {
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ql_dbg(ql_dbg_init, vha, 0x018d,
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"Secondary image signature(0x%x) not valid\n",
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sec_image_status.signature);
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valid_sec_image = 0;
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goto check_valid_image;
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}
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wptr = (uint32_t *)(&sec_image_status);
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cnt = size;
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for (chksum = 0; cnt; cnt--)
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chksum += le32_to_cpu(*wptr++);
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if (chksum) {
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ql_dbg(ql_dbg_init, vha, 0x018e,
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"Checksum validation failed for secondary image (0x%x)\n",
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chksum);
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valid_sec_image = 0;
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}
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check_valid_image:
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if (valid_pri_image && (pri_image_status.image_status_mask & 0x1))
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ha->active_image = QLA27XX_PRIMARY_IMAGE;
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if (valid_sec_image && (sec_image_status.image_status_mask & 0x1)) {
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if (!ha->active_image ||
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pri_image_status.generation_number <
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sec_image_status.generation_number)
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ha->active_image = QLA27XX_SECONDARY_IMAGE;
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}
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ql_dbg(ql_dbg_init, vha, 0x018f, "%s image\n",
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ha->active_image == 0 ? "default bootld and fw" :
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ha->active_image == 1 ? "primary" :
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ha->active_image == 2 ? "secondary" :
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"Invalid");
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return ha->active_image;
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}
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static int
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qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
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uint32_t faddr)
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@ -5370,6 +5457,10 @@ qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
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dcode = (uint32_t *)req->ring;
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*srisc_addr = 0;
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if (IS_QLA27XX(ha) &&
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qla27xx_find_valid_image(vha) == QLA27XX_SECONDARY_IMAGE)
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faddr = ha->flt_region_fw_sec;
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/* Validate firmware image by checking version. */
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qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
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for (i = 0; i < 4; i++)
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@ -846,6 +846,38 @@ qla2xxx_get_flt_info(scsi_qla_host_t *vha, uint32_t flt_addr)
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if (ha->port_no == 1)
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ha->flt_region_nvram = start;
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break;
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case FLT_REG_IMG_PRI_27XX:
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if (IS_QLA27XX(ha))
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ha->flt_region_img_status_pri = start;
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break;
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case FLT_REG_IMG_SEC_27XX:
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if (IS_QLA27XX(ha))
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ha->flt_region_img_status_sec = start;
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break;
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case FLT_REG_FW_SEC_27XX:
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if (IS_QLA27XX(ha))
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ha->flt_region_fw_sec = start;
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break;
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case FLT_REG_BOOTLOAD_SEC_27XX:
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if (IS_QLA27XX(ha))
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ha->flt_region_boot_sec = start;
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break;
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case FLT_REG_VPD_SEC_27XX_0:
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if (IS_QLA27XX(ha))
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ha->flt_region_vpd_sec = start;
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break;
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case FLT_REG_VPD_SEC_27XX_1:
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if (IS_QLA27XX(ha))
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ha->flt_region_vpd_sec = start;
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break;
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case FLT_REG_VPD_SEC_27XX_2:
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if (IS_QLA27XX(ha))
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ha->flt_region_vpd_sec = start;
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break;
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case FLT_REG_VPD_SEC_27XX_3:
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if (IS_QLA27XX(ha))
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ha->flt_region_vpd_sec = start;
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break;
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}
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}
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goto done;
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@ -2989,6 +3021,9 @@ qla24xx_get_flash_version(scsi_qla_host_t *vha, void *mbuf)
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uint8_t code_type, last_image;
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int i;
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struct qla_hw_data *ha = vha->hw;
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uint32_t faddr = 0;
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pcihdr = pcids = 0;
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if (IS_P3P_TYPE(ha))
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return ret;
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@ -3002,9 +3037,11 @@ qla24xx_get_flash_version(scsi_qla_host_t *vha, void *mbuf)
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memset(ha->fw_revision, 0, sizeof(ha->fw_revision));
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dcode = mbuf;
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/* Begin with first PCI expansion ROM header. */
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pcihdr = ha->flt_region_boot << 2;
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if (IS_QLA27XX(ha) &&
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qla27xx_find_valid_image(vha) == QLA27XX_SECONDARY_IMAGE)
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pcihdr = ha->flt_region_boot_sec << 2;
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last_image = 1;
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do {
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/* Verify PCI expansion ROM header. */
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@ -3077,8 +3114,12 @@ qla24xx_get_flash_version(scsi_qla_host_t *vha, void *mbuf)
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/* Read firmware image information. */
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memset(ha->fw_revision, 0, sizeof(ha->fw_revision));
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dcode = mbuf;
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||||
faddr = ha->flt_region_fw;
|
||||
if (IS_QLA27XX(ha) &&
|
||||
qla27xx_find_valid_image(vha) == QLA27XX_SECONDARY_IMAGE)
|
||||
faddr = ha->flt_region_fw_sec;
|
||||
|
||||
qla24xx_read_flash_data(vha, dcode, ha->flt_region_fw + 4, 4);
|
||||
qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
|
||||
for (i = 0; i < 4; i++)
|
||||
dcode[i] = be32_to_cpu(dcode[i]);
|
||||
|
||||
|
|
Loading…
Reference in a new issue