[ARM] 5465/1: Freescale STMP platform support [7/10]
Sources: support for 37xx boards Signed-off-by: dmitry pervushin <dpervushin@embeddedalley.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
dmitry pervushin
Russell King
parent
5cccd37ea1
commit
45d9108011
5 changed files with 329 additions and 0 deletions
2
arch/arm/mach-stmp37xx/Makefile
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2
arch/arm/mach-stmp37xx/Makefile
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@ -0,0 +1,2 @@
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obj-$(CONFIG_ARCH_STMP37XX) += stmp37xx.o
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obj-$(CONFIG_MACH_STMP37XX) += stmp37xx_devb.o
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3
arch/arm/mach-stmp37xx/Makefile.boot
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3
arch/arm/mach-stmp37xx/Makefile.boot
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zreladdr-y := 0x40008000
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params_phys-y := 0x40000100
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initrd_phys-y := 0x40800000
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217
arch/arm/mach-stmp37xx/stmp37xx.c
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arch/arm/mach-stmp37xx/stmp37xx.c
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/*
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* Freescale STMP37XX platform support
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*
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* Embedded Alley Solutions, Inc <source@embeddedalley.com>
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*
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* Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
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* Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
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*/
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/*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/platform_device.h>
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#include <linux/irq.h>
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#include <linux/io.h>
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#include <asm/setup.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/irq.h>
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#include <asm/mach/map.h>
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#include <asm/mach/time.h>
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#include <mach/stmp3xxx.h>
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#include <mach/dma.h>
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#include <mach/regs-icoll.h>
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#include <mach/regs-apbh.h>
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#include <mach/regs-apbx.h>
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#include "stmp37xx.h"
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/*
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* IRQ handling
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*/
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static void stmp37xx_ack_irq(unsigned int irq)
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{
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/* Disable IRQ */
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HW_ICOLL_PRIORITYn_CLR(irq / 4, 0x04 << ((irq % 4) * 8));
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/* ACK current interrupt */
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HW_ICOLL_LEVELACK_WR(1);
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/* Barrier */
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(void) HW_ICOLL_STAT_RD();
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}
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static void stmp37xx_mask_irq(unsigned int irq)
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{
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/* IRQ disable */
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HW_ICOLL_PRIORITYn_CLR(irq / 4, 0x04 << ((irq % 4) * 8));
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}
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static void stmp37xx_unmask_irq(unsigned int irq)
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{
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/* IRQ enable */
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HW_ICOLL_PRIORITYn_SET(irq / 4, 0x04 << ((irq % 4) * 8));
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}
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static struct irq_chip stmp37xx_chip = {
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.ack = stmp37xx_ack_irq,
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.mask = stmp37xx_mask_irq,
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.unmask = stmp37xx_unmask_irq,
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};
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void __init stmp37xx_init_irq(void)
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{
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stmp3xxx_init_irq(&stmp37xx_chip);
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}
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/*
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* DMA interrupt handling
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*/
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void stmp3xxx_arch_dma_enable_interrupt(int channel)
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{
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int dmabus = channel / 16;
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switch (dmabus) {
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case STMP3XXX_BUS_APBH:
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HW_APBH_CTRL1_SET(1 << (8 + (channel % 16)));
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break;
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case STMP3XXX_BUS_APBX:
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HW_APBX_CTRL1_SET(1 << (8 + (channel % 16)));
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break;
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}
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}
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EXPORT_SYMBOL(stmp3xxx_arch_dma_enable_interrupt);
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void stmp3xxx_arch_dma_clear_interrupt(int channel)
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{
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int dmabus = channel / 16;
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switch (dmabus) {
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case STMP3XXX_BUS_APBH:
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HW_APBH_CTRL1_CLR(1 << (channel % 16));
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break;
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case STMP3XXX_BUS_APBX:
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HW_APBX_CTRL1_CLR(1 << (channel % 16));
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break;
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}
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}
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EXPORT_SYMBOL(stmp3xxx_arch_dma_clear_interrupt);
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int stmp3xxx_arch_dma_is_interrupt(int channel)
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{
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int r = 0;
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int dmabus = channel / 16;
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switch (dmabus) {
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case STMP3XXX_BUS_APBH:
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r = HW_APBH_CTRL1_RD() & (1 << (channel % 16));
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break;
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case STMP3XXX_BUS_APBX:
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r = HW_APBX_CTRL1_RD() & (1 << (channel % 16));
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break;
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}
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return r;
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}
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EXPORT_SYMBOL(stmp3xxx_arch_dma_is_interrupt);
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void stmp3xxx_arch_dma_reset_channel(int channel)
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{
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int dmabus = channel / 16;
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unsigned chbit = 1 << (channel % 16);
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switch (dmabus) {
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case STMP3XXX_BUS_APBH:
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/* Reset channel and wait for it to complete */
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HW_APBH_CTRL0_SET(chbit << BP_APBH_CTRL0_RESET_CHANNEL);
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while (HW_APBH_CTRL0_RD() &
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(chbit << BP_APBH_CTRL0_RESET_CHANNEL))
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continue;
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break;
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case STMP3XXX_BUS_APBX:
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/* Reset channel and wait for it to complete */
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HW_APBX_CTRL0_SET(chbit << BP_APBX_CTRL0_RESET_CHANNEL);
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while (HW_APBX_CTRL0_RD() &
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(chbit << BP_APBX_CTRL0_RESET_CHANNEL))
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continue;
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break;
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}
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}
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EXPORT_SYMBOL(stmp3xxx_arch_dma_reset_channel);
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void stmp3xxx_arch_dma_freeze(int channel)
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{
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int dmabus = channel / 16;
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unsigned chbit = 1 << (channel % 16);
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switch (dmabus) {
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case STMP3XXX_BUS_APBH:
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HW_APBH_CTRL0_SET(1<<chbit);
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break;
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case STMP3XXX_BUS_APBX:
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HW_APBX_CTRL0_SET(1<<chbit);
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break;
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}
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}
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EXPORT_SYMBOL(stmp3xxx_arch_dma_freeze);
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void stmp3xxx_arch_dma_unfreeze(int channel)
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{
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int dmabus = channel / 16;
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unsigned chbit = 1 << (channel % 16);
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switch (dmabus) {
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case STMP3XXX_BUS_APBH:
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HW_APBH_CTRL0_CLR(1<<chbit);
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break;
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case STMP3XXX_BUS_APBX:
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HW_APBX_CTRL0_CLR(1<<chbit);
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break;
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}
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}
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EXPORT_SYMBOL(stmp3xxx_arch_dma_unfreeze);
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/*
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* The registers are all very closely mapped, so we might as well map them all
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* with a single mapping
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*
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* Logical Physical
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* f0000000 80000000 On-chip registers
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* f1000000 00000000 256k on-chip SRAM
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*/
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static struct map_desc stmp37xx_io_desc[] __initdata = {
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{
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.virtual = (u32)STMP3XXX_REGS_BASE,
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.pfn = __phys_to_pfn(STMP3XXX_REGS_PHBASE),
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.length = SZ_1M,
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.type = MT_DEVICE
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},
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{
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.virtual = (u32)STMP3XXX_OCRAM_BASE,
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.pfn = __phys_to_pfn(STMP3XXX_OCRAM_PHBASE),
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.length = STMP3XXX_OCRAM_SIZE,
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.type = MT_DEVICE,
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},
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};
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void __init stmp37xx_map_io(void)
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{
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iotable_init(stmp37xx_io_desc, ARRAY_SIZE(stmp37xx_io_desc));
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}
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24
arch/arm/mach-stmp37xx/stmp37xx.h
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24
arch/arm/mach-stmp37xx/stmp37xx.h
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/*
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* Freescale STMP37XX/STMP378X internal functions and data declarations
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*
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* Embedded Alley Solutions, Inc <source@embeddedalley.com>
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*
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* Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
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* Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
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*/
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/*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#ifndef __MACH_STMP37XX_H
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#define __MACH_STMP37XX_H
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void stmp37xx_map_io(void);
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void stmp37xx_init_irq(void);
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#endif /* __MACH_STMP37XX_H */
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83
arch/arm/mach-stmp37xx/stmp37xx_devb.c
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83
arch/arm/mach-stmp37xx/stmp37xx_devb.c
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@ -0,0 +1,83 @@
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/*
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* Freescale STMP37XX development board support
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*
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* Embedded Alley Solutions, Inc <source@embeddedalley.com>
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*
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* Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
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* Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
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*/
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/*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/platform_device.h>
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#include <asm/setup.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <mach/stmp3xxx.h>
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#include <mach/pins.h>
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#include <mach/pinmux.h>
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#include "stmp37xx.h"
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/*
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* List of STMP37xx development board specific devices
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*/
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static struct platform_device *stmp37xx_devb_devices[] = {
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&stmp3xxx_dbguart,
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};
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static struct pin_desc dbguart_pins_0[] = {
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{ PINID_PWM0, PIN_FUN3, },
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{ PINID_PWM1, PIN_FUN3, },
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};
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static struct pin_group dbguart_pins[] = {
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[0] = {
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.pins = dbguart_pins_0,
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.nr_pins = ARRAY_SIZE(dbguart_pins_0),
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},
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};
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static int dbguart_pins_control(int id, int request)
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{
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int r = 0;
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if (request)
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r = stmp3xxx_request_pin_group(&dbguart_pins[id], "debug uart");
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else
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stmp3xxx_release_pin_group(&dbguart_pins[id], "debug uart");
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return r;
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}
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static void __init stmp37xx_devb_init(void)
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{
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stmp3xxx_pinmux_init(NR_REAL_IRQS);
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/* Init STMP3xxx platform */
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stmp3xxx_init();
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stmp3xxx_dbguart.dev.platform_data = dbguart_pins_control;
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/* Add STMP37xx development board devices */
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platform_add_devices(stmp37xx_devb_devices,
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ARRAY_SIZE(stmp37xx_devb_devices));
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}
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MACHINE_START(STMP37XX, "STMP37XX")
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.phys_io = 0x80000000,
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.io_pg_offst = ((0xf0000000) >> 18) & 0xfffc,
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.boot_params = 0x40000100,
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.map_io = stmp37xx_map_io,
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.init_irq = stmp37xx_init_irq,
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.timer = &stmp3xxx_timer,
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.init_machine = stmp37xx_devb_init,
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MACHINE_END
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