Merge branch 'marvell_cleanup_for_v3.5' of git://git.infradead.org/users/jcooper/linux into next/cleanup
* 'marvell_cleanup_for_v3.5' of git://git.infradead.org/users/jcooper/linux: Dove: Fix Section mismatch warnings ARM: orion5x: ts78xx debugging changes ARM: orion5x: remove PM dependency from ts78xx ARM: orion5x: ts78xx fix NAND resource off by one ARM: orion5x: ts78xx whitespace cleanups Orion5x: Fix Section mismatch warnings Orion5x: Fix warning: struct pci_dev declared inside paramter list Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
commit
48b9bf0953
8 changed files with 35 additions and 39 deletions
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@ -181,7 +181,7 @@ static int get_tclk(void)
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return 166666667;
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}
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static void dove_timer_init(void)
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static void __init dove_timer_init(void)
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{
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orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
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IRQ_DOVE_BRIDGE, get_tclk());
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@ -56,7 +56,7 @@ static void dove_mpp_gpio_mode(int start, int end, int gpio_mode)
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/* Dump all the extra MPP registers. The platform code will dump the
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registers for pins 0-23. */
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static void dove_mpp_dump_regs(void)
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static void __init dove_mpp_dump_regs(void)
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{
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pr_debug("PMU_CTRL4_CTRL: %08x\n",
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readl(DOVE_MPP_CTRL4_VIRT_BASE));
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@ -67,7 +67,7 @@ static void dove_mpp_dump_regs(void)
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pr_debug("MPP_GENERAL: %08x\n", readl(DOVE_MPP_GENERAL_VIRT_BASE));
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}
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static void dove_mpp_cfg_nfc(int sel)
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static void __init dove_mpp_cfg_nfc(int sel)
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{
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u32 mpp_gen_cfg = readl(DOVE_MPP_GENERAL_VIRT_BASE);
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@ -78,7 +78,7 @@ static void dove_mpp_cfg_nfc(int sel)
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dove_mpp_gpio_mode(64, 71, GPIO_OUTPUT_OK);
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}
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static void dove_mpp_cfg_au1(int sel)
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static void __init dove_mpp_cfg_au1(int sel)
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{
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u32 mpp_ctrl4 = readl(DOVE_MPP_CTRL4_VIRT_BASE);
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u32 ssp_ctrl1 = readl(DOVE_SSP_CTRL_STATUS_1);
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@ -118,7 +118,7 @@ static void dove_mpp_cfg_au1(int sel)
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/* Configure the group registers, enabling GPIO if sel indicates the
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pin is to be used for GPIO */
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static void dove_mpp_conf_grp(unsigned int *mpp_grp_list)
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static void __init dove_mpp_conf_grp(unsigned int *mpp_grp_list)
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{
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u32 mpp_ctrl4 = readl(DOVE_MPP_CTRL4_VIRT_BASE);
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int gpio_mode;
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@ -86,7 +86,6 @@ config MACH_WRT350N_V2
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config MACH_TS78XX
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bool "Technologic Systems TS-78xx"
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select PM
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help
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Say 'Y' here if you want your kernel to support the
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Technologic Systems TS-78xx platform.
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@ -76,7 +76,7 @@ static int __init cpu_win_can_remap(const struct orion_addr_map_cfg *cfg,
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/*
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* Description of the windows needed by the platform code
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*/
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static struct __initdata orion_addr_map_cfg addr_map_cfg = {
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static struct orion_addr_map_cfg addr_map_cfg __initdata = {
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.num_wins = 8,
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.cpu_win_can_remap = cpu_win_can_remap,
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.bridge_virt_base = ORION5X_BRIDGE_VIRT_BASE,
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@ -205,7 +205,7 @@ int __init orion5x_find_tclk(void)
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return 166666667;
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}
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static void orion5x_timer_init(void)
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static void __init orion5x_timer_init(void)
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{
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orion5x_tclk = orion5x_find_tclk();
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@ -45,6 +45,7 @@ void orion5x_restart(char, const char *);
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*/
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struct pci_bus;
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struct pci_sys_data;
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struct pci_dev;
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void orion5x_pcie_id(u32 *dev, u32 *rev);
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void orion5x_pci_disable(void);
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@ -28,9 +28,9 @@ struct fpga_device {
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struct fpga_devices {
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/* Technologic Systems */
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struct fpga_device ts_rtc;
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struct fpga_device ts_nand;
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struct fpga_device ts_rng;
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struct fpga_device ts_rtc;
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struct fpga_device ts_nand;
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struct fpga_device ts_rng;
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};
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struct ts78xx_fpga_data {
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@ -8,6 +8,8 @@
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* warranty of any kind, whether express or implied.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/sysfs.h>
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@ -115,7 +117,7 @@ static struct platform_device ts78xx_ts_rtc_device = {
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* I've used the method TS use in their rtc7800.c example for the detection
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*
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* TODO: track down a guinea pig without an RTC to see if we can work out a
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* better RTC detection routine
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* better RTC detection routine
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*/
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static int ts78xx_ts_rtc_load(void)
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{
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@ -141,10 +143,14 @@ static int ts78xx_ts_rtc_load(void)
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} else
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rc = platform_device_add(&ts78xx_ts_rtc_device);
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if (rc)
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pr_info("RTC could not be registered: %d\n",
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rc);
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return rc;
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}
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}
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pr_info("RTC not found\n");
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return -ENODEV;
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};
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@ -292,11 +298,8 @@ static struct platform_nand_data ts78xx_ts_nand_data = {
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},
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};
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static struct resource ts78xx_ts_nand_resources = {
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.start = TS_NAND_DATA,
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.end = TS_NAND_DATA + 4,
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.flags = IORESOURCE_MEM,
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};
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static struct resource ts78xx_ts_nand_resources
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= DEFINE_RES_MEM(TS_NAND_DATA, 4);
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static struct platform_device ts78xx_ts_nand_device = {
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.name = "gen_nand",
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@ -319,6 +322,8 @@ static int ts78xx_ts_nand_load(void)
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} else
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rc = platform_device_add(&ts78xx_ts_nand_device);
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if (rc)
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pr_info("NAND could not be registered: %d\n", rc);
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return rc;
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};
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@ -332,11 +337,8 @@ static void ts78xx_ts_nand_unload(void)
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****************************************************************************/
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#define TS_RNG_DATA (TS78XX_FPGA_REGS_PHYS_BASE | 0x044)
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static struct resource ts78xx_ts_rng_resource = {
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.flags = IORESOURCE_MEM,
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.start = TS_RNG_DATA,
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.end = TS_RNG_DATA + 4 - 1,
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};
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static struct resource ts78xx_ts_rng_resource
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= DEFINE_RES_MEM(TS_RNG_DATA, 4);
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static struct timeriomem_rng_data ts78xx_ts_rng_data = {
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.period = 1000000, /* one second */
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@ -363,6 +365,8 @@ static int ts78xx_ts_rng_load(void)
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} else
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rc = platform_device_add(&ts78xx_ts_rng_device);
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if (rc)
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pr_info("RNG could not be registered: %d\n", rc);
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return rc;
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};
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@ -402,7 +406,7 @@ static void ts78xx_fpga_supports(void)
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/* enable devices if magic matches */
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switch ((ts78xx_fpga.id >> 8) & 0xffffff) {
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case TS7800_FPGA_MAGIC:
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pr_warning("TS-7800 FPGA: unrecognized revision 0x%.2x\n",
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pr_warning("unrecognised FPGA revision 0x%.2x\n",
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ts78xx_fpga.id & 0xff);
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ts78xx_fpga.supports.ts_rtc.present = 1;
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ts78xx_fpga.supports.ts_nand.present = 1;
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@ -422,26 +426,20 @@ static int ts78xx_fpga_load_devices(void)
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if (ts78xx_fpga.supports.ts_rtc.present == 1) {
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tmp = ts78xx_ts_rtc_load();
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if (tmp) {
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pr_info("TS-78xx: RTC not registered\n");
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if (tmp)
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ts78xx_fpga.supports.ts_rtc.present = 0;
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}
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ret |= tmp;
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}
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if (ts78xx_fpga.supports.ts_nand.present == 1) {
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tmp = ts78xx_ts_nand_load();
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if (tmp) {
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pr_info("TS-78xx: NAND not registered\n");
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if (tmp)
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ts78xx_fpga.supports.ts_nand.present = 0;
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}
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ret |= tmp;
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}
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if (ts78xx_fpga.supports.ts_rng.present == 1) {
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tmp = ts78xx_ts_rng_load();
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if (tmp) {
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pr_info("TS-78xx: RNG not registered\n");
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if (tmp)
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ts78xx_fpga.supports.ts_rng.present = 0;
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}
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ret |= tmp;
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}
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@ -466,7 +464,7 @@ static int ts78xx_fpga_load(void)
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{
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ts78xx_fpga.id = readl(TS78XX_FPGA_REGS_VIRT_BASE);
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pr_info("TS-78xx FPGA: magic=0x%.6x, rev=0x%.2x\n",
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pr_info("FPGA magic=0x%.6x, rev=0x%.2x\n",
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(ts78xx_fpga.id >> 8) & 0xffffff,
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ts78xx_fpga.id & 0xff);
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* UrJTAG SVN since r1381 can be used to reprogram the FPGA
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*/
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if (ts78xx_fpga.id != fpga_id) {
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pr_err("TS-78xx FPGA: magic/rev mismatch\n"
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pr_err("FPGA magic/rev mismatch\n"
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"TS-78xx FPGA: was 0x%.6x/%.2x but now 0x%.6x/%.2x\n",
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(ts78xx_fpga.id >> 8) & 0xffffff, ts78xx_fpga.id & 0xff,
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(fpga_id >> 8) & 0xffffff, fpga_id & 0xff);
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@ -525,7 +523,7 @@ static ssize_t ts78xx_fpga_store(struct kobject *kobj,
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int value, ret;
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if (ts78xx_fpga.state < 0) {
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pr_err("TS-78xx FPGA: borked, you must powercycle asap\n");
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pr_err("FPGA borked, you must powercycle ASAP\n");
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return -EBUSY;
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}
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value = 1;
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else if (strncmp(buf, "offline", sizeof("offline") - 1) == 0)
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value = 0;
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else {
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pr_err("ts78xx_fpga_store: Invalid value\n");
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else
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return -EINVAL;
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}
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if (ts78xx_fpga.state == value)
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return n;
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@ -614,7 +610,7 @@ static void __init ts78xx_init(void)
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/* FPGA init */
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ts78xx_fpga_devices_zero_init();
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ret = ts78xx_fpga_load();
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ret = sysfs_create_file(power_kobj, &ts78xx_fpga_attr.attr);
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ret = sysfs_create_file(firmware_kobj, &ts78xx_fpga_attr.attr);
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if (ret)
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pr_err("sysfs_create_file failed: %d\n", ret);
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}
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