dt-bindings: Remove leading zeros from bindings notation

Improve the binding example by removing all the leading zeros to fix the
following dtc warnings:

Warning (unit_address_format): Node /XXX unit name should not have leading 0s

Converted using the following command:

perl -p -i -e 's/\@0+([0-9a-f])/\@$1/g' `find ./Documentation/devicetree/bindings "*.txt"`

Some unnecessary changes were manually fixed.

Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Signed-off-by: Rob Herring <robh@kernel.org>
This commit is contained in:
Marco Franchi 2017-11-08 14:27:48 -02:00 committed by Rob Herring
parent efb5b43a54
commit 48c926cd34
126 changed files with 172 additions and 172 deletions

View file

@ -62,7 +62,7 @@ pmu_system_controller: system-controller@10040000 {
Example of clock consumer :
usb3503: usb3503@08 {
usb3503: usb3503@8 {
/* ... */
clock-names = "refclk";
clocks = <&pmu_system_controller 0>;

View file

@ -71,7 +71,7 @@ Optional nodes:
- compatible: only "samsung,secure-firmware" is currently supported
- reg: address of non-secure SYSRAM used for communication with firmware
firmware@0203F000 {
firmware@203F000 {
compatible = "samsung,secure-firmware";
reg = <0x0203F000 0x1000>;
};

View file

@ -33,7 +33,7 @@ Required properties:
property with the highest frequency
Example:
v2m_sysctl: sysctl@020000 {
v2m_sysctl: sysctl@20000 {
compatible = "arm,sp810", "arm,primecell";
reg = <0x020000 0x1000>;
clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&smbclk>;

View file

@ -37,7 +37,7 @@ Example:
compatible = "arm,vexpress-sysreg";
reg = <0x10000000 0x1000>;
v2m_led_gpios: sys_led@08 {
v2m_led_gpios: sys_led@8 {
compatible = "arm,vexpress-sysreg,sys_led";
gpio-controller;
#gpio-cells = <2>;

View file

@ -56,7 +56,7 @@ Examples:
interrupts = <115>;
};
ahci: sata@01c18000 {
ahci: sata@1c18000 {
compatible = "allwinner,sun4i-a10-ahci";
reg = <0x01c18000 0x1000>;
interrupts = <56>;

View file

@ -25,7 +25,7 @@ Optional properties:
Examples:
sata@02200000 {
sata@2200000 {
compatible = "fsl,imx6q-ahci";
reg = <0x02200000 0x4000>;
interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;

View file

@ -61,7 +61,7 @@ Timing property for child nodes. It is mandatory, not optional.
Example for an imx6q-sabreauto board, the NOR flash connected to the WEIM:
weim: weim@021b8000 {
weim: weim@21b8000 {
compatible = "fsl,imx6q-weim";
reg = <0x021b8000 0x4000>;
clocks = <&clks 196>;

View file

@ -28,7 +28,7 @@ which can normally be found in the datasheet.
Example:
rsb@01f03400 {
rsb@1f03400 {
compatible = "allwinner,sun8i-a23-rsb";
reg = <0x01f03400 0x400>;
interrupts = <0 39 4>;

View file

@ -59,7 +59,7 @@ syscon: syscon@10000000 {
compatible = "syscon";
reg = <0x10000000 0x1000>;
oscclk0: osc0@0c {
oscclk0: osc0@c {
compatible = "arm,syscon-icst307";
#clock-cells = <0>;
lock-offset = <0x20>;

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@ -80,7 +80,7 @@ Example 3: I2S controller node that consumes the clock generated by the clock
controller. Refer to the standard clock bindings for information
about 'clocks' and 'clock-names' property.
i2s0: i2s@03830000 {
i2s0: i2s@3830000 {
compatible = "samsung,i2s-v5";
reg = <0x03830000 0x100>;
dmas = <&pdma0 10

View file

@ -43,7 +43,7 @@ Example: I2S controller node that consumes the clock generated by the clock
controller. Refer to the standard clock bindings for information
about 'clocks' and 'clock-names' property.
i2s0: i2s@03830000 {
i2s0: i2s@3830000 {
/* ... */
clock-names = "iis", "i2s_opclk0",
"i2s_opclk1";

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@ -21,7 +21,7 @@ Required properties:
a size of 8.
- #clock-cells : from common clock binding; shall be set to 1
divider_clk: core-clock@0064 {
divider_clk: core-clock@64 {
compatible = "marvell,dove-divider-clock";
reg = <0x0064 0x8>;
#clock-cells = <1>;

View file

@ -10,13 +10,13 @@ ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx1-clock.h
for the full list of i.MX1 clock IDs.
Examples:
clks: ccm@0021b000 {
clks: ccm@21b000 {
#clock-cells = <1>;
compatible = "fsl,imx1-ccm";
reg = <0x0021b000 0x1000>;
};
pwm: pwm@00208000 {
pwm: pwm@208000 {
#pwm-cells = <2>;
compatible = "fsl,imx1-pwm";
reg = <0x00208000 0x1000>;

View file

@ -14,14 +14,14 @@ Examples:
#include <dt-bindings/clock/imx6qdl-clock.h>
clks: ccm@020c4000 {
clks: ccm@20c4000 {
compatible = "fsl,imx6q-ccm";
reg = <0x020c4000 0x4000>;
interrupts = <0 87 0x04 0 88 0x04>;
#clock-cells = <1>;
};
uart1: serial@02020000 {
uart1: serial@2020000 {
compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x02020000 0x4000>;
interrupts = <0 26 0x04>;

View file

@ -46,7 +46,7 @@ Example:
/* ... */
Node of the MFD chip
max77686: max77686@09 {
max77686: max77686@9 {
compatible = "maxim,max77686";
interrupt-parent = <&wakeup_eint>;
interrupts = <26 0>;
@ -71,7 +71,7 @@ Example:
/* ... */
Node of the MFD chip
max77802: max77802@09 {
max77802: max77802@9 {
compatible = "maxim,max77802";
interrupt-parent = <&wakeup_eint>;
interrupts = <26 0>;

View file

@ -42,7 +42,7 @@ Required properties:
Example:
clockgen-a@090ff000 {
clockgen-a@90ff000 {
compatible = "st,clkgen-c32";
reg = <0x90ff000 0x1000>;

View file

@ -36,7 +36,7 @@ For the PRCM CCUs on A83T/H3/A64, two more clocks are needed:
- "iosc": the SoC's internal frequency oscillator
Example for generic CCU:
ccu: clock@01c20000 {
ccu: clock@1c20000 {
compatible = "allwinner,sun8i-h3-ccu";
reg = <0x01c20000 0x400>;
clocks = <&osc24M>, <&osc32k>;
@ -46,7 +46,7 @@ ccu: clock@01c20000 {
};
Example for PRCM CCU:
r_ccu: clock@01f01400 {
r_ccu: clock@1f01400 {
compatible = "allwinner,sun50i-a64-r-ccu";
reg = <0x01f01400 0x100>;
clocks = <&osc24M>, <&osc32k>, <&iosc>, <&ccu CLK_PLL_PERIPH0>;

View file

@ -137,7 +137,7 @@ the address block, which is related to the overall mmc block.
For example:
osc24M: clk@01c20050 {
osc24M: clk@1c20050 {
#clock-cells = <0>;
compatible = "allwinner,sun4i-a10-osc-clk";
reg = <0x01c20050 0x4>;
@ -145,7 +145,7 @@ osc24M: clk@01c20050 {
clock-output-names = "osc24M";
};
pll1: clk@01c20000 {
pll1: clk@1c20000 {
#clock-cells = <0>;
compatible = "allwinner,sun4i-a10-pll1-clk";
reg = <0x01c20000 0x4>;
@ -153,7 +153,7 @@ pll1: clk@01c20000 {
clock-output-names = "pll1";
};
pll5: clk@01c20020 {
pll5: clk@1c20020 {
#clock-cells = <1>;
compatible = "allwinner,sun4i-pll5-clk";
reg = <0x01c20020 0x4>;
@ -161,7 +161,7 @@ pll5: clk@01c20020 {
clock-output-names = "pll5_ddr", "pll5_other";
};
pll6: clk@01c20028 {
pll6: clk@1c20028 {
#clock-cells = <1>;
compatible = "allwinner,sun6i-a31-pll6-clk";
reg = <0x01c20028 0x4>;
@ -169,7 +169,7 @@ pll6: clk@01c20028 {
clock-output-names = "pll6", "pll6x2";
};
cpu: cpu@01c20054 {
cpu: cpu@1c20054 {
#clock-cells = <0>;
compatible = "allwinner,sun4i-a10-cpu-clk";
reg = <0x01c20054 0x4>;
@ -177,7 +177,7 @@ cpu: cpu@01c20054 {
clock-output-names = "cpu";
};
mmc0_clk: clk@01c20088 {
mmc0_clk: clk@1c20088 {
#clock-cells = <1>;
compatible = "allwinner,sun4i-a10-mmc-clk";
reg = <0x01c20088 0x4>;
@ -199,7 +199,7 @@ gmac_int_tx_clk: clk@3 {
clock-output-names = "gmac_int_tx";
};
gmac_clk: clk@01c20164 {
gmac_clk: clk@1c20164 {
#clock-cells = <0>;
compatible = "allwinner,sun7i-a20-gmac-clk";
reg = <0x01c20164 0x4>;
@ -211,7 +211,7 @@ gmac_clk: clk@01c20164 {
clock-output-names = "gmac";
};
mmc_config_clk: clk@01c13000 {
mmc_config_clk: clk@1c13000 {
compatible = "allwinner,sun9i-a80-mmc-config-clk";
reg = <0x01c13000 0x10>;
clocks = <&ahb0_gates 8>;

View file

@ -25,7 +25,7 @@ Example:
};
};
...
i2c0: i2c-master@0d090000 {
i2c0: i2c-master@d090000 {
...
cdce706: clock-synth@69 {
compatible = "ti,cdce706";

View file

@ -14,7 +14,7 @@ Optional properties:
- reset-names : must contain "ahb"
Example:
crypto: crypto-engine@01c15000 {
crypto: crypto-engine@1c15000 {
compatible = "allwinner,sun4i-a10-crypto";
reg = <0x01c15000 0x1000>;
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;

View file

@ -42,7 +42,7 @@ Optional properties:
example:
gpu_3d: gpu@00130000 {
gpu_3d: gpu@130000 {
compatible = "vivante,gc";
reg = <0x00130000 0x4000>;
interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>;

View file

@ -32,11 +32,11 @@ Optional properties
Example:
gpr: iomuxc-gpr@020e0000 {
gpr: iomuxc-gpr@20e0000 {
/* ... */
};
hdmi: hdmi@0120000 {
hdmi: hdmi@120000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx6q-hdmi";

View file

@ -78,7 +78,7 @@ chosen {
stdout-path = "display0";
};
soc@01c00000 {
soc@1c00000 {
lcdc0: lcdc@1c0c000 {
compatible = "allwinner,sun4i-a10-lcdc";
...

View file

@ -266,7 +266,7 @@ connector {
};
};
hdmi: hdmi@01c16000 {
hdmi: hdmi@1c16000 {
compatible = "allwinner,sun5i-a10s-hdmi";
reg = <0x01c16000 0x1000>;
interrupts = <58>;
@ -305,7 +305,7 @@ hdmi: hdmi@01c16000 {
};
};
tve0: tv-encoder@01c0a000 {
tve0: tv-encoder@1c0a000 {
compatible = "allwinner,sun4i-a10-tv-encoder";
reg = <0x01c0a000 0x1000>;
clocks = <&ahb_gates 34>;

View file

@ -12,7 +12,7 @@ Required properties:
second cell holding the request line number.
Example:
dma: dma-controller@01c02000 {
dma: dma-controller@1c02000 {
compatible = "allwinner,sun4i-a10-dma";
reg = <0x01c02000 0x1000>;
interrupts = <27>;
@ -32,7 +32,7 @@ The three cells in order are:
3. The port ID as specified in the datasheet
Example:
spi2: spi@01c17000 {
spi2: spi@1c17000 {
compatible = "allwinner,sun4i-a10-spi";
reg = <0x01c17000 0x1000>;
interrupts = <0 12 4>;

View file

@ -38,7 +38,7 @@ The two cells in order are:
2. The port ID as specified in the datasheet
Example:
spi2: spi@01c6a000 {
spi2: spi@1c6a000 {
compatible = "allwinner,sun6i-a31-spi";
reg = <0x01c6a000 0x1000>;
interrupts = <0 67 4>;

View file

@ -142,7 +142,7 @@ mcasp0: mcasp@48038000 {
};
2.
edma1: edma@02728000 {
edma1: edma@2728000 {
compatible = "ti,k2g-edma3-tpcc", "ti,edma3-tpcc";
reg = <0x02728000 0x8000>;
reg-names = "edma3_cc";
@ -165,13 +165,13 @@ edma1: edma@02728000 {
power-domains = <&k2g_pds 0x4f>;
};
edma1_tptc0: tptc@027b0000 {
edma1_tptc0: tptc@27b0000 {
compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc";
reg = <0x027b0000 0x400>;
power-domains = <&k2g_pds 0x4f>;
};
edma1_tptc1: tptc@027b8000 {
edma1_tptc1: tptc@27b8000 {
compatible = "ti, k2g-edma3-tptc", "ti,edma3-tptc";
reg = <0x027b8000 0x400>;
power-domains = <&k2g_pds 0x4f>;

View file

@ -26,7 +26,7 @@ Controller:
Client:
Use specific request line passing from dmax
For example, spdif0 tx channel request line is 4
spdif0: spdif0@0b004000 {
spdif0: spdif0@b004000 {
#sound-dai-cells = <0>;
compatible = "zte,zx296702-spdif";
reg = <0x0b004000 0x1000>;

View file

@ -66,7 +66,7 @@ See ".../sram/sram.txt" for the bindings.
Example:
hsp_top0: hsp@03c00000 {
hsp_top0: hsp@3c00000 {
...
#mbox-cells = <2>;
};

View file

@ -25,7 +25,7 @@ Please refer to gpio.txt in this directory for details of the common GPIO
bindings used by client devices.
Example:
dspgpio0: keystone_dsp_gpio@02620240 {
dspgpio0: keystone_dsp_gpio@2620240 {
compatible = "ti,keystone-dsp-gpio";
ti,syscon-dev = <&devctrl 0x240>;
gpio-controller;

View file

@ -30,7 +30,7 @@ Optional properties:
Example:
pdc_gpios: gpio-controller@02006500 {
pdc_gpios: gpio-controller@2006500 {
gpio-controller;
#gpio-cells = <2>;

View file

@ -59,7 +59,7 @@ Required properties:
Example:
gpios: gpio-controller@02005800 {
gpios: gpio-controller@2005800 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "img,tz1090-gpio";

View file

@ -17,7 +17,7 @@ Optional properties :
Example :
i2c@02010084000 {
i2c@2010084000 {
compatible = "lsi,api2c";
device_type = "i2c";
#address-cells = <1>;

View file

@ -24,7 +24,7 @@ Slave device properties:
Example:
p2wi@01f03400 {
p2wi@1f03400 {
compatible = "allwinner,sun6i-a31-p2wi";
reg = <0x01f03400 0x400>;
interrupts = <0 39 4>;

View file

@ -19,7 +19,7 @@ Optional properties:
Example:
ak8974@0f {
ak8974@f {
compatible = "asahi-kasei,ak8974";
reg = <0x0f>;
avdd-supply = <&foo_reg>;

View file

@ -13,7 +13,7 @@ Optional properties:
Example:
ak8975@0c {
ak8975@c {
compatible = "asahi-kasei,ak8975";
reg = <0x0c>;
gpios = <&gpj0 7 0>;

View file

@ -19,7 +19,7 @@ Example:
#include <dt-bindings/input/input.h>
lradc: lradc@01c22800 {
lradc: lradc@1c22800 {
compatible = "allwinner,sun4i-a10-lradc-keys";
reg = <0x01c22800 0x100>;
interrupts = <31>;

View file

@ -10,7 +10,7 @@ Required properties:
Example:
egalax_ts@04 {
touchscreen@4 {
compatible = "eeti,egalax_ts";
reg = <0x04>;
interrupt-parent = <&gpio1>;

View file

@ -21,7 +21,7 @@ Optional properties:
each read. Valid values are 1, 4, 8, 16 and 32.
Example:
tsc: tsc@02040000 {
tsc: tsc@2040000 {
compatible = "fsl,imx6ul-tsc";
reg = <0x02040000 0x4000>, <0x0219c000 0x4000>;
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,

View file

@ -20,7 +20,7 @@ Required properties:
Example:
sc-nmi-intc@01c00030 {
sc-nmi-intc@1c00030 {
compatible = "allwinner,sun7i-a20-sc-nmi";
interrupt-controller;
#interrupt-cells = <2>;

View file

@ -20,7 +20,7 @@ Please refer to interrupts.txt in this directory for details of the common
Interrupt Controllers bindings used by client devices.
Example:
kirq0: keystone_irq0@026202a0 {
kirq0: keystone_irq0@26202a0 {
compatible = "ti,keystone-irq";
ti,syscon-dev = <&devctrl 0x2a0>;
interrupts = <GIC_SPI 4 IRQ_TYPE_EDGE_RISING>;

View file

@ -115,7 +115,7 @@ to non-secure vs secure interrupt line.
iommus = <&apps_iommu 4>;
};
gpu@01c00000 {
gpu@1c00000 {
...
iommus = <&gpu_iommu 1>, <&gpu_iommu 2>;
};

View file

@ -32,7 +32,7 @@ syscon: syscon@10000000 {
compatible = "arm,realview-pb1176-syscon", "syscon";
reg = <0x10000000 0x1000>;
led@08.0 {
led@8.0 {
compatible = "register-bit-led";
offset = <0x08>;
mask = <0x01>;
@ -40,7 +40,7 @@ syscon: syscon@10000000 {
linux,default-trigger = "heartbeat";
default-state = "on";
};
led@08.1 {
led@8.1 {
compatible = "register-bit-led";
offset = <0x08>;
mask = <0x02>;
@ -48,7 +48,7 @@ syscon: syscon@10000000 {
linux,default-trigger = "mmc0";
default-state = "off";
};
led@08.2 {
led@8.2 {
compatible = "register-bit-led";
offset = <0x08>;
mask = <0x04>;
@ -56,35 +56,35 @@ syscon: syscon@10000000 {
linux,default-trigger = "cpu0";
default-state = "off";
};
led@08.3 {
led@8.3 {
compatible = "register-bit-led";
offset = <0x08>;
mask = <0x08>;
label = "versatile:3";
default-state = "off";
};
led@08.4 {
led@8.4 {
compatible = "register-bit-led";
offset = <0x08>;
mask = <0x10>;
label = "versatile:4";
default-state = "off";
};
led@08.5 {
led@8.5 {
compatible = "register-bit-led";
offset = <0x08>;
mask = <0x20>;
label = "versatile:5";
default-state = "off";
};
led@08.6 {
led@8.6 {
compatible = "register-bit-led";
offset = <0x08>;
mask = <0x40>;
label = "versatile:6";
default-state = "off";
};
led@08.7 {
led@8.7 {
compatible = "register-bit-led";
offset = <0x08>;
mask = <0x80>;

View file

@ -29,7 +29,7 @@ Required properties:
Example(K2G):
------------
msgmgr: msgmgr@02a00000 {
msgmgr: msgmgr@2a00000 {
compatible = "ti,k2g-message-manager";
#mbox-cells = <2>;
reg-names = "queue_proxy_region", "queue_state_debug_region";

View file

@ -446,7 +446,7 @@ prefixed with the string "marvell,", for Marvell Technology Group Ltd.
that services interrupts for this device.
Example Discovery CPU Error node:
cpu-error@0070 {
cpu-error@70 {
compatible = "marvell,mv64360-cpu-error";
reg = <0x70 0x10 0x128 0x28>;
interrupts = <3>;
@ -466,7 +466,7 @@ prefixed with the string "marvell,", for Marvell Technology Group Ltd.
that services interrupts for this device.
Example Discovery SRAM Controller node:
sram-ctrl@0380 {
sram-ctrl@380 {
compatible = "marvell,mv64360-sram-ctrl";
reg = <0x380 0x80>;
interrupts = <13>;

View file

@ -27,7 +27,7 @@ Documentation/devicetree/bindings/media/video-interfaces.txt.
Example:
tc358743@0f {
tc358743@f {
compatible = "toshiba,tc358743";
reg = <0x0f>;
clocks = <&hdmi_osc>;

View file

@ -25,7 +25,7 @@ Optional properties:
Example:
ir@02006200 {
ir@2006200 {
compatible = "img,ir-rev1";
reg = <0x02006200 0x100>;
interrupts = <29 4>;

View file

@ -13,7 +13,7 @@ Required properties:
Example for STIH407:
sti-cec@094a087c {
sti-cec@94a087c {
compatible = "st,stih-cec";
reg = <0x94a087c 0x64>;
clocks = <&clk_sysin>;

View file

@ -50,7 +50,7 @@ Example:
/* stih410 SoC b2120 + b2004a + stv0367-pll(NIMB) + stv0367-tda18212 (NIMA) DT example) */
c8sectpfe@08a20000 {
c8sectpfe@8a20000 {
compatible = "st,stih407-c8sectpfe";
reg = <0x08a20000 0x10000>, <0x08a00000 0x4000>;
reg-names = "stfe", "stfe-ram";

View file

@ -14,7 +14,7 @@ Optional properties:
Example:
ir0: ir@01c21800 {
ir0: ir@1c21800 {
compatible = "allwinner,sun4i-a10-ir";
clocks = <&apb0_gates 6>, <&ir0_clk>;
clock-names = "apb", "ir";

View file

@ -19,7 +19,7 @@ Required properties:
Example:
max77686: pmic@09 {
max77686: pmic@9 {
compatible = "maxim,max77686";
interrupt-parent = <&wakeup_eint>;
interrupts = <26 0>;

View file

@ -18,7 +18,7 @@ Required properties:
Example:
max77802: pmic@09 {
max77802: pmic@9 {
compatible = "maxim,max77802";
interrupt-parent = <&intc>;
interrupts = <26 IRQ_TYPE_NONE>;

View file

@ -41,7 +41,7 @@ foo@1000 {
compatible = "syscon", "simple-mfd";
reg = <0x01000 0x1000>;
led@08.0 {
led@8.0 {
compatible = "register-bit-led";
offset = <0x08>;
mask = <0x01>;

View file

@ -10,7 +10,7 @@ Required properties:
- #io-channel-cells: shall be 0,
Example:
ths: ths@01c25000 {
ths: ths@1c25000 {
compatible = "allwinner,sun8i-a33-ths";
reg = <0x01c25000 0x100>;
#thermal-sensor-cells = <0>;
@ -47,7 +47,7 @@ Optional properties:
Example:
rtp: rtp@01c25000 {
rtp: rtp@1c25000 {
compatible = "allwinner,sun4i-a10-ts";
reg = <0x01c25000 0x100>;
interrupts = <29>;

View file

@ -15,7 +15,7 @@ The prcm node may contain several subdevices definitions:
Example:
prcm: prcm@01f01400 {
prcm: prcm@1f01400 {
compatible = "allwinner,sun6i-a31-prcm";
reg = <0x01f01400 0x200>;

View file

@ -18,7 +18,7 @@ Optional property:
performed on the device.
Examples:
gpr: iomuxc-gpr@020e0000 {
gpr: iomuxc-gpr@20e0000 {
compatible = "fsl,imx6q-iomuxc-gpr", "syscon";
reg = <0x020e0000 0x38>;
};

View file

@ -143,7 +143,7 @@ sdhci@ab000000 {
Example with sdio function subnode:
mmc3: mmc@01c12000 {
mmc3: mmc@1c12000 {
#address-cells = <1>;
#size-cells = <0>;

View file

@ -74,7 +74,7 @@ mmc0: sdhci@fe81e000 {
/* Example SD stih407 family configuration */
mmc1: sdhci@09080000 {
mmc1: sdhci@9080000 {
compatible = "st,sdhci-stih407", "st,sdhci";
reg = <0x09080000 0x7ff>;
reg-names = "mmc";
@ -90,7 +90,7 @@ mmc1: sdhci@09080000 {
/* Example eMMC stih407 family configuration */
mmc0: sdhci@09060000 {
mmc0: sdhci@9060000 {
compatible = "st,sdhci-stih407", "st,sdhci";
reg = <0x09060000 0x7ff>, <0x9061008 0x20>;
reg-names = "mmc", "top-mmc-delay";

View file

@ -29,7 +29,7 @@ Optional properties:
Examples:
- Within .dtsi:
mmc0: mmc@01c0f000 {
mmc0: mmc@1c0f000 {
compatible = "allwinner,sun5i-a13-mmc";
reg = <0x01c0f000 0x1000>;
clocks = <&ahb_gates 8>, <&mmc0_clk>, <&mmc0_output_clk>, <&mmc0_sample_clk>;
@ -39,7 +39,7 @@ Examples:
};
- Within dts:
mmc0: mmc@01c0f000 {
mmc0: mmc@1c0f000 {
pinctrl-names = "default", "default";
pinctrl-0 = <&mmc0_pins_a>;
pinctrl-1 = <&mmc0_cd_pin_reference_design>;

View file

@ -31,7 +31,7 @@ see Documentation/devicetree/bindings/mtd/nand.txt for generic bindings.
Examples:
nfc: nand@01c03000 {
nfc: nand@1c03000 {
compatible = "allwinner,sun4i-a10-nand";
reg = <0x01c03000 0x1000>;
interrupts = <0 37 1>;

View file

@ -10,7 +10,7 @@ Required properties:
Example:
emac: ethernet@01c0b000 {
emac: ethernet@1c0b000 {
compatible = "allwinner,sun4i-a10-emac";
reg = <0x01c0b000 0x1000>;
interrupts = <55>;

View file

@ -9,7 +9,7 @@ Optional properties:
- phy-supply: phandle to a regulator if the PHY needs one
Example at the SoC level:
mdio@01c0b080 {
mdio@1c0b080 {
compatible = "allwinner,sun4i-a10-mdio";
reg = <0x01c0b080 0x14>;
#address-cells = <1>;
@ -18,7 +18,7 @@ mdio@01c0b080 {
And at the board level:
mdio@01c0b080 {
mdio@1c0b080 {
phy-supply = <&reg_emac_3v3>;
phy0: ethernet-phy@0 {

View file

@ -15,7 +15,7 @@ Optional properties:
Examples:
gmac: ethernet@01c50000 {
gmac: ethernet@1c50000 {
compatible = "allwinner,sun7i-a20-gmac";
reg = <0x01c50000 0x10000>,
<0x01c20164 0x4>;

View file

@ -109,7 +109,7 @@ ethernet@f0ba0000 {
reg = <0xf0ba0000 0xfc4c>;
interrupts = <0x0 0x18 0x0>, <0x0 0x19 0x0>;
mdio@0e14 {
mdio@e14 {
compatible = "brcm,genet-mdio-v4";
#address-cells = <0x1>;
#size-cells = <0x0>;

View file

@ -45,7 +45,7 @@ Required properties:
Example:
SoC dtsi:
m_can1: can@020e8000 {
m_can1: can@20e8000 {
compatible = "bosch,m_can";
reg = <0x020e8000 0x4000>, <0x02298000 0x4000>;
reg-names = "m_can", "message_ram";

View file

@ -19,7 +19,7 @@ SoC common .dtsi file:
allwinner,pull = <0>;
};
...
can0: can@01c2bc00 {
can0: can@1c2bc00 {
compatible = "allwinner,sun4i-a10-can";
reg = <0x01c2bc00 0x400>;
interrupts = <0 26 4>;
@ -29,7 +29,7 @@ SoC common .dtsi file:
Board specific .dts file:
can0: can@01c2bc00 {
can0: can@1c2bc00 {
pinctrl-names = "default";
pinctrl-0 = <&can0_pins_a>;
status = "okay";

View file

@ -20,7 +20,7 @@ Optional properties:
Example:
mmc3: mmc@01c12000 {
mmc3: mmc@1c12000 {
#address-cells = <1>;
#size-cells = <0>;

View file

@ -13,13 +13,13 @@ Are child nodes of qfprom, bindings of which as described in
bindings/nvmem/nvmem.txt
Example for sun4i:
sid@01c23800 {
sid@1c23800 {
compatible = "allwinner,sun4i-a10-sid";
reg = <0x01c23800 0x10>
};
Example for sun7i:
sid@01c23800 {
sid@1c23800 {
compatible = "allwinner,sun7i-a20-sid";
reg = <0x01c23800 0x200>
};

View file

@ -10,7 +10,7 @@ Required Properties:
Example:
otp: otp@0301c800 {
otp: otp@301c800 {
compatible = "brcm,ocotp";
reg = <0x0301c800 0x2c>;
brcm,ocotp-size = <2048>;

View file

@ -19,7 +19,7 @@ Optional properties:
Example:
ocotp: ocotp@021bc000 {
ocotp: ocotp@21bc000 {
compatible = "fsl,imx6q-ocotp", "syscon";
reg = <0x021bc000 0x4000>;
clocks = <&clks IMX6QDL_CLK_IIM>;

View file

@ -33,7 +33,7 @@ bits: Is pair of bit location and number of bits, which specifies offset
For example:
/* Provider */
qfprom: qfprom@00700000 {
qfprom: qfprom@700000 {
...
/* Data cells */

View file

@ -12,7 +12,7 @@ bindings/nvmem/nvmem.txt
Example:
qfprom: qfprom@00700000 {
qfprom: qfprom@700000 {
compatible = "qcom,qfprom";
reg = <0x00700000 0x8000>;
...

View file

@ -255,7 +255,7 @@ Tegra30:
SoC DTSI:
pcie-controller@00003000 {
pcie-controller@3000 {
compatible = "nvidia,tegra30-pcie";
device_type = "pci";
reg = <0x00003000 0x00000800 /* PADS registers */
@ -334,7 +334,7 @@ SoC DTSI:
Board DTS:
pcie-controller@00003000 {
pcie-controller@3000 {
status = "okay";
avdd-pexa-supply = <&ldo1_reg>;
@ -360,7 +360,7 @@ Tegra124:
SoC DTSI:
pcie-controller@01003000 {
pcie-controller@1003000 {
compatible = "nvidia,tegra124-pcie";
device_type = "pci";
reg = <0x0 0x01003000 0x0 0x00000800 /* PADS registers */
@ -425,7 +425,7 @@ SoC DTSI:
Board DTS:
pcie-controller@01003000 {
pcie-controller@1003000 {
status = "okay";
avddio-pex-supply = <&vdd_1v05_run>;
@ -456,7 +456,7 @@ Tegra210:
SoC DTSI:
pcie-controller@01003000 {
pcie-controller@1003000 {
compatible = "nvidia,tegra210-pcie";
device_type = "pci";
reg = <0x0 0x01003000 0x0 0x00000800 /* PADS registers */
@ -521,7 +521,7 @@ SoC DTSI:
Board DTS:
pcie-controller@01003000 {
pcie-controller@1003000 {
status = "okay";
avdd-pll-uerefe-supply = <&avdd_1v05_pll>;

View file

@ -15,7 +15,7 @@ Required properties For the child node:
- #phy-cells: must be 0
Example:
pcie_phy: phy@0301d0a0 {
pcie_phy: phy@301d0a0 {
compatible = "brcm,cygnus-pcie-phy";
reg = <0x0301d0a0 0x14>;

View file

@ -23,7 +23,7 @@ Optional properties:
the 17.78mA TX reference current. Default: 100
Example:
usbphy1: usbphy@020c9000 {
usbphy1: usbphy@20c9000 {
compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
reg = <0x020c9000 0x1000>;
interrupts = <0 44 0x04>;

View file

@ -25,7 +25,7 @@ It is recommended to list all clocks and resets available.
The driver will only use those matching the phy_type.
Example:
usbphy1: phy@00a01800 {
usbphy1: phy@a01800 {
compatible = "allwinner,sun9i-a80-usb-phy";
reg = <0x00a01800 0x4>;
clocks = <&usb_phy_clk 2>, <&usb_phy_clk 10>,

View file

@ -89,7 +89,7 @@ Optional subnode-properties:
Examples:
pio: pinctrl@01c20800 {
pio: pinctrl@1c20800 {
compatible = "allwinner,sun5i-a13-pinctrl";
reg = <0x01c20800 0x400>;
#address-cells = <1>;

View file

@ -58,14 +58,14 @@ Some requirements for using fsl,imx-pinctrl binding:
configurations by referring to the phandle of that pin configuration node.
Examples:
usdhc@0219c000 { /* uSDHC4 */
usdhc@219c000 { /* uSDHC4 */
non-removable;
vmmc-supply = <&reg_3p3v>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc4_1>;
};
iomuxc@020e0000 {
iomuxc@20e0000 {
compatible = "fsl,imx6q-iomuxc";
reg = <0x020e0000 0x4000>;

View file

@ -89,7 +89,7 @@ Valid values for pin and group names are:
Example:
pinctrl_pdc: pinctrl@02006500 {
pinctrl_pdc: pinctrl@2006500 {
#gpio-range-cells = <3>;
compatible = "img,tz1090-pdc-pinctrl";
reg = <0x02006500 0x100>;
@ -121,7 +121,7 @@ Example board file extracts:
};
};
ir: ir@02006200 {
ir: ir@2006200 {
pinctrl-names = "default";
pinctrl-0 = <&irmod_default>;
};

View file

@ -197,7 +197,7 @@ Valid values for pin and group names are:
Example:
pinctrl: pinctrl@02005800 {
pinctrl: pinctrl@2005800 {
#gpio-range-cells = <3>;
compatible = "img,tz1090-pinctrl";
reg = <0x02005800 0xe4>;
@ -221,7 +221,7 @@ Example board file extract:
};
};
uart@02004b00 {
uart@2004b00 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_default>;
};

View file

@ -97,7 +97,7 @@ SoC file extract:
Board file extract:
-------------------
pcie-controller@01003000 {
pcie-controller@1003000 {
...
phys = <&padctl 0>;

View file

@ -86,7 +86,7 @@ Examples:
reg = <0 0x1020C020 0 0x1000>;
};
pinctrl@01c20800 {
pinctrl@1c20800 {
compatible = "mediatek,mt8135-pinctrl";
reg = <0 0x1000B000 0 0x1000>;
mediatek,pctl-regmap = <&syscfg_pctl_a &syscfg_pctl_b>;

View file

@ -89,7 +89,7 @@ Example:
interrupt-names = "irqmux";
ranges = <0 0x09610000 0x6000>;
pio0: gpio@09610000 {
pio0: gpio@9610000 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;

View file

@ -175,7 +175,7 @@ to specify in a pin configuration subnode:
Example:
tlmm: pinctrl@01010000 {
tlmm: pinctrl@1010000 {
compatible = "qcom,msm8996-pinctrl";
reg = <0x01010000 0x300000>;
interrupts = <0 208 0>;

View file

@ -40,7 +40,7 @@ Optional properties:
Example:
gpc: gpc@020dc000 {
gpc: gpc@20dc000 {
compatible = "fsl,imx6q-gpc";
reg = <0x020dc000 0x4000>;
interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>,
@ -80,7 +80,7 @@ that is a phandle pointing to the power domain the device belongs to.
Example of a device that is part of the PU power domain:
vpu: vpu@02040000 {
vpu: vpu@2040000 {
reg = <0x02040000 0x3c000>;
/* ... */
power-domains = <&pd_pu>;

View file

@ -10,7 +10,7 @@ Required Properties:
-reg: Specifies the physical address of the SNVS_LPCR register
Example:
snvs@020cc000 {
snvs@20cc000 {
compatible = "fsl,sec-v4.0-mon", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;

View file

@ -37,12 +37,12 @@ Example 1:
Setup keystone reset so that in case software reset or
WDT0 is triggered it issues hard reset for SoC.
pllctrl: pll-controller@02310000 {
pllctrl: pll-controller@2310000 {
compatible = "ti,keystone-pllctrl", "syscon";
reg = <0x02310000 0x200>;
};
devctrl: device-state-control@02620000 {
devctrl: device-state-control@2620000 {
compatible = "ti,keystone-devctrl", "syscon";
reg = <0x02620000 0x1000>;
};

View file

@ -8,7 +8,7 @@ Required properties:
Example:
mcu@0a {
mcu@a {
#gpio-cells = <2>;
compatible = "fsl,mc9s08qg8-mpc8349emitx",
"fsl,mcu-mpc8349emitx";

View file

@ -14,7 +14,7 @@ Required properties:
Example:
pwm: pwm@01c20e00 {
pwm: pwm@1c20e00 {
compatible = "allwinner,sun7i-a20-pwm";
reg = <0x01c20e00 0xc>;
clocks = <&osc24M>;

View file

@ -40,7 +40,7 @@ to get matched with their hardware counterparts as follow:
Example:
max77686: pmic@09 {
max77686: pmic@9 {
compatible = "maxim,max77686";
interrupt-parent = <&wakeup_eint>;
interrupts = <26 IRQ_TYPE_NONE>;

View file

@ -71,7 +71,7 @@ has not been disabled for that state using "regulator-off-in-suspend".
Example:
max77802@09 {
max77802@9 {
compatible = "maxim,max77802";
interrupt-parent = <&wakeup_eint>;
interrupts = <26 0>;

View file

@ -14,7 +14,7 @@ Required properties:
example:
ahb1_rst: reset@01c202c0 {
ahb1_rst: reset@1c202c0 {
#reset-cells = <1>;
compatible = "allwinner,sun6i-a31-ahb1-reset";
reg = <0x01c202c0 0xc>;

View file

@ -14,7 +14,7 @@ Required properties:
example:
src: src@020d8000 {
src: src@20d8000 {
compatible = "fsl,imx6q-src";
reg = <0x020d8000 0x4000>;
interrupts = <0 91 0x04 0 96 0x04>;
@ -33,10 +33,10 @@ reset.txt
example:
ipu1: ipu@02400000 {
ipu1: ipu@2400000 {
resets = <&src 2>;
};
ipu2: ipu@02800000 {
ipu2: ipu@2800000 {
resets = <&src 4>;
};

View file

@ -67,7 +67,7 @@ using the syscon node, and a consumer (a DSP device) on the TI Keystone 2
/ {
soc {
psc: power-sleep-controller@02350000 {
psc: power-sleep-controller@2350000 {
compatible = "syscon", "simple-mfd";
reg = <0x02350000 0x1000>;

View file

@ -17,7 +17,7 @@ Required properties for new device trees
Example:
rtc: rtc@01f00000 {
rtc: rtc@1f00000 {
compatible = "allwinner,sun6i-a31-rtc";
reg = <0x01f00000 0x54>;
interrupts = <0 40 4>, <0 41 4>;

View file

@ -10,7 +10,7 @@ Required properties:
Example:
rtc: rtc@01c20d00 {
rtc: rtc@1c20d00 {
compatible = "allwinner,sun4i-a10-rtc";
reg = <0x01c20d00 0x20>;
interrupts = <24>;

View file

@ -18,7 +18,7 @@ par_io@1400 {
#size-cells = <0>;
device_type = "par_io";
num-ports = <7>;
ucc_pin@01 {
ucc_pin@1 {
......
};

View file

@ -26,7 +26,7 @@ Required properties:
interrupts.
Example:
ucc_pin@01 {
ucc_pin@1 {
pio-map = <
/* port pin dir open_drain assignment has_irq */
0 3 1 0 1 0 /* TxD0 */

View file

@ -51,7 +51,7 @@ of valid identifiers for k2g.
Example (K2G):
--------------------
uart0: serial@02530c00 {
uart0: serial@2530c00 {
compatible = "ns16550a";
...
power-domains = <&k2g_pds 0x002c>;

View file

@ -9,7 +9,7 @@ Required properties:
Examples:
i2s0: xtfpga-i2s@0d080000 {
i2s0: xtfpga-i2s@d080000 {
#sound-dai-cells = <0>;
compatible = "cdns,xtfpga-i2s";
reg = <0x0d080000 0x40>;

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