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mmc: cavium: Support DDR mode for eMMC devices

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Add support for switching to DDR mode for eMMC devices.

Signed-off-by: Jan Glauber <jglauber@cavium.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This commit is contained in:
Jan Glauber 2017-03-30 17:31:27 +02:00 committed by Ulf Hansson
parent cd76e5c565
commit 4ce944074e
1 changed files with 11 additions and 1 deletions
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12
drivers/mmc/host/cavium.c
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@ -864,6 +864,10 @@ static void cvm_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
break;
}
/* DDR is available for 4/8 bit bus width */
if (ios->bus_width && ios->timing == MMC_TIMING_MMC_DDR52)
bus_width |= 4;
/* Change the clock frequency. */
clock = ios->clock;
if (clock > 52000000)
@ -1032,8 +1036,14 @@ int cvm_mmc_of_slot_probe(struct device *dev, struct cvm_mmc_host *host)
/* Set up host parameters */
mmc->ops = &cvm_mmc_ops;
/*
* We only have a 3.3v supply, we cannot support any
* of the UHS modes. We do support the high speed DDR
* modes up to 52MHz.
*/
mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
MMC_CAP_ERASE | MMC_CAP_CMD23 | MMC_CAP_POWER_OFF_CARD;
MMC_CAP_ERASE | MMC_CAP_CMD23 | MMC_CAP_POWER_OFF_CARD |
MMC_CAP_3_3V_DDR;
if (host->use_sg)
mmc->max_segs = 16;