PCI: mobiveil: Add upper 32-bit PCI base address setup in inbound window
Current code erroneously sets-up the lower 32-bit PCI base address in
the inbound window, which results in inbound transactions not working in
64-bit platforms.
Fixes: 9af6bcb11e
("PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP driver")
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Reviewed-by: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in>
This commit is contained in:
parent
6f7374b871
commit
4e00aca3ba
1 changed files with 6 additions and 3 deletions
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@ -457,7 +457,7 @@ static int mobiveil_pcie_parse_dt(struct mobiveil_pcie *pcie)
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}
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static void program_ib_windows(struct mobiveil_pcie *pcie, int win_num,
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int pci_addr, u32 type, u64 size)
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u64 pci_addr, u32 type, u64 size)
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{
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u32 value;
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u64 size64 = ~(size - 1);
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@ -483,8 +483,11 @@ static void program_ib_windows(struct mobiveil_pcie *pcie, int win_num,
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csr_writel(pcie, pci_addr, PAB_PEX_AMAP_AXI_WIN(win_num));
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csr_writel(pcie, pci_addr, PAB_PEX_AMAP_PEX_WIN_L(win_num));
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csr_writel(pcie, 0, PAB_PEX_AMAP_PEX_WIN_H(win_num));
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csr_writel(pcie, lower_32_bits(pci_addr),
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PAB_PEX_AMAP_PEX_WIN_L(win_num));
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csr_writel(pcie, upper_32_bits(pci_addr),
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PAB_PEX_AMAP_PEX_WIN_H(win_num));
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pcie->ib_wins_configured++;
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}
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