This pull request fixes GPU reset (which was disabled shortly after
V3D integration due to build breakage) and waits for idle in the presence of signals (which X likes to do a lot). -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABCgAGBQJWxNTWAAoJELXWKTbR/J7oJl4P/AouaCmV5G3P0x+s/qiWY7ZY ppSFTyNI5sw25m4Ag/5hIqMkSbgj72o7lacpNk2Jt3qudOVDNzLeujjabHHvA6pK FOXq1IadYdidsnhgWr7GB1aB9tSsSzLEfNw/2JKilzGQUlkebQuGK1cLFZSowcRy dYo4RaFJJ4ucFAIf2rkdhemfPRLfPSB2P6DUZURMprFO1xj/m7eOfiVgcLDPUtBS WvuDEFL+7YVP92tlxwlPQ7Gmz5DgnSoIn9aS8j0YDlRTPZ9bXsMz/VEjIKK90Ea4 qV+UE+DPkay8632fKdDaLzajyCqGoi7RW0XQFxSdfHGrJm2C8miMlg39ht7ylpVv djwatw/BO/wDh9NWUftkq0ByUA8OqGelTq+jlR5EwEkNN3WoGjsh7+VPd+4Fdkoc tH+YQOMX/2DE6v3y1hePqzGSeAn+HmggYWOqsevmZ0Q8xKLM2xEdIZ6USTZMFRXH SkUvE9miJqMuroRCtB8k/9QSbLzCGla1liC01XvOTU2AqoJe1WBHJOB3Oj1HcFhK oipWy28O9A4YByobQvG6SdadfbGfaViWWTidcchxj/USiPqqBTyi/CPQMKhpOpA5 PcQgXLGPeolwjUYobhGJmTfyPjILkprYNFXuFmoYkLtqHsRxhezfIQvylXLD1GrO UPfH0YAYypTi1w+O8t2N =fLU7 -----END PGP SIGNATURE----- Merge tag 'drm-vc4-fixes-2016-02-17' of github.com:anholt/linux into drm-fixes This pull request fixes GPU reset (which was disabled shortly after V3D integration due to build breakage) and waits for idle in the presence of signals (which X likes to do a lot). * tag 'drm-vc4-fixes-2016-02-17' of github.com:anholt/linux: drm/vc4: Use runtime PM to power cycle the device when the GPU hangs. drm/vc4: Enable runtime PM. drm/vc4: Fix spurious GPU resets due to BO reuse. drm/vc4: Drop error message on seqno wait timeouts. drm/vc4: Fix -ERESTARTSYS error return from BO waits. drm/vc4: Return an ERR_PTR from BO creation instead of NULL. drm/vc4: Fix the clear color for the first tile rendered. drm/vc4: Validate that WAIT_BO padding is cleared.
This commit is contained in:
Dave Airlie
commit
5441ea115e
7 changed files with 118 additions and 52 deletions
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@ -215,7 +215,7 @@ struct vc4_bo *vc4_bo_create(struct drm_device *dev, size_t unaligned_size,
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struct drm_gem_cma_object *cma_obj;
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if (size == 0)
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return NULL;
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return ERR_PTR(-EINVAL);
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/* First, try to get a vc4_bo from the kernel BO cache. */
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if (from_cache) {
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@ -237,7 +237,7 @@ struct vc4_bo *vc4_bo_create(struct drm_device *dev, size_t unaligned_size,
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if (IS_ERR(cma_obj)) {
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DRM_ERROR("Failed to allocate from CMA:\n");
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vc4_bo_stats_dump(vc4);
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return NULL;
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return ERR_PTR(-ENOMEM);
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}
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}
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@ -259,8 +259,8 @@ int vc4_dumb_create(struct drm_file *file_priv,
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args->size = args->pitch * args->height;
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bo = vc4_bo_create(dev, args->size, false);
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if (!bo)
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return -ENOMEM;
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if (IS_ERR(bo))
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return PTR_ERR(bo);
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ret = drm_gem_handle_create(file_priv, &bo->base.base, &args->handle);
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drm_gem_object_unreference_unlocked(&bo->base.base);
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@ -443,8 +443,8 @@ int vc4_create_bo_ioctl(struct drm_device *dev, void *data,
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* get zeroed, and that might leak data between users.
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*/
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bo = vc4_bo_create(dev, args->size, false);
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if (!bo)
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return -ENOMEM;
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if (IS_ERR(bo))
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return PTR_ERR(bo);
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ret = drm_gem_handle_create(file_priv, &bo->base.base, &args->handle);
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drm_gem_object_unreference_unlocked(&bo->base.base);
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@ -496,8 +496,8 @@ vc4_create_shader_bo_ioctl(struct drm_device *dev, void *data,
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}
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bo = vc4_bo_create(dev, args->size, true);
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if (!bo)
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return -ENOMEM;
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if (IS_ERR(bo))
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return PTR_ERR(bo);
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ret = copy_from_user(bo->base.vaddr,
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(void __user *)(uintptr_t)args->data,
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@ -91,8 +91,12 @@ struct vc4_dev {
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struct vc4_bo *overflow_mem;
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struct work_struct overflow_mem_work;
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int power_refcount;
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/* Mutex controlling the power refcount. */
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struct mutex power_lock;
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struct {
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uint32_t last_ct0ca, last_ct1ca;
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struct timer_list timer;
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struct work_struct reset_work;
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} hangcheck;
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@ -142,6 +146,7 @@ struct vc4_seqno_cb {
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};
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struct vc4_v3d {
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struct vc4_dev *vc4;
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struct platform_device *pdev;
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void __iomem *regs;
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};
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@ -192,6 +197,11 @@ struct vc4_exec_info {
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/* Sequence number for this bin/render job. */
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uint64_t seqno;
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/* Last current addresses the hardware was processing when the
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* hangcheck timer checked on us.
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*/
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uint32_t last_ct0ca, last_ct1ca;
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/* Kernel-space copy of the ioctl arguments */
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struct drm_vc4_submit_cl *args;
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@ -434,7 +444,6 @@ void vc4_plane_async_set_fb(struct drm_plane *plane,
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extern struct platform_driver vc4_v3d_driver;
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int vc4_v3d_debugfs_ident(struct seq_file *m, void *unused);
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int vc4_v3d_debugfs_regs(struct seq_file *m, void *unused);
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int vc4_v3d_set_power(struct vc4_dev *vc4, bool on);
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/* vc4_validate.c */
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int
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@ -23,6 +23,7 @@
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/device.h>
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#include <linux/io.h>
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@ -228,8 +229,16 @@ vc4_reset(struct drm_device *dev)
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struct vc4_dev *vc4 = to_vc4_dev(dev);
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DRM_INFO("Resetting GPU.\n");
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vc4_v3d_set_power(vc4, false);
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vc4_v3d_set_power(vc4, true);
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mutex_lock(&vc4->power_lock);
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if (vc4->power_refcount) {
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/* Power the device off and back on the by dropping the
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* reference on runtime PM.
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*/
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pm_runtime_put_sync_suspend(&vc4->v3d->pdev->dev);
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pm_runtime_get_sync(&vc4->v3d->pdev->dev);
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}
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mutex_unlock(&vc4->power_lock);
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vc4_irq_reset(dev);
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@ -257,10 +266,17 @@ vc4_hangcheck_elapsed(unsigned long data)
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struct drm_device *dev = (struct drm_device *)data;
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struct vc4_dev *vc4 = to_vc4_dev(dev);
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uint32_t ct0ca, ct1ca;
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unsigned long irqflags;
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struct vc4_exec_info *exec;
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spin_lock_irqsave(&vc4->job_lock, irqflags);
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exec = vc4_first_job(vc4);
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/* If idle, we can stop watching for hangs. */
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if (list_empty(&vc4->job_list))
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if (!exec) {
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spin_unlock_irqrestore(&vc4->job_lock, irqflags);
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return;
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}
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ct0ca = V3D_READ(V3D_CTNCA(0));
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ct1ca = V3D_READ(V3D_CTNCA(1));
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@ -268,14 +284,16 @@ vc4_hangcheck_elapsed(unsigned long data)
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/* If we've made any progress in execution, rearm the timer
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* and wait.
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*/
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if (ct0ca != vc4->hangcheck.last_ct0ca ||
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ct1ca != vc4->hangcheck.last_ct1ca) {
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vc4->hangcheck.last_ct0ca = ct0ca;
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vc4->hangcheck.last_ct1ca = ct1ca;
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if (ct0ca != exec->last_ct0ca || ct1ca != exec->last_ct1ca) {
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exec->last_ct0ca = ct0ca;
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exec->last_ct1ca = ct1ca;
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spin_unlock_irqrestore(&vc4->job_lock, irqflags);
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vc4_queue_hangcheck(dev);
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return;
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}
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spin_unlock_irqrestore(&vc4->job_lock, irqflags);
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/* We've gone too long with no progress, reset. This has to
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* be done from a work struct, since resetting can sleep and
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* this timer hook isn't allowed to.
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@ -340,12 +358,7 @@ vc4_wait_for_seqno(struct drm_device *dev, uint64_t seqno, uint64_t timeout_ns,
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finish_wait(&vc4->job_wait_queue, &wait);
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trace_vc4_wait_for_seqno_end(dev, seqno);
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if (ret && ret != -ERESTARTSYS) {
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DRM_ERROR("timeout waiting for render thread idle\n");
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return ret;
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}
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return 0;
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return ret;
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}
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static void
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@ -578,9 +591,9 @@ vc4_get_bcl(struct drm_device *dev, struct vc4_exec_info *exec)
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}
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bo = vc4_bo_create(dev, exec_size, true);
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if (!bo) {
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if (IS_ERR(bo)) {
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DRM_ERROR("Couldn't allocate BO for binning\n");
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ret = -ENOMEM;
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ret = PTR_ERR(bo);
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goto fail;
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}
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exec->exec_bo = &bo->base;
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@ -617,6 +630,7 @@ fail:
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static void
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vc4_complete_exec(struct drm_device *dev, struct vc4_exec_info *exec)
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{
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struct vc4_dev *vc4 = to_vc4_dev(dev);
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unsigned i;
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/* Need the struct lock for drm_gem_object_unreference(). */
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@ -635,6 +649,11 @@ vc4_complete_exec(struct drm_device *dev, struct vc4_exec_info *exec)
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}
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mutex_unlock(&dev->struct_mutex);
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mutex_lock(&vc4->power_lock);
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if (--vc4->power_refcount == 0)
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pm_runtime_put(&vc4->v3d->pdev->dev);
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mutex_unlock(&vc4->power_lock);
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kfree(exec);
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}
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@ -746,6 +765,9 @@ vc4_wait_bo_ioctl(struct drm_device *dev, void *data,
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struct drm_gem_object *gem_obj;
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struct vc4_bo *bo;
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if (args->pad != 0)
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return -EINVAL;
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gem_obj = drm_gem_object_lookup(dev, file_priv, args->handle);
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if (!gem_obj) {
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DRM_ERROR("Failed to look up GEM BO %d\n", args->handle);
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@ -772,7 +794,7 @@ vc4_submit_cl_ioctl(struct drm_device *dev, void *data,
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struct vc4_dev *vc4 = to_vc4_dev(dev);
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struct drm_vc4_submit_cl *args = data;
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struct vc4_exec_info *exec;
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int ret;
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int ret = 0;
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if ((args->flags & ~VC4_SUBMIT_CL_USE_CLEAR_COLOR) != 0) {
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DRM_ERROR("Unknown flags: 0x%02x\n", args->flags);
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@ -785,6 +807,15 @@ vc4_submit_cl_ioctl(struct drm_device *dev, void *data,
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return -ENOMEM;
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}
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mutex_lock(&vc4->power_lock);
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if (vc4->power_refcount++ == 0)
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ret = pm_runtime_get_sync(&vc4->v3d->pdev->dev);
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mutex_unlock(&vc4->power_lock);
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if (ret < 0) {
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kfree(exec);
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return ret;
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}
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exec->args = args;
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INIT_LIST_HEAD(&exec->unref_list);
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@ -839,6 +870,8 @@ vc4_gem_init(struct drm_device *dev)
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(unsigned long)dev);
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INIT_WORK(&vc4->job_done_work, vc4_job_done_work);
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mutex_init(&vc4->power_lock);
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}
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void
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@ -57,7 +57,7 @@ vc4_overflow_mem_work(struct work_struct *work)
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struct vc4_bo *bo;
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bo = vc4_bo_create(dev, 256 * 1024, true);
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if (!bo) {
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if (IS_ERR(bo)) {
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DRM_ERROR("Couldn't allocate binner overflow mem\n");
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return;
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}
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@ -316,20 +316,11 @@ static int vc4_create_rcl_bo(struct drm_device *dev, struct vc4_exec_info *exec,
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size += xtiles * ytiles * loop_body_size;
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setup->rcl = &vc4_bo_create(dev, size, true)->base;
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if (!setup->rcl)
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return -ENOMEM;
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if (IS_ERR(setup->rcl))
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return PTR_ERR(setup->rcl);
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list_add_tail(&to_vc4_bo(&setup->rcl->base)->unref_head,
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&exec->unref_list);
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rcl_u8(setup, VC4_PACKET_TILE_RENDERING_MODE_CONFIG);
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rcl_u32(setup,
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(setup->color_write ? (setup->color_write->paddr +
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args->color_write.offset) :
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0));
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rcl_u16(setup, args->width);
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rcl_u16(setup, args->height);
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rcl_u16(setup, args->color_write.bits);
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/* The tile buffer gets cleared when the previous tile is stored. If
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* the clear values changed between frames, then the tile buffer has
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* stale clear values in it, so we have to do a store in None mode (no
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@ -349,6 +340,15 @@ static int vc4_create_rcl_bo(struct drm_device *dev, struct vc4_exec_info *exec,
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rcl_u32(setup, 0); /* no address, since we're in None mode */
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}
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rcl_u8(setup, VC4_PACKET_TILE_RENDERING_MODE_CONFIG);
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rcl_u32(setup,
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(setup->color_write ? (setup->color_write->paddr +
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args->color_write.offset) :
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0));
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rcl_u16(setup, args->width);
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rcl_u16(setup, args->height);
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rcl_u16(setup, args->color_write.bits);
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for (y = min_y_tile; y <= max_y_tile; y++) {
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for (x = min_x_tile; x <= max_x_tile; x++) {
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bool first = (x == min_x_tile && y == min_y_tile);
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@ -17,6 +17,7 @@
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*/
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#include "linux/component.h"
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#include "linux/pm_runtime.h"
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#include "vc4_drv.h"
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#include "vc4_regs.h"
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@ -144,18 +145,6 @@ int vc4_v3d_debugfs_ident(struct seq_file *m, void *unused)
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}
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#endif /* CONFIG_DEBUG_FS */
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|
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int
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vc4_v3d_set_power(struct vc4_dev *vc4, bool on)
|
||||
{
|
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/* XXX: This interface is needed for GPU reset, and the way to
|
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* do it is to turn our power domain off and back on. We
|
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* can't just reset from within the driver, because the reset
|
||||
* bits are in the power domain's register area, and get set
|
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* during the poweron process.
|
||||
*/
|
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return 0;
|
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}
|
||||
|
||||
static void vc4_v3d_init_hw(struct drm_device *dev)
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||||
{
|
||||
struct vc4_dev *vc4 = to_vc4_dev(dev);
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||||
|
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@ -167,6 +156,29 @@ static void vc4_v3d_init_hw(struct drm_device *dev)
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V3D_WRITE(V3D_VPMBASE, 0);
|
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}
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|
||||
#ifdef CONFIG_PM
|
||||
static int vc4_v3d_runtime_suspend(struct device *dev)
|
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{
|
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struct vc4_v3d *v3d = dev_get_drvdata(dev);
|
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struct vc4_dev *vc4 = v3d->vc4;
|
||||
|
||||
vc4_irq_uninstall(vc4->dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int vc4_v3d_runtime_resume(struct device *dev)
|
||||
{
|
||||
struct vc4_v3d *v3d = dev_get_drvdata(dev);
|
||||
struct vc4_dev *vc4 = v3d->vc4;
|
||||
|
||||
vc4_v3d_init_hw(vc4->dev);
|
||||
vc4_irq_postinstall(vc4->dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static int vc4_v3d_bind(struct device *dev, struct device *master, void *data)
|
||||
{
|
||||
struct platform_device *pdev = to_platform_device(dev);
|
||||
|
|
@ -179,6 +191,8 @@ static int vc4_v3d_bind(struct device *dev, struct device *master, void *data)
|
|||
if (!v3d)
|
||||
return -ENOMEM;
|
||||
|
||||
dev_set_drvdata(dev, v3d);
|
||||
|
||||
v3d->pdev = pdev;
|
||||
|
||||
v3d->regs = vc4_ioremap_regs(pdev, 0);
|
||||
|
|
@ -186,6 +200,7 @@ static int vc4_v3d_bind(struct device *dev, struct device *master, void *data)
|
|||
return PTR_ERR(v3d->regs);
|
||||
|
||||
vc4->v3d = v3d;
|
||||
v3d->vc4 = vc4;
|
||||
|
||||
if (V3D_READ(V3D_IDENT0) != V3D_EXPECTED_IDENT0) {
|
||||
DRM_ERROR("V3D_IDENT0 read 0x%08x instead of 0x%08x\n",
|
||||
|
|
@ -207,6 +222,8 @@ static int vc4_v3d_bind(struct device *dev, struct device *master, void *data)
|
|||
return ret;
|
||||
}
|
||||
|
||||
pm_runtime_enable(dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -216,6 +233,8 @@ static void vc4_v3d_unbind(struct device *dev, struct device *master,
|
|||
struct drm_device *drm = dev_get_drvdata(master);
|
||||
struct vc4_dev *vc4 = to_vc4_dev(drm);
|
||||
|
||||
pm_runtime_disable(dev);
|
||||
|
||||
drm_irq_uninstall(drm);
|
||||
|
||||
/* Disable the binner's overflow memory address, so the next
|
||||
|
|
@ -228,6 +247,10 @@ static void vc4_v3d_unbind(struct device *dev, struct device *master,
|
|||
vc4->v3d = NULL;
|
||||
}
|
||||
|
||||
static const struct dev_pm_ops vc4_v3d_pm_ops = {
|
||||
SET_RUNTIME_PM_OPS(vc4_v3d_runtime_suspend, vc4_v3d_runtime_resume, NULL)
|
||||
};
|
||||
|
||||
static const struct component_ops vc4_v3d_ops = {
|
||||
.bind = vc4_v3d_bind,
|
||||
.unbind = vc4_v3d_unbind,
|
||||
|
|
@ -255,5 +278,6 @@ struct platform_driver vc4_v3d_driver = {
|
|||
.driver = {
|
||||
.name = "vc4_v3d",
|
||||
.of_match_table = vc4_v3d_dt_match,
|
||||
.pm = &vc4_v3d_pm_ops,
|
||||
},
|
||||
};
|
||||
|
|
|
|||
|
|
@ -401,8 +401,8 @@ validate_tile_binning_config(VALIDATE_ARGS)
|
|||
tile_bo = vc4_bo_create(dev, exec->tile_alloc_offset + tile_alloc_size,
|
||||
true);
|
||||
exec->tile_bo = &tile_bo->base;
|
||||
if (!exec->tile_bo)
|
||||
return -ENOMEM;
|
||||
if (IS_ERR(exec->tile_bo))
|
||||
return PTR_ERR(exec->tile_bo);
|
||||
list_add_tail(&tile_bo->unref_head, &exec->unref_list);
|
||||
|
||||
/* tile alloc address. */
|
||||
|
|
|
|||
Loading…
Reference in a new issue