Merge remote-tracking branches 'regulator/topic/gpio', 'regulator/topic/lp873x', 'regulator/topic/max77620', 'regulator/topic/pwm' and 'regulator/topic/tps6507x' into regulator-next
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commit
56e3d92ddb
8 changed files with 78 additions and 7 deletions
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@ -7,6 +7,9 @@ Required properties:
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- #gpio-cells: Should be two. The first cell is the pin number and
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the second cell is used to specify flags.
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See ../gpio/gpio.txt for more information.
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- xxx-in-supply: Phandle to parent supply node of each regulator
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populated under regulators node. xxx can be
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buck0, buck1, ldo0 or ldo1.
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- regulators: List of child nodes that specify the regulator
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initialization data.
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Example:
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@ -17,6 +20,11 @@ pmic: lp8733@60 {
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gpio-controller;
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#gpio-cells = <2>;
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buck0-in-supply = <&vsys_3v3>;
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buck1-in-supply = <&vsys_3v3>;
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ldo0-in-supply = <&vsys_3v3>;
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ldo1-in-supply = <&vsys_3v3>;
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regulators {
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lp8733_buck0: buck0 {
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regulator-name = "lp8733-buck0";
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@ -106,6 +106,18 @@ Here supported time periods by device in microseconds are as follows:
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MAX77620 supports 40, 80, 160, 320, 640, 1280, 2560 and 5120 microseconds.
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MAX20024 supports 20, 40, 80, 160, 320, 640, 1280 and 2540 microseconds.
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-maxim,power-ok-control: configure map power ok bit
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1: Enables POK(Power OK) to control nRST_IO and GPIO1
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POK function.
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0: Disables POK control.
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if property missing, do not configure MPOK bit.
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If POK mapping is enabled for GPIO1/nRST_IO then,
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GPIO1/nRST_IO pins are HIGH only if all rails
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that have POK control enabled are HIGH.
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If any of the rails goes down(which are enabled for POK
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control) then, GPIO1/nRST_IO goes LOW.
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this property is valid for max20024 only.
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For DT binding details of different sub modules like GPIO, pincontrol,
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regulator, power, please refer respective device-tree binding document
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under their respective sub-system directories.
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@ -59,7 +59,7 @@ Any property defined as part of the core regulator binding can also be used.
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Continuous Voltage With Enable GPIO Example:
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pwm_regulator {
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compatible = "pwm-regulator;
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compatible = "pwm-regulator";
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pwms = <&pwm1 0 8448 0>;
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enable-gpios = <&gpio0 23 GPIO_ACTIVE_HIGH>;
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regulator-min-microvolt = <1016000>;
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@ -76,7 +76,7 @@ Continuous Voltage With Enable GPIO Example:
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Voltage Table Example:
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pwm_regulator {
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compatible = "pwm-regulator;
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compatible = "pwm-regulator";
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pwms = <&pwm1 0 8448 0>;
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regulator-min-microvolt = <1016000>;
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regulator-max-microvolt = <1114000>;
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@ -162,8 +162,8 @@ of_get_gpio_regulator_config(struct device *dev, struct device_node *np,
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of_property_read_u32(np, "startup-delay-us", &config->startup_delay);
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config->enable_gpio = of_get_named_gpio(np, "enable-gpio", 0);
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if (config->enable_gpio == -EPROBE_DEFER)
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return ERR_PTR(-EPROBE_DEFER);
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if (config->enable_gpio < 0 && config->enable_gpio != -ENOENT)
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return ERR_PTR(config->enable_gpio);
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/* Fetch GPIOs. - optional property*/
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ret = of_gpio_count(np);
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@ -190,8 +190,11 @@ of_get_gpio_regulator_config(struct device *dev, struct device_node *np,
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for (i = 0; i < config->nr_gpios; i++) {
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gpio = of_get_named_gpio(np, "gpios", i);
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if (gpio < 0)
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if (gpio < 0) {
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if (gpio != -ENOENT)
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return ERR_PTR(gpio);
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break;
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}
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config->gpios[i].gpio = gpio;
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if (proplen > 0) {
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of_property_read_u32_index(np, "gpios-states",
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@ -24,6 +24,7 @@
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[_id] = { \
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.desc = { \
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.name = _name, \
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.supply_name = _of "-in", \
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.id = _id, \
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.of_match = of_match_ptr(_of), \
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.regulators_node = of_match_ptr("regulators"),\
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@ -73,7 +73,6 @@ struct max77620_regulator_info {
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};
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struct max77620_regulator_pdata {
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struct regulator_init_data *reg_idata;
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int active_fps_src;
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int active_fps_pd_slot;
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int active_fps_pu_slot;
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@ -81,6 +80,7 @@ struct max77620_regulator_pdata {
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int suspend_fps_pd_slot;
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int suspend_fps_pu_slot;
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int current_mode;
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int power_ok;
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int ramp_rate_setting;
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};
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@ -351,11 +351,48 @@ static int max77620_set_slew_rate(struct max77620_regulator *pmic, int id,
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return 0;
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}
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static int max77620_config_power_ok(struct max77620_regulator *pmic, int id)
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{
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struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[id];
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struct max77620_regulator_info *rinfo = pmic->rinfo[id];
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struct max77620_chip *chip = dev_get_drvdata(pmic->dev->parent);
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u8 val, mask;
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int ret;
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switch (chip->chip_id) {
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case MAX20024:
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if (rpdata->power_ok >= 0) {
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if (rinfo->type == MAX77620_REGULATOR_TYPE_SD)
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mask = MAX20024_SD_CFG1_MPOK_MASK;
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else
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mask = MAX20024_LDO_CFG2_MPOK_MASK;
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val = rpdata->power_ok ? mask : 0;
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ret = regmap_update_bits(pmic->rmap, rinfo->cfg_addr,
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mask, val);
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if (ret < 0) {
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dev_err(pmic->dev, "Reg 0x%02x update failed %d\n",
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rinfo->cfg_addr, ret);
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return ret;
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}
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}
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break;
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default:
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break;
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}
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return 0;
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}
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static int max77620_init_pmic(struct max77620_regulator *pmic, int id)
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{
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struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[id];
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int ret;
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max77620_config_power_ok(pmic, id);
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/* Update power mode */
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ret = max77620_regulator_get_power_mode(pmic, id);
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if (ret < 0)
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@ -595,6 +632,12 @@ static int max77620_of_parse_cb(struct device_node *np,
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np, "maxim,suspend-fps-power-down-slot", &pval);
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rpdata->suspend_fps_pd_slot = (!ret) ? pval : -1;
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ret = of_property_read_u32(np, "maxim,power-ok-control", &pval);
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if (!ret)
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rpdata->power_ok = pval;
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else
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rpdata->power_ok = -1;
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ret = of_property_read_u32(np, "maxim,ramp-rate-setting", &pval);
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rpdata->ramp_rate_setting = (!ret) ? pval : 0;
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@ -807,6 +850,8 @@ static int max77620_regulator_resume(struct device *dev)
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for (id = 0; id < MAX77620_NUM_REGS; id++) {
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reg_pdata = &pmic->reg_pdata[id];
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max77620_config_power_ok(pmic, id);
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max77620_regulator_set_fps_slots(pmic, id, false);
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if (reg_pdata->active_fps_src < 0)
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continue;
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@ -375,7 +375,7 @@ static struct tps6507x_board *tps6507x_parse_dt_reg_data(
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struct device_node *np = pdev->dev.parent->of_node;
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struct device_node *regulators;
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struct of_regulator_match *matches;
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static struct regulator_init_data *reg_data;
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struct regulator_init_data *reg_data;
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int idx = 0, count, ret;
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tps_board = devm_kzalloc(&pdev->dev, sizeof(*tps_board),
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@ -180,6 +180,7 @@
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#define MAX77620_SD_CFG1_FPWM_SD_MASK BIT(2)
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#define MAX77620_SD_CFG1_FPWM_SD_SKIP 0
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#define MAX77620_SD_CFG1_FPWM_SD_FPWM BIT(2)
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#define MAX20024_SD_CFG1_MPOK_MASK BIT(1)
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#define MAX77620_SD_CFG1_FSRADE_SD_MASK BIT(0)
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#define MAX77620_SD_CFG1_FSRADE_SD_DISABLE 0
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#define MAX77620_SD_CFG1_FSRADE_SD_ENABLE BIT(0)
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@ -187,6 +188,7 @@
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/* LDO_CNFG2 */
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#define MAX77620_LDO_POWER_MODE_MASK 0xC0
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#define MAX77620_LDO_POWER_MODE_SHIFT 6
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#define MAX20024_LDO_CFG2_MPOK_MASK BIT(2)
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#define MAX77620_LDO_CFG2_ADE_MASK BIT(1)
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#define MAX77620_LDO_CFG2_ADE_DISABLE 0
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#define MAX77620_LDO_CFG2_ADE_ENABLE BIT(1)
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