Merge branch 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull irq fixes from Ingo Molnar: "Misc irq fixes: - two driver fixes - a Xen regression fix - a nested irq thread crash fix" * 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: irqchip/gicv3-its: Fix mapping of LPIs to collections genirq: Prevent resend to interrupts marked IRQ_NESTED_THREAD genirq: Revert sparse irq locking around __cpu_up() and move it to x86 for now gpio/davinci: Fix race in installing chained irq handler
This commit is contained in:
commit
59ee762156
5 changed files with 101 additions and 54 deletions
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@ -992,8 +992,17 @@ int native_cpu_up(unsigned int cpu, struct task_struct *tidle)
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common_cpu_up(cpu, tidle);
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/*
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* We have to walk the irq descriptors to setup the vector
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* space for the cpu which comes online. Prevent irq
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* alloc/free across the bringup.
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*/
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irq_lock_sparse();
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err = do_boot_cpu(apicid, cpu, tidle);
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if (err) {
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irq_unlock_sparse();
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pr_err("do_boot_cpu failed(%d) to wakeup CPU#%u\n", err, cpu);
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return -EIO;
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}
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@ -1011,6 +1020,8 @@ int native_cpu_up(unsigned int cpu, struct task_struct *tidle)
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touch_nmi_watchdog();
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}
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irq_unlock_sparse();
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return 0;
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}
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@ -578,15 +578,13 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
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writel_relaxed(~0, &g->clr_falling);
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writel_relaxed(~0, &g->clr_rising);
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/* set up all irqs in this bank */
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irq_set_chained_handler(bank_irq, gpio_irq_handler);
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/*
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* Each chip handles 32 gpios, and each irq bank consists of 16
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* gpio irqs. Pass the irq bank's corresponding controller to
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* the chained irq handler.
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*/
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irq_set_handler_data(bank_irq, &chips[gpio / 32]);
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irq_set_chained_handler_and_data(bank_irq, gpio_irq_handler,
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&chips[gpio / 32]);
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binten |= BIT(bank);
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}
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@ -75,6 +75,13 @@ struct its_node {
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#define ITS_ITT_ALIGN SZ_256
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struct event_lpi_map {
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unsigned long *lpi_map;
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u16 *col_map;
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irq_hw_number_t lpi_base;
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int nr_lpis;
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};
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/*
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* The ITS view of a device - belongs to an ITS, a collection, owns an
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* interrupt translation table, and a list of interrupts.
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@ -82,11 +89,8 @@ struct its_node {
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struct its_device {
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struct list_head entry;
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struct its_node *its;
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struct its_collection *collection;
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struct event_lpi_map event_map;
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void *itt;
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unsigned long *lpi_map;
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irq_hw_number_t lpi_base;
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int nr_lpis;
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u32 nr_ites;
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u32 device_id;
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};
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@ -99,6 +103,14 @@ static struct rdists *gic_rdists;
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#define gic_data_rdist() (raw_cpu_ptr(gic_rdists->rdist))
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#define gic_data_rdist_rd_base() (gic_data_rdist()->rd_base)
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static struct its_collection *dev_event_to_col(struct its_device *its_dev,
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u32 event)
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{
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struct its_node *its = its_dev->its;
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return its->collections + its_dev->event_map.col_map[event];
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}
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/*
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* ITS command descriptors - parameters to be encoded in a command
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* block.
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@ -134,7 +146,7 @@ struct its_cmd_desc {
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struct {
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struct its_device *dev;
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struct its_collection *col;
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u32 id;
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u32 event_id;
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} its_movi_cmd;
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struct {
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@ -241,7 +253,7 @@ static struct its_collection *its_build_mapd_cmd(struct its_cmd_block *cmd,
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its_fixup_cmd(cmd);
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return desc->its_mapd_cmd.dev->collection;
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return NULL;
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}
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static struct its_collection *its_build_mapc_cmd(struct its_cmd_block *cmd,
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@ -260,52 +272,72 @@ static struct its_collection *its_build_mapc_cmd(struct its_cmd_block *cmd,
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static struct its_collection *its_build_mapvi_cmd(struct its_cmd_block *cmd,
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struct its_cmd_desc *desc)
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{
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struct its_collection *col;
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col = dev_event_to_col(desc->its_mapvi_cmd.dev,
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desc->its_mapvi_cmd.event_id);
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its_encode_cmd(cmd, GITS_CMD_MAPVI);
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its_encode_devid(cmd, desc->its_mapvi_cmd.dev->device_id);
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its_encode_event_id(cmd, desc->its_mapvi_cmd.event_id);
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its_encode_phys_id(cmd, desc->its_mapvi_cmd.phys_id);
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its_encode_collection(cmd, desc->its_mapvi_cmd.dev->collection->col_id);
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its_encode_collection(cmd, col->col_id);
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its_fixup_cmd(cmd);
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return desc->its_mapvi_cmd.dev->collection;
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return col;
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}
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static struct its_collection *its_build_movi_cmd(struct its_cmd_block *cmd,
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struct its_cmd_desc *desc)
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{
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struct its_collection *col;
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col = dev_event_to_col(desc->its_movi_cmd.dev,
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desc->its_movi_cmd.event_id);
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its_encode_cmd(cmd, GITS_CMD_MOVI);
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its_encode_devid(cmd, desc->its_movi_cmd.dev->device_id);
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its_encode_event_id(cmd, desc->its_movi_cmd.id);
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its_encode_event_id(cmd, desc->its_movi_cmd.event_id);
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its_encode_collection(cmd, desc->its_movi_cmd.col->col_id);
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its_fixup_cmd(cmd);
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return desc->its_movi_cmd.dev->collection;
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return col;
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}
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static struct its_collection *its_build_discard_cmd(struct its_cmd_block *cmd,
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struct its_cmd_desc *desc)
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{
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struct its_collection *col;
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col = dev_event_to_col(desc->its_discard_cmd.dev,
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desc->its_discard_cmd.event_id);
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its_encode_cmd(cmd, GITS_CMD_DISCARD);
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its_encode_devid(cmd, desc->its_discard_cmd.dev->device_id);
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its_encode_event_id(cmd, desc->its_discard_cmd.event_id);
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its_fixup_cmd(cmd);
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return desc->its_discard_cmd.dev->collection;
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return col;
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}
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static struct its_collection *its_build_inv_cmd(struct its_cmd_block *cmd,
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struct its_cmd_desc *desc)
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{
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struct its_collection *col;
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col = dev_event_to_col(desc->its_inv_cmd.dev,
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desc->its_inv_cmd.event_id);
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its_encode_cmd(cmd, GITS_CMD_INV);
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its_encode_devid(cmd, desc->its_inv_cmd.dev->device_id);
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its_encode_event_id(cmd, desc->its_inv_cmd.event_id);
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its_fixup_cmd(cmd);
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return desc->its_inv_cmd.dev->collection;
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return col;
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}
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static struct its_collection *its_build_invall_cmd(struct its_cmd_block *cmd,
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@ -497,7 +529,7 @@ static void its_send_movi(struct its_device *dev,
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desc.its_movi_cmd.dev = dev;
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desc.its_movi_cmd.col = col;
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desc.its_movi_cmd.id = id;
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desc.its_movi_cmd.event_id = id;
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its_send_single_command(dev->its, its_build_movi_cmd, &desc);
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}
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@ -528,7 +560,7 @@ static void its_send_invall(struct its_node *its, struct its_collection *col)
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static inline u32 its_get_event_id(struct irq_data *d)
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{
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struct its_device *its_dev = irq_data_get_irq_chip_data(d);
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return d->hwirq - its_dev->lpi_base;
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return d->hwirq - its_dev->event_map.lpi_base;
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}
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static void lpi_set_config(struct irq_data *d, bool enable)
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@ -583,7 +615,7 @@ static int its_set_affinity(struct irq_data *d, const struct cpumask *mask_val,
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target_col = &its_dev->its->collections[cpu];
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its_send_movi(its_dev, target_col, id);
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its_dev->collection = target_col;
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its_dev->event_map.col_map[id] = cpu;
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return IRQ_SET_MASK_OK_DONE;
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}
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@ -713,8 +745,10 @@ out:
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return bitmap;
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}
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static void its_lpi_free(unsigned long *bitmap, int base, int nr_ids)
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static void its_lpi_free(struct event_lpi_map *map)
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{
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int base = map->lpi_base;
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int nr_ids = map->nr_lpis;
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int lpi;
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spin_lock(&lpi_lock);
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@ -731,7 +765,8 @@ static void its_lpi_free(unsigned long *bitmap, int base, int nr_ids)
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spin_unlock(&lpi_lock);
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kfree(bitmap);
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kfree(map->lpi_map);
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kfree(map->col_map);
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}
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/*
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@ -1099,11 +1134,11 @@ static struct its_device *its_create_device(struct its_node *its, u32 dev_id,
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struct its_device *dev;
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unsigned long *lpi_map;
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unsigned long flags;
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u16 *col_map = NULL;
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void *itt;
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int lpi_base;
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int nr_lpis;
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int nr_ites;
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int cpu;
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int sz;
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dev = kzalloc(sizeof(*dev), GFP_KERNEL);
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sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1;
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itt = kzalloc(sz, GFP_KERNEL);
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lpi_map = its_lpi_alloc_chunks(nvecs, &lpi_base, &nr_lpis);
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if (lpi_map)
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col_map = kzalloc(sizeof(*col_map) * nr_lpis, GFP_KERNEL);
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if (!dev || !itt || !lpi_map) {
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if (!dev || !itt || !lpi_map || !col_map) {
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kfree(dev);
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kfree(itt);
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kfree(lpi_map);
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kfree(col_map);
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return NULL;
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}
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dev->its = its;
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dev->itt = itt;
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dev->nr_ites = nr_ites;
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dev->lpi_map = lpi_map;
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dev->lpi_base = lpi_base;
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dev->nr_lpis = nr_lpis;
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dev->event_map.lpi_map = lpi_map;
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dev->event_map.col_map = col_map;
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dev->event_map.lpi_base = lpi_base;
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dev->event_map.nr_lpis = nr_lpis;
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dev->device_id = dev_id;
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INIT_LIST_HEAD(&dev->entry);
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@ -1138,10 +1177,6 @@ static struct its_device *its_create_device(struct its_node *its, u32 dev_id,
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list_add(&dev->entry, &its->its_device_list);
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raw_spin_unlock_irqrestore(&its->lock, flags);
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/* Bind the device to the first possible CPU */
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cpu = cpumask_first(cpu_online_mask);
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dev->collection = &its->collections[cpu];
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/* Map device to its ITT */
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its_send_mapd(dev, 1);
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@ -1163,12 +1198,13 @@ static int its_alloc_device_irq(struct its_device *dev, irq_hw_number_t *hwirq)
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{
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int idx;
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idx = find_first_zero_bit(dev->lpi_map, dev->nr_lpis);
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if (idx == dev->nr_lpis)
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idx = find_first_zero_bit(dev->event_map.lpi_map,
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dev->event_map.nr_lpis);
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if (idx == dev->event_map.nr_lpis)
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return -ENOSPC;
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*hwirq = dev->lpi_base + idx;
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set_bit(idx, dev->lpi_map);
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*hwirq = dev->event_map.lpi_base + idx;
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set_bit(idx, dev->event_map.lpi_map);
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return 0;
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}
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@ -1288,7 +1324,8 @@ static int its_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
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irq_domain_set_hwirq_and_chip(domain, virq + i,
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hwirq, &its_irq_chip, its_dev);
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dev_dbg(info->scratchpad[1].ptr, "ID:%d pID:%d vID:%d\n",
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(int)(hwirq - its_dev->lpi_base), (int)hwirq, virq + i);
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(int)(hwirq - its_dev->event_map.lpi_base),
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(int)hwirq, virq + i);
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}
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return 0;
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@ -1300,6 +1337,9 @@ static void its_irq_domain_activate(struct irq_domain *domain,
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struct its_device *its_dev = irq_data_get_irq_chip_data(d);
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u32 event = its_get_event_id(d);
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/* Bind the LPI to the first possible CPU */
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its_dev->event_map.col_map[event] = cpumask_first(cpu_online_mask);
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/* Map the GIC IRQ and event to the device */
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its_send_mapvi(its_dev, d->hwirq, event);
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}
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@ -1327,17 +1367,16 @@ static void its_irq_domain_free(struct irq_domain *domain, unsigned int virq,
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u32 event = its_get_event_id(data);
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/* Mark interrupt index as unused */
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clear_bit(event, its_dev->lpi_map);
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clear_bit(event, its_dev->event_map.lpi_map);
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/* Nuke the entry in the domain */
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irq_domain_reset_irq_data(data);
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}
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/* If all interrupts have been freed, start mopping the floor */
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if (bitmap_empty(its_dev->lpi_map, its_dev->nr_lpis)) {
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its_lpi_free(its_dev->lpi_map,
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its_dev->lpi_base,
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its_dev->nr_lpis);
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if (bitmap_empty(its_dev->event_map.lpi_map,
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its_dev->event_map.nr_lpis)) {
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its_lpi_free(&its_dev->event_map);
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/* Unmap device/itt */
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its_send_mapd(its_dev, 0);
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@ -527,18 +527,9 @@ static int _cpu_up(unsigned int cpu, int tasks_frozen)
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goto out_notify;
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}
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/*
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* Some architectures have to walk the irq descriptors to
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* setup the vector space for the cpu which comes online.
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* Prevent irq alloc/free across the bringup.
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*/
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irq_lock_sparse();
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/* Arch-specific enabling code. */
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ret = __cpu_up(cpu, idle);
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irq_unlock_sparse();
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if (ret != 0)
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goto out_notify;
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BUG_ON(!cpu_online(cpu));
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|
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@ -75,13 +75,21 @@ void check_irq_resend(struct irq_desc *desc, unsigned int irq)
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!desc->irq_data.chip->irq_retrigger(&desc->irq_data)) {
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#ifdef CONFIG_HARDIRQS_SW_RESEND
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/*
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* If the interrupt has a parent irq and runs
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* in the thread context of the parent irq,
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* retrigger the parent.
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* If the interrupt is running in the thread
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* context of the parent irq we need to be
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* careful, because we cannot trigger it
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* directly.
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*/
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if (desc->parent_irq &&
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irq_settings_is_nested_thread(desc))
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if (irq_settings_is_nested_thread(desc)) {
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/*
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* If the parent_irq is valid, we
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* retrigger the parent, otherwise we
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* do nothing.
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*/
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if (!desc->parent_irq)
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return;
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irq = desc->parent_irq;
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}
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/* Set it pending and activate the softirq: */
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set_bit(irq, irqs_resend);
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tasklet_schedule(&resend_tasklet);
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