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Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6

Browse source 
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6:
  [SPARC]: Fix link errors with gcc-4.3
  sparc64: replace remaining __FUNCTION__ occurances
  sparc: replace remaining __FUNCTION__ occurances
  [SPARC]: Add reboot_command[] extern decl to asm/system.h
  [SPARC]: Mark linux_sparc_{fpu,chips} static.
This commit is contained in:
Linus Torvalds 2008-03-04 20:20:32 -08:00
commit 665c1ef836
12 changed files with 215 additions and 219 deletions
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5
arch/sparc/kernel/Makefile
View file

@ -1,4 +1,4 @@
# $Id: Makefile,v 1.62 2000/12/15 00:41:17 davem Exp $ #
# Makefile for the linux kernel. # Makefile for the linux kernel.
# #
@ -12,7 +12,8 @@ obj-y := entry.o wof.o wuf.o etrap.o rtrap.o traps.o $(IRQ_OBJS) \
sys_sparc.o sunos_asm.o systbls.o \ sys_sparc.o sunos_asm.o systbls.o \
time.o windows.o cpu.o devices.o sclow.o \ time.o windows.o cpu.o devices.o sclow.o \
tadpole.o tick14.o ptrace.o sys_solaris.o \ tadpole.o tick14.o ptrace.o sys_solaris.o \
unaligned.o muldiv.o semaphore.o prom.o of_device.o devres.o unaligned.o una_asm.o muldiv.o semaphore.o \
prom.o of_device.o devres.o
devres-y = ../../../kernel/irq/devres.o devres-y = ../../../kernel/irq/devres.o

4
arch/sparc/kernel/cpu.c
View file

@ -32,7 +32,7 @@ struct cpu_fp_info {
/* In order to get the fpu type correct, you need to take the IDPROM's /* In order to get the fpu type correct, you need to take the IDPROM's
* machine type value into consideration too. I will fix this. * machine type value into consideration too. I will fix this.
*/ */
struct cpu_fp_info linux_sparc_fpu[] = { static struct cpu_fp_info linux_sparc_fpu[] = {
{ 0, 0, "Fujitsu MB86910 or Weitek WTL1164/5"}, { 0, 0, "Fujitsu MB86910 or Weitek WTL1164/5"},
{ 0, 1, "Fujitsu MB86911 or Weitek WTL1164/5 or LSI L64831"}, { 0, 1, "Fujitsu MB86911 or Weitek WTL1164/5 or LSI L64831"},
{ 0, 2, "LSI Logic L64802 or Texas Instruments ACT8847"}, { 0, 2, "LSI Logic L64802 or Texas Instruments ACT8847"},
@ -76,7 +76,7 @@ struct cpu_fp_info linux_sparc_fpu[] = {
#define NSPARCFPU ARRAY_SIZE(linux_sparc_fpu) #define NSPARCFPU ARRAY_SIZE(linux_sparc_fpu)
struct cpu_iu_info linux_sparc_chips[] = { static struct cpu_iu_info linux_sparc_chips[] = {
/* Sun4/100, 4/200, SLC */ /* Sun4/100, 4/200, SLC */
{ 0, 0, "Fujitsu MB86900/1A or LSI L64831 SparcKIT-40"}, { 0, 0, "Fujitsu MB86900/1A or LSI L64831 SparcKIT-40"},
/* borned STP1012PGA */ /* borned STP1012PGA */

6
arch/sparc/kernel/ebus.c
View file

@ -101,7 +101,7 @@ void __init fill_ebus_child(struct device_node *dp,
prom_printf("UGH: property for %s was %d, need < %d\n", prom_printf("UGH: property for %s was %d, need < %d\n",
dev->prom_node->name, len, dev->prom_node->name, len,
dev->parent->num_addrs); dev->parent->num_addrs);
panic(__FUNCTION__); panic(__func__);
} }
/* XXX resource */ /* XXX resource */
@ -162,7 +162,7 @@ void __init fill_ebus_device(struct device_node *dp, struct linux_ebus_device *d
prom_printf("UGH: proplen for %s was %d, need multiple of %d\n", prom_printf("UGH: proplen for %s was %d, need multiple of %d\n",
dev->prom_node->name, len, dev->prom_node->name, len,
(int)sizeof(struct linux_prom_registers)); (int)sizeof(struct linux_prom_registers));
panic(__FUNCTION__); panic(__func__);
} }
dev->num_addrs = len / sizeof(struct linux_prom_registers); dev->num_addrs = len / sizeof(struct linux_prom_registers);
@ -324,7 +324,7 @@ void __init ebus_init(void)
regs = of_get_property(dp, "reg", &len); regs = of_get_property(dp, "reg", &len);
if (!regs) { if (!regs) {
prom_printf("%s: can't find reg property\n", prom_printf("%s: can't find reg property\n",
__FUNCTION__); __func__);
prom_halt(); prom_halt();
} }
nreg = len / sizeof(struct linux_prom_pci_registers); nreg = len / sizeof(struct linux_prom_pci_registers);

2
arch/sparc/kernel/process.c
View file

@ -139,8 +139,6 @@ void cpu_idle(void)
#endif #endif
extern char reboot_command [];
/* XXX cli/sti -> local_irq_xxx here, check this works once SMP is fixed. */ /* XXX cli/sti -> local_irq_xxx here, check this works once SMP is fixed. */
void machine_halt(void) void machine_halt(void)
{ {

153
arch/sparc/kernel/una_asm.S Normal file
View file

@ -0,0 +1,153 @@
/* una_asm.S: Kernel unaligned trap assembler helpers.
*
* Copyright (C) 1996,2005,2008 David S. Miller (davem@davemloft.net)
* Copyright (C) 1996,1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
*/
#include <linux/errno.h>
.text
retl_efault:
retl
mov -EFAULT, %o0
/* int __do_int_store(unsigned long *dst_addr, int size,
* unsigned long *src_val)
*
* %o0 = dest_addr
* %o1 = size
* %o2 = src_val
*
* Return '0' on success, -EFAULT on failure.
*/
.globl __do_int_store
__do_int_store:
ld [%o2], %g1
cmp %1, 2
be 2f
cmp %1, 4
be 1f
srl %g1, 24, %g2
srl %g1, 16, %g7
4: stb %g2, [%o0]
srl %g1, 8, %g2
5: stb %g7, [%o0 + 1]
ld [%o2 + 4], %g7
6: stb %g2, [%o0 + 2]
srl %g7, 24, %g2
7: stb %g1, [%o0 + 3]
srl %g7, 16, %g1
8: stb %g2, [%o0 + 4]
srl %g7, 8, %g2
9: stb %g1, [%o0 + 5]
10: stb %g2, [%o0 + 6]
b 0f
11: stb %g7, [%o0 + 7]
1: srl %g1, 16, %g7
12: stb %g2, [%o0]
srl %g1, 8, %g2
13: stb %g7, [%o0 + 1]
14: stb %g2, [%o0 + 2]
b 0f
15: stb %g1, [%o0 + 3]
2: srl %g1, 8, %g2
16: stb %g2, [%o0]
17: stb %g1, [%o0 + 1]
0: retl
mov 0, %o0
.section __ex_table,#alloc
.word 4b, retl_efault
.word 5b, retl_efault
.word 6b, retl_efault
.word 7b, retl_efault
.word 8b, retl_efault
.word 9b, retl_efault
.word 10b, retl_efault
.word 11b, retl_efault
.word 12b, retl_efault
.word 13b, retl_efault
.word 14b, retl_efault
.word 15b, retl_efault
.word 16b, retl_efault
.word 17b, retl_efault
.previous
/* int do_int_load(unsigned long *dest_reg, int size,
* unsigned long *saddr, int is_signed)
*
* %o0 = dest_reg
* %o1 = size
* %o2 = saddr
* %o3 = is_signed
*
* Return '0' on success, -EFAULT on failure.
*/
.globl do_int_load
do_int_load:
cmp %o1, 8
be 9f
cmp %o1, 4
be 6f
4: ldub [%o2], %g1
5: ldub [%o2 + 1], %g2
sll %g1, 8, %g1
tst %o3
be 3f
or %g1, %g2, %g1
sll %g1, 16, %g1
sra %g1, 16, %g1
3: b 0f
st %g1, [%o0]
6: ldub [%o2 + 1], %g2
sll %g1, 24, %g1
7: ldub [%o2 + 2], %g7
sll %g2, 16, %g2
8: ldub [%o2 + 3], %g3
sll %g7, 8, %g7
or %g3, %g2, %g3
or %g7, %g3, %g7
or %g1, %g7, %g1
b 0f
st %g1, [%o0]
9: ldub [%o2], %g1
10: ldub [%o2 + 1], %g2
sll %g1, 24, %g1
11: ldub [%o2 + 2], %g7
sll %g2, 16, %g2
12: ldub [%o2 + 3], %g3
sll %g7, 8, %g7
or %g1, %g2, %g1
or %g7, %g3, %g7
or %g1, %g7, %g7
13: ldub [%o2 + 4], %g1
st %g7, [%o0]
14: ldub [%o2 + 5], %g2
sll %g1, 24, %g1
15: ldub [%o2 + 6], %g7
sll %g2, 16, %g2
16: ldub [%o2 + 7], %g3
sll %g7, 8, %g7
or %g1, %g2, %g1
or %g7, %g3, %g7
or %g1, %g7, %g7
st %g7, [%o0 + 4]
0: retl
mov 0, %o0
.section __ex_table,#alloc
.word 4b, retl_efault
.word 5b, retl_efault
.word 6b, retl_efault
.word 7b, retl_efault
.word 8b, retl_efault
.word 9b, retl_efault
.word 10b, retl_efault
.word 11b, retl_efault
.word 12b, retl_efault
.word 13b, retl_efault
.word 14b, retl_efault
.word 15b, retl_efault
.word 16b, retl_efault
.previous

250
arch/sparc/kernel/unaligned.c
View file

@ -175,157 +175,31 @@ static void unaligned_panic(char *str)
panic(str); panic(str);
} }
#define do_integer_load(dest_reg, size, saddr, is_signed, errh) ({ \ /* una_asm.S */
__asm__ __volatile__ ( \ extern int do_int_load(unsigned long *dest_reg, int size,
"cmp %1, 8\n\t" \ unsigned long *saddr, int is_signed);
"be 9f\n\t" \ extern int __do_int_store(unsigned long *dst_addr, int size,
" cmp %1, 4\n\t" \ unsigned long *src_val);
"be 6f\n" \
"4:\t" " ldub [%2], %%l1\n" \
"5:\t" "ldub [%2 + 1], %%l2\n\t" \
"sll %%l1, 8, %%l1\n\t" \
"tst %3\n\t" \
"be 3f\n\t" \
" add %%l1, %%l2, %%l1\n\t" \
"sll %%l1, 16, %%l1\n\t" \
"sra %%l1, 16, %%l1\n" \
"3:\t" "b 0f\n\t" \
" st %%l1, [%0]\n" \
"6:\t" "ldub [%2 + 1], %%l2\n\t" \
"sll %%l1, 24, %%l1\n" \
"7:\t" "ldub [%2 + 2], %%g7\n\t" \
"sll %%l2, 16, %%l2\n" \
"8:\t" "ldub [%2 + 3], %%g1\n\t" \
"sll %%g7, 8, %%g7\n\t" \
"or %%l1, %%l2, %%l1\n\t" \
"or %%g7, %%g1, %%g7\n\t" \
"or %%l1, %%g7, %%l1\n\t" \
"b 0f\n\t" \
" st %%l1, [%0]\n" \
"9:\t" "ldub [%2], %%l1\n" \
"10:\t" "ldub [%2 + 1], %%l2\n\t" \
"sll %%l1, 24, %%l1\n" \
"11:\t" "ldub [%2 + 2], %%g7\n\t" \
"sll %%l2, 16, %%l2\n" \
"12:\t" "ldub [%2 + 3], %%g1\n\t" \
"sll %%g7, 8, %%g7\n\t" \
"or %%l1, %%l2, %%l1\n\t" \
"or %%g7, %%g1, %%g7\n\t" \
"or %%l1, %%g7, %%g7\n" \
"13:\t" "ldub [%2 + 4], %%l1\n\t" \
"st %%g7, [%0]\n" \
"14:\t" "ldub [%2 + 5], %%l2\n\t" \
"sll %%l1, 24, %%l1\n" \
"15:\t" "ldub [%2 + 6], %%g7\n\t" \
"sll %%l2, 16, %%l2\n" \
"16:\t" "ldub [%2 + 7], %%g1\n\t" \
"sll %%g7, 8, %%g7\n\t" \
"or %%l1, %%l2, %%l1\n\t" \
"or %%g7, %%g1, %%g7\n\t" \
"or %%l1, %%g7, %%g7\n\t" \
"st %%g7, [%0 + 4]\n" \
"0:\n\n\t" \
".section __ex_table,#alloc\n\t" \
".word 4b, " #errh "\n\t" \
".word 5b, " #errh "\n\t" \
".word 6b, " #errh "\n\t" \
".word 7b, " #errh "\n\t" \
".word 8b, " #errh "\n\t" \
".word 9b, " #errh "\n\t" \
".word 10b, " #errh "\n\t" \
".word 11b, " #errh "\n\t" \
".word 12b, " #errh "\n\t" \
".word 13b, " #errh "\n\t" \
".word 14b, " #errh "\n\t" \
".word 15b, " #errh "\n\t" \
".word 16b, " #errh "\n\n\t" \
".previous\n\t" \
: : "r" (dest_reg), "r" (size), "r" (saddr), "r" (is_signed) \
: "l1", "l2", "g7", "g1", "cc"); \
})
#define store_common(dst_addr, size, src_val, errh) ({ \
__asm__ __volatile__ ( \
"ld [%2], %%l1\n" \
"cmp %1, 2\n\t" \
"be 2f\n\t" \
" cmp %1, 4\n\t" \
"be 1f\n\t" \
" srl %%l1, 24, %%l2\n\t" \
"srl %%l1, 16, %%g7\n" \
"4:\t" "stb %%l2, [%0]\n\t" \
"srl %%l1, 8, %%l2\n" \
"5:\t" "stb %%g7, [%0 + 1]\n\t" \
"ld [%2 + 4], %%g7\n" \
"6:\t" "stb %%l2, [%0 + 2]\n\t" \
"srl %%g7, 24, %%l2\n" \
"7:\t" "stb %%l1, [%0 + 3]\n\t" \
"srl %%g7, 16, %%l1\n" \
"8:\t" "stb %%l2, [%0 + 4]\n\t" \
"srl %%g7, 8, %%l2\n" \
"9:\t" "stb %%l1, [%0 + 5]\n" \
"10:\t" "stb %%l2, [%0 + 6]\n\t" \
"b 0f\n" \
"11:\t" " stb %%g7, [%0 + 7]\n" \
"1:\t" "srl %%l1, 16, %%g7\n" \
"12:\t" "stb %%l2, [%0]\n\t" \
"srl %%l1, 8, %%l2\n" \
"13:\t" "stb %%g7, [%0 + 1]\n" \
"14:\t" "stb %%l2, [%0 + 2]\n\t" \
"b 0f\n" \
"15:\t" " stb %%l1, [%0 + 3]\n" \
"2:\t" "srl %%l1, 8, %%l2\n" \
"16:\t" "stb %%l2, [%0]\n" \
"17:\t" "stb %%l1, [%0 + 1]\n" \
"0:\n\n\t" \
".section __ex_table,#alloc\n\t" \
".word 4b, " #errh "\n\t" \
".word 5b, " #errh "\n\t" \
".word 6b, " #errh "\n\t" \
".word 7b, " #errh "\n\t" \
".word 8b, " #errh "\n\t" \
".word 9b, " #errh "\n\t" \
".word 10b, " #errh "\n\t" \
".word 11b, " #errh "\n\t" \
".word 12b, " #errh "\n\t" \
".word 13b, " #errh "\n\t" \
".word 14b, " #errh "\n\t" \
".word 15b, " #errh "\n\t" \
".word 16b, " #errh "\n\t" \
".word 17b, " #errh "\n\n\t" \
".previous\n\t" \
: : "r" (dst_addr), "r" (size), "r" (src_val) \
: "l1", "l2", "g7", "g1", "cc"); \
})
#define do_integer_store(reg_num, size, dst_addr, regs, errh) ({ \ static int do_int_store(int reg_num, int size, unsigned long *dst_addr,
unsigned long *src_val; \ struct pt_regs *regs)
static unsigned long zero[2] = { 0, }; \ {
\ unsigned long zero[2] = { 0, 0 };
if (reg_num) src_val = fetch_reg_addr(reg_num, regs); \ unsigned long *src_val;
else { \
src_val = &zero[0]; \ if (reg_num)
if (size == 8) \ src_val = fetch_reg_addr(reg_num, regs);
zero[1] = fetch_reg(1, regs); \ else {
} \ src_val = &zero[0];
store_common(dst_addr, size, src_val, errh); \ if (size == 8)
}) zero[1] = fetch_reg(1, regs);
}
return __do_int_store(dst_addr, size, src_val);
}
extern void smp_capture(void); extern void smp_capture(void);
extern void smp_release(void); extern void smp_release(void);
#define do_atomic(srcdest_reg, mem, errh) ({ \
unsigned long flags, tmp; \
\
smp_capture(); \
local_irq_save(flags); \
tmp = *srcdest_reg; \
do_integer_load(srcdest_reg, 4, mem, 0, errh); \
store_common(mem, 4, &tmp, errh); \
local_irq_restore(flags); \
smp_release(); \
})
static inline void advance(struct pt_regs *regs) static inline void advance(struct pt_regs *regs)
{ {
regs->pc = regs->npc; regs->pc = regs->npc;
@ -342,9 +216,7 @@ static inline int ok_for_kernel(unsigned int insn)
return !floating_point_load_or_store_p(insn); return !floating_point_load_or_store_p(insn);
} }
void kernel_mna_trap_fault(struct pt_regs *regs, unsigned int insn) __asm__ ("kernel_mna_trap_fault"); static void kernel_mna_trap_fault(struct pt_regs *regs, unsigned int insn)
void kernel_mna_trap_fault(struct pt_regs *regs, unsigned int insn)
{ {
unsigned long g2 = regs->u_regs [UREG_G2]; unsigned long g2 = regs->u_regs [UREG_G2];
unsigned long fixup = search_extables_range(regs->pc, &g2); unsigned long fixup = search_extables_range(regs->pc, &g2);
@ -379,48 +251,34 @@ asmlinkage void kernel_unaligned_trap(struct pt_regs *regs, unsigned int insn)
printk("Unsupported unaligned load/store trap for kernel at <%08lx>.\n", printk("Unsupported unaligned load/store trap for kernel at <%08lx>.\n",
regs->pc); regs->pc);
unaligned_panic("Wheee. Kernel does fpu/atomic unaligned load/store."); unaligned_panic("Wheee. Kernel does fpu/atomic unaligned load/store.");
__asm__ __volatile__ ("\n"
"kernel_unaligned_trap_fault:\n\t"
"mov %0, %%o0\n\t"
"call kernel_mna_trap_fault\n\t"
" mov %1, %%o1\n\t"
:
: "r" (regs), "r" (insn)
: "o0", "o1", "o2", "o3", "o4", "o5", "o7",
"g1", "g2", "g3", "g4", "g5", "g7", "cc");
} else { } else {
unsigned long addr = compute_effective_address(regs, insn); unsigned long addr = compute_effective_address(regs, insn);
int err;
#ifdef DEBUG_MNA #ifdef DEBUG_MNA
printk("KMNA: pc=%08lx [dir=%s addr=%08lx size=%d] retpc[%08lx]\n", printk("KMNA: pc=%08lx [dir=%s addr=%08lx size=%d] retpc[%08lx]\n",
regs->pc, dirstrings[dir], addr, size, regs->u_regs[UREG_RETPC]); regs->pc, dirstrings[dir], addr, size, regs->u_regs[UREG_RETPC]);
#endif #endif
switch(dir) { switch (dir) {
case load: case load:
do_integer_load(fetch_reg_addr(((insn>>25)&0x1f), regs), err = do_int_load(fetch_reg_addr(((insn>>25)&0x1f),
size, (unsigned long *) addr, regs),
decode_signedness(insn), size, (unsigned long *) addr,
kernel_unaligned_trap_fault); decode_signedness(insn));
break; break;
case store: case store:
do_integer_store(((insn>>25)&0x1f), size, err = do_int_store(((insn>>25)&0x1f), size,
(unsigned long *) addr, regs, (unsigned long *) addr, regs);
kernel_unaligned_trap_fault);
break; break;
#if 0 /* unsupported */
case both:
do_atomic(fetch_reg_addr(((insn>>25)&0x1f), regs),
(unsigned long *) addr,
kernel_unaligned_trap_fault);
break;
#endif
default: default:
panic("Impossible kernel unaligned trap."); panic("Impossible kernel unaligned trap.");
/* Not reached... */ /* Not reached... */
} }
advance(regs); if (err)
kernel_mna_trap_fault(regs, insn);
else
advance(regs);
} }
} }
@ -459,9 +317,7 @@ static inline int ok_for_user(struct pt_regs *regs, unsigned int insn,
return 0; return 0;
} }
void user_mna_trap_fault(struct pt_regs *regs, unsigned int insn) __asm__ ("user_mna_trap_fault"); static void user_mna_trap_fault(struct pt_regs *regs, unsigned int insn)
void user_mna_trap_fault(struct pt_regs *regs, unsigned int insn)
{ {
siginfo_t info; siginfo_t info;
@ -485,7 +341,7 @@ asmlinkage void user_unaligned_trap(struct pt_regs *regs, unsigned int insn)
if(!ok_for_user(regs, insn, dir)) { if(!ok_for_user(regs, insn, dir)) {
goto kill_user; goto kill_user;
} else { } else {
int size = decode_access_size(insn); int err, size = decode_access_size(insn);
unsigned long addr; unsigned long addr;
if(floating_point_load_or_store_p(insn)) { if(floating_point_load_or_store_p(insn)) {
@ -496,48 +352,34 @@ asmlinkage void user_unaligned_trap(struct pt_regs *regs, unsigned int insn)
addr = compute_effective_address(regs, insn); addr = compute_effective_address(regs, insn);
switch(dir) { switch(dir) {
case load: case load:
do_integer_load(fetch_reg_addr(((insn>>25)&0x1f), regs), err = do_int_load(fetch_reg_addr(((insn>>25)&0x1f),
size, (unsigned long *) addr, regs),
decode_signedness(insn), size, (unsigned long *) addr,
user_unaligned_trap_fault); decode_signedness(insn));
break; break;
case store: case store:
do_integer_store(((insn>>25)&0x1f), size, err = do_int_store(((insn>>25)&0x1f), size,
(unsigned long *) addr, regs, (unsigned long *) addr, regs);
user_unaligned_trap_fault);
break; break;
case both: case both:
#if 0 /* unsupported */
do_atomic(fetch_reg_addr(((insn>>25)&0x1f), regs),
(unsigned long *) addr,
user_unaligned_trap_fault);
#else
/* /*
* This was supported in 2.4. However, we question * This was supported in 2.4. However, we question
* the value of SWAP instruction across word boundaries. * the value of SWAP instruction across word boundaries.
*/ */
printk("Unaligned SWAP unsupported.\n"); printk("Unaligned SWAP unsupported.\n");
goto kill_user; err = -EFAULT;
#endif
break; break;
default: default:
unaligned_panic("Impossible user unaligned trap."); unaligned_panic("Impossible user unaligned trap.");
__asm__ __volatile__ ("\n"
"user_unaligned_trap_fault:\n\t"
"mov %0, %%o0\n\t"
"call user_mna_trap_fault\n\t"
" mov %1, %%o1\n\t"
:
: "r" (regs), "r" (insn)
: "o0", "o1", "o2", "o3", "o4", "o5", "o7",
"g1", "g2", "g3", "g4", "g5", "g7", "cc");
goto out; goto out;
} }
advance(regs); if (err)
goto kill_user;
else
advance(regs);
goto out; goto out;
} }

4
arch/sparc64/kernel/cpu.c
View file

@ -30,7 +30,7 @@ struct cpu_fp_info {
char* fp_name; char* fp_name;
}; };
struct cpu_fp_info linux_sparc_fpu[] = { static struct cpu_fp_info linux_sparc_fpu[] = {
{ 0x17, 0x10, 0, "UltraSparc I integrated FPU"}, { 0x17, 0x10, 0, "UltraSparc I integrated FPU"},
{ 0x22, 0x10, 0, "UltraSparc I integrated FPU"}, { 0x22, 0x10, 0, "UltraSparc I integrated FPU"},
{ 0x17, 0x11, 0, "UltraSparc II integrated FPU"}, { 0x17, 0x11, 0, "UltraSparc II integrated FPU"},
@ -46,7 +46,7 @@ struct cpu_fp_info linux_sparc_fpu[] = {
#define NSPARCFPU ARRAY_SIZE(linux_sparc_fpu) #define NSPARCFPU ARRAY_SIZE(linux_sparc_fpu)
struct cpu_iu_info linux_sparc_chips[] = { static struct cpu_iu_info linux_sparc_chips[] = {
{ 0x17, 0x10, "TI UltraSparc I (SpitFire)"}, { 0x17, 0x10, "TI UltraSparc I (SpitFire)"},
{ 0x22, 0x10, "TI UltraSparc I (SpitFire)"}, { 0x22, 0x10, "TI UltraSparc I (SpitFire)"},
{ 0x17, 0x11, "TI UltraSparc II (BlackBird)"}, { 0x17, 0x11, "TI UltraSparc II (BlackBird)"},

2
arch/sparc64/kernel/process.c
View file

@ -114,8 +114,6 @@ void cpu_idle(void)
} }
} }
extern char reboot_command [];
void machine_halt(void) void machine_halt(void)
{ {
sstate_halt(); sstate_halt();

2
arch/sparc64/solaris/conv.h
View file

@ -28,7 +28,7 @@ extern unsigned sunos_sys_table[];
#define SUNOS(x) ((long)sunos_sys_table[x]) #define SUNOS(x) ((long)sunos_sys_table[x])
#ifdef DEBUG_SOLARIS #ifdef DEBUG_SOLARIS
#define SOLD(s) printk("%s,%d,%s(): %s\n",__FILE__,__LINE__,__FUNCTION__,(s)) #define SOLD(s) printk("%s,%d,%s(): %s\n",__FILE__,__LINE__,__func__,(s))
#define SOLDD(s) printk("solaris: "); printk s #define SOLDD(s) printk("solaris: "); printk s
#else #else
#define SOLD(s) #define SOLD(s)

2
arch/sparc64/solaris/timod.c
View file

@ -81,7 +81,7 @@ void mykfree(void *p)
#define MKCTL_MAGIC 0xDEADBABEBADC0DEDL #define MKCTL_MAGIC 0xDEADBABEBADC0DEDL
#define PUT_MAGIC(a,m) do{(*(u64*)(a))=(m);}while(0) #define PUT_MAGIC(a,m) do{(*(u64*)(a))=(m);}while(0)
#define SCHECK_MAGIC(a,m) do{if((*(u64*)(a))!=(m))printk("%s,%u,%s(): magic %08x at %p corrupted!\n",\ #define SCHECK_MAGIC(a,m) do{if((*(u64*)(a))!=(m))printk("%s,%u,%s(): magic %08x at %p corrupted!\n",\
__FILE__,__LINE__,__FUNCTION__,(m),(a));}while(0) __FILE__,__LINE__,__func__,(m),(a));}while(0)
#define BUF_OFFSET sizeof(u64) #define BUF_OFFSET sizeof(u64)
#define MKCTL_TRAILER sizeof(u64) #define MKCTL_TRAILER sizeof(u64)

2
include/asm-sparc/system.h
View file

@ -44,6 +44,8 @@ extern enum sparc_cpu sparc_cpu_model;
#define SUN4M_NCPUS 4 /* Architectural limit of sun4m. */ #define SUN4M_NCPUS 4 /* Architectural limit of sun4m. */
extern char reboot_command[];
extern struct thread_info *current_set[NR_CPUS]; extern struct thread_info *current_set[NR_CPUS];
extern unsigned long empty_bad_page; extern unsigned long empty_bad_page;

2
include/asm-sparc64/system.h
View file

@ -30,6 +30,8 @@ enum sparc_cpu {
#define ARCH_SUN4C_SUN4 0 #define ARCH_SUN4C_SUN4 0
#define ARCH_SUN4 0 #define ARCH_SUN4 0
extern char reboot_command[];
/* These are here in an effort to more fully work around Spitfire Errata /* These are here in an effort to more fully work around Spitfire Errata
* #51. Essentially, if a memory barrier occurs soon after a mispredicted * #51. Essentially, if a memory barrier occurs soon after a mispredicted
* branch, the chip can stop executing instructions until a trap occurs. * branch, the chip can stop executing instructions until a trap occurs.