kpriv/linux-hardened
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

Merge git://git.kernel.org/pub/scm/linux/kernel/git/kyle/parisc-2.6

Browse source 
* git://git.kernel.org/pub/scm/linux/kernel/git/kyle/parisc-2.6:
  [PARISC] MAINTAINERS
  [PARISC] Make ioremap default to _nocache
  [PARISC] Add new entries to the syscall table
  [PARISC] Further work for multiple page sizes
  [PARISC] Fix up hil_kbd.c mismerge
  [PARISC] defconfig updates
  [PARISC] Document that we tolerate "Relaxed Ordering"
  [PARISC] Misc. janitorial work
  [PARISC] EISA regions must be mapped NO_CACHE
  [PARISC] OSS ad1889: Match register names with ALSA driver
This commit is contained in:
Linus Torvalds 2006-04-23 09:44:10 -07:00
commit 6b426e785c
26 changed files with 732 additions and 462 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
MAINTAINERS
View file

@ -2065,8 +2065,12 @@ P: Matthew Wilcox
M: matthew@wil.cx
P: Grant Grundler
M: grundler@parisc-linux.org
P: Kyle McMartin
M: kyle@parisc-linux.org
L: parisc-linux@parisc-linux.org
W: http://www.parisc-linux.org/
T: git kernel.org:/pub/scm/linux/kernel/git/kyle/parisc-2.6.git
T: cvs cvs.parisc-linux.org:/var/cvs/linux-2.6
S: Maintained
PCI ERROR RECOVERY

31
arch/parisc/Kconfig
View file

@ -138,6 +138,37 @@ config 64BIT
enable this option otherwise. The 64bit kernel is significantly bigger
and slower than the 32bit one.
choice
prompt "Kernel page size"
default PARISC_PAGE_SIZE_4KB if !64BIT
default PARISC_PAGE_SIZE_4KB if 64BIT
# default PARISC_PAGE_SIZE_16KB if 64BIT
config PARISC_PAGE_SIZE_4KB
bool "4KB"
help
This lets you select the page size of the kernel. For best
performance, a page size of 16KB is recommended. For best
compatibility with 32bit applications, a page size of 4KB should be
selected (the vast majority of 32bit binaries work perfectly fine
with a larger page size).
4KB For best 32bit compatibility
16KB For best performance
64KB For best performance, might give more overhead.
If you don't know what to do, choose 4KB.
config PARISC_PAGE_SIZE_16KB
bool "16KB (EXPERIMENTAL)"
depends on PA8X00 && EXPERIMENTAL
config PARISC_PAGE_SIZE_64KB
bool "64KB (EXPERIMENTAL)"
depends on PA8X00 && EXPERIMENTAL
endchoice
config SMP
bool "Symmetric multi-processing support"
---help---

494
arch/parisc/defconfig
View file

@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.16-pa6
# Sun Mar 26 19:50:07 2006
# Linux kernel version: 2.6.16-pa10
# Sun Apr 2 15:26:38 2006
#
CONFIG_PARISC=y
CONFIG_MMU=y
@ -25,7 +25,7 @@ CONFIG_LOCALVERSION=""
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_POSIX_MQUEUE is not set
CONFIG_POSIX_MQUEUE=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
@ -35,7 +35,7 @@ CONFIG_INITRAMFS_SOURCE=""
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
# CONFIG_EMBEDDED is not set
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_ALL is not set
CONFIG_KALLSYMS_ALL=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_HOTPLUG=y
CONFIG_PRINTK=y
@ -57,7 +57,13 @@ CONFIG_BASE_SMALL=0
#
# Loadable module support
#
# CONFIG_MODULES is not set
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_OBSOLETE_MODPARM=y
# CONFIG_MODVERSIONS is not set
# CONFIG_MODULE_SRCVERSION_ALL is not set
CONFIG_KMOD=y
#
# Block layer
@ -79,16 +85,19 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
#
# Processor type and features
#
CONFIG_PA7000=y
# CONFIG_PA7100LC is not set
# CONFIG_PA7000 is not set
CONFIG_PA7100LC=y
# CONFIG_PA7200 is not set
# CONFIG_PA7300LC is not set
# CONFIG_PA8X00 is not set
CONFIG_PA11=y
CONFIG_PARISC_PAGE_SIZE_4KB=y
# CONFIG_PARISC_PAGE_SIZE_16KB is not set
# CONFIG_PARISC_PAGE_SIZE_64KB is not set
# CONFIG_SMP is not set
CONFIG_ARCH_FLATMEM_ENABLE=y
CONFIG_PREEMPT_NONE=y
# CONFIG_PREEMPT_VOLUNTARY is not set
# CONFIG_PREEMPT_NONE is not set
CONFIG_PREEMPT_VOLUNTARY=y
# CONFIG_PREEMPT is not set
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
@ -108,7 +117,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4096
# Bus options (PCI, PCMCIA, EISA, GSC, ISA)
#
CONFIG_GSC=y
CONFIG_HPPB=y
# CONFIG_HPPB is not set
CONFIG_IOMMU_CCIO=y
CONFIG_GSC_LASI=y
CONFIG_GSC_WAX=y
@ -126,7 +135,25 @@ CONFIG_IOMMU_SBA=y
#
# PCCARD (PCMCIA/CardBus) support
#
# CONFIG_PCCARD is not set
CONFIG_PCCARD=y
# CONFIG_PCMCIA_DEBUG is not set
CONFIG_PCMCIA=y
CONFIG_PCMCIA_LOAD_CIS=y
CONFIG_PCMCIA_IOCTL=y
CONFIG_CARDBUS=y
#
# PC-card bridges
#
CONFIG_YENTA=y
CONFIG_YENTA_O2=y
CONFIG_YENTA_RICOH=y
CONFIG_YENTA_TI=y
CONFIG_YENTA_ENE_TUNE=y
CONFIG_YENTA_TOSHIBA=y
CONFIG_PD6729=y
CONFIG_I82092=y
CONFIG_PCCARD_NONSTATIC=y
#
# PCI Hotplug Support
@ -145,7 +172,7 @@ CONFIG_PDC_STABLE=y
# Executable file formats
#
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
CONFIG_BINFMT_MISC=m
#
# Networking
@ -159,13 +186,15 @@ CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_PACKET_MMAP=y
CONFIG_UNIX=y
# CONFIG_NET_KEY is not set
CONFIG_XFRM=y
CONFIG_XFRM_USER=m
CONFIG_NET_KEY=m
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_FIB_HASH=y
CONFIG_IP_PNP=y
# CONFIG_IP_PNP_DHCP is not set
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
@ -173,19 +202,20 @@ CONFIG_IP_PNP_BOOTP=y
# CONFIG_IP_MROUTE is not set
# CONFIG_ARPD is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
CONFIG_INET_AH=m
CONFIG_INET_ESP=m
# CONFIG_INET_IPCOMP is not set
# CONFIG_INET_TUNNEL is not set
# CONFIG_INET_DIAG is not set
CONFIG_INET_TUNNEL=m
CONFIG_INET_DIAG=m
CONFIG_INET_TCP_DIAG=m
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_BIC=y
CONFIG_IPV6=y
# CONFIG_IPV6_PRIVACY is not set
# CONFIG_INET6_AH is not set
# CONFIG_INET6_ESP is not set
# CONFIG_INET6_IPCOMP is not set
# CONFIG_INET6_TUNNEL is not set
CONFIG_INET6_AH=y
CONFIG_INET6_ESP=y
CONFIG_INET6_IPCOMP=y
CONFIG_INET6_TUNNEL=y
# CONFIG_IPV6_TUNNEL is not set
# CONFIG_NETFILTER is not set
@ -207,7 +237,8 @@ CONFIG_IPV6=y
# CONFIG_BRIDGE is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
CONFIG_LLC=m
CONFIG_LLC2=m
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_X25 is not set
@ -237,9 +268,9 @@ CONFIG_IPV6=y
#
# Generic Driver Options
#
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set
# CONFIG_STANDALONE is not set
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
CONFIG_FW_LOADER=y
# CONFIG_DEBUG_DRIVER is not set
#
@ -256,13 +287,14 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
# Parallel port support
#
CONFIG_PARPORT=y
CONFIG_PARPORT_PC=y
CONFIG_PARPORT_PC=m
# CONFIG_PARPORT_SERIAL is not set
# CONFIG_PARPORT_PC_FIFO is not set
# CONFIG_PARPORT_PC_SUPERIO is not set
CONFIG_PARPORT_PC_PCMCIA=m
CONFIG_PARPORT_NOT_PC=y
CONFIG_PARPORT_GSC=y
# CONFIG_PARPORT_1284 is not set
CONFIG_PARPORT_1284=y
#
# Plug and Play support
@ -284,7 +316,7 @@ CONFIG_BLK_DEV_CRYPTOLOOP=y
# CONFIG_BLK_DEV_UB is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_RAM_SIZE=6144
CONFIG_BLK_DEV_INITRD=y
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
@ -292,7 +324,60 @@ CONFIG_BLK_DEV_INITRD=y
#
# ATA/ATAPI/MFM/RLL support
#
# CONFIG_IDE is not set
CONFIG_IDE=y
CONFIG_BLK_DEV_IDE=y
#
# Please see Documentation/ide.txt for help/info on IDE drives
#
# CONFIG_BLK_DEV_IDE_SATA is not set
CONFIG_BLK_DEV_IDEDISK=y
CONFIG_IDEDISK_MULTI_MODE=y
CONFIG_BLK_DEV_IDECS=y
CONFIG_BLK_DEV_IDECD=y
# CONFIG_BLK_DEV_IDETAPE is not set
# CONFIG_BLK_DEV_IDEFLOPPY is not set
CONFIG_BLK_DEV_IDESCSI=y
# CONFIG_IDE_TASK_IOCTL is not set
#
# IDE chipset support/bugfixes
#
CONFIG_IDE_GENERIC=y
CONFIG_BLK_DEV_IDEPCI=y
CONFIG_IDEPCI_SHARE_IRQ=y
# CONFIG_BLK_DEV_OFFBOARD is not set
CONFIG_BLK_DEV_GENERIC=y
# CONFIG_BLK_DEV_OPTI621 is not set
CONFIG_BLK_DEV_IDEDMA_PCI=y
# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
# CONFIG_IDEDMA_PCI_AUTO is not set
# CONFIG_BLK_DEV_AEC62XX is not set
# CONFIG_BLK_DEV_ALI15X3 is not set
# CONFIG_BLK_DEV_AMD74XX is not set
# CONFIG_BLK_DEV_CMD64X is not set
# CONFIG_BLK_DEV_TRIFLEX is not set
# CONFIG_BLK_DEV_CY82C693 is not set
# CONFIG_BLK_DEV_CS5520 is not set
# CONFIG_BLK_DEV_CS5530 is not set
# CONFIG_BLK_DEV_HPT34X is not set
# CONFIG_BLK_DEV_HPT366 is not set
# CONFIG_BLK_DEV_SC1200 is not set
# CONFIG_BLK_DEV_PIIX is not set
# CONFIG_BLK_DEV_IT821X is not set
CONFIG_BLK_DEV_NS87415=y
# CONFIG_BLK_DEV_PDC202XX_OLD is not set
# CONFIG_BLK_DEV_PDC202XX_NEW is not set
# CONFIG_BLK_DEV_SVWKS is not set
# CONFIG_BLK_DEV_SIIMAGE is not set
# CONFIG_BLK_DEV_SLC90E66 is not set
# CONFIG_BLK_DEV_TRM290 is not set
# CONFIG_BLK_DEV_VIA82CXXX is not set
# CONFIG_IDE_ARM is not set
CONFIG_BLK_DEV_IDEDMA=y
# CONFIG_IDEDMA_IVB is not set
# CONFIG_IDEDMA_AUTO is not set
# CONFIG_BLK_DEV_HD is not set
#
# SCSI device support
@ -374,6 +459,15 @@ CONFIG_SCSI_NCR53C8XX_SYNC=20
# CONFIG_SCSI_NSP32 is not set
# CONFIG_SCSI_DEBUG is not set
#
# PCMCIA SCSI adapter support
#
# CONFIG_PCMCIA_AHA152X is not set
# CONFIG_PCMCIA_FDOMAIN is not set
# CONFIG_PCMCIA_NINJA_SCSI is not set
# CONFIG_PCMCIA_QLOGIC is not set
# CONFIG_PCMCIA_SYM53C500 is not set
#
# Multi-device support (RAID and LVM)
#
@ -382,12 +476,17 @@ CONFIG_BLK_DEV_MD=y
CONFIG_MD_LINEAR=y
CONFIG_MD_RAID0=y
CONFIG_MD_RAID1=y
# CONFIG_MD_RAID10 is not set
CONFIG_MD_RAID10=y
CONFIG_MD_RAID5=y
# CONFIG_MD_RAID6 is not set
CONFIG_MD_RAID6=y
# CONFIG_MD_MULTIPATH is not set
# CONFIG_MD_FAULTY is not set
# CONFIG_BLK_DEV_DM is not set
CONFIG_BLK_DEV_DM=y
# CONFIG_DM_CRYPT is not set
# CONFIG_DM_SNAPSHOT is not set
# CONFIG_DM_MIRROR is not set
# CONFIG_DM_ZERO is not set
# CONFIG_DM_MULTIPATH is not set
#
# Fusion MPT device support
@ -411,10 +510,10 @@ CONFIG_MD_RAID5=y
# Network device support
#
CONFIG_NETDEVICES=y
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
CONFIG_DUMMY=m
CONFIG_BONDING=m
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
CONFIG_TUN=m
#
# ARCnet devices
@ -430,7 +529,7 @@ CONFIG_NETDEVICES=y
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
# CONFIG_MII is not set
CONFIG_MII=m
CONFIG_LASI_82596=y
# CONFIG_HAPPYMEAL is not set
# CONFIG_SUNGEM is not set
@ -451,6 +550,8 @@ CONFIG_TULIP=y
# CONFIG_WINBOND_840 is not set
# CONFIG_DM9102 is not set
# CONFIG_ULI526X is not set
# CONFIG_PCMCIA_XIRCOM is not set
# CONFIG_PCMCIA_XIRTULIP is not set
# CONFIG_DEPCA is not set
# CONFIG_HP100 is not set
CONFIG_NET_PCI=y
@ -518,13 +619,32 @@ CONFIG_NET_RADIO=y
# Obsolete Wireless cards support (pre-802.11)
#
# CONFIG_STRIP is not set
# CONFIG_PCMCIA_WAVELAN is not set
# CONFIG_PCMCIA_NETWAVE is not set
#
# Wireless 802.11 Frequency Hopping cards support
#
# CONFIG_PCMCIA_RAYCS is not set
#
# Wireless 802.11b ISA/PCI cards support
#
# CONFIG_HERMES is not set
CONFIG_HERMES=y
# CONFIG_PLX_HERMES is not set
# CONFIG_TMD_HERMES is not set
# CONFIG_NORTEL_HERMES is not set
# CONFIG_PCI_HERMES is not set
# CONFIG_ATMEL is not set
#
# Wireless 802.11b Pcmcia/Cardbus cards support
#
CONFIG_PCMCIA_HERMES=y
CONFIG_PCMCIA_SPECTRUM=y
# CONFIG_AIRO_CS is not set
# CONFIG_PCMCIA_WL3501 is not set
#
# Prism GT/Duette 802.11(a/b/g) PCI/Cardbus support
#
@ -532,6 +652,19 @@ CONFIG_NET_RADIO=y
# CONFIG_HOSTAP is not set
CONFIG_NET_WIRELESS=y
#
# PCMCIA network device support
#
CONFIG_NET_PCMCIA=y
# CONFIG_PCMCIA_3C589 is not set
# CONFIG_PCMCIA_3C574 is not set
# CONFIG_PCMCIA_FMVJ18X is not set
# CONFIG_PCMCIA_PCNET is not set
# CONFIG_PCMCIA_NMCLAN is not set
# CONFIG_PCMCIA_SMC91C92 is not set
# CONFIG_PCMCIA_XIRC2PS is not set
# CONFIG_PCMCIA_AXNET is not set
#
# Wan interfaces
#
@ -539,7 +672,15 @@ CONFIG_NET_WIRELESS=y
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
# CONFIG_PLIP is not set
# CONFIG_PPP is not set
CONFIG_PPP=m
# CONFIG_PPP_MULTILINK is not set
# CONFIG_PPP_FILTER is not set
CONFIG_PPP_ASYNC=m
CONFIG_PPP_SYNC_TTY=m
CONFIG_PPP_DEFLATE=m
CONFIG_PPP_BSDCOMP=m
# CONFIG_PPP_MPPE is not set
CONFIG_PPPOE=m
# CONFIG_SLIP is not set
# CONFIG_NET_FC is not set
# CONFIG_SHAPER is not set
@ -571,14 +712,16 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_TSDEV is not set
CONFIG_INPUT_EVDEV=y
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set
#
# Input Device Drivers
#
CONFIG_INPUT_KEYBOARD=y
# CONFIG_KEYBOARD_ATKBD is not set
CONFIG_KEYBOARD_ATKBD=y
CONFIG_KEYBOARD_ATKBD_HP_KEYCODES=y
# CONFIG_KEYBOARD_ATKBD_RDI_KEYCODES is not set
# CONFIG_KEYBOARD_SUNKBD is not set
# CONFIG_KEYBOARD_LKKBD is not set
# CONFIG_KEYBOARD_XTKBD is not set
@ -586,52 +729,25 @@ CONFIG_INPUT_KEYBOARD=y
# CONFIG_KEYBOARD_HIL_OLD is not set
CONFIG_KEYBOARD_HIL=y
CONFIG_INPUT_MOUSE=y
# CONFIG_MOUSE_PS2 is not set
# CONFIG_MOUSE_SERIAL is not set
CONFIG_MOUSE_PS2=y
CONFIG_MOUSE_SERIAL=y
# CONFIG_MOUSE_VSXXXAA is not set
CONFIG_MOUSE_HIL=y
CONFIG_INPUT_JOYSTICK=y
# CONFIG_JOYSTICK_ANALOG is not set
# CONFIG_JOYSTICK_A3D is not set
# CONFIG_JOYSTICK_ADI is not set
# CONFIG_JOYSTICK_COBRA is not set
# CONFIG_JOYSTICK_GF2K is not set
# CONFIG_JOYSTICK_GRIP is not set
# CONFIG_JOYSTICK_GRIP_MP is not set
# CONFIG_JOYSTICK_GUILLEMOT is not set
# CONFIG_JOYSTICK_INTERACT is not set
# CONFIG_JOYSTICK_SIDEWINDER is not set
# CONFIG_JOYSTICK_TMDC is not set
# CONFIG_JOYSTICK_IFORCE is not set
# CONFIG_JOYSTICK_WARRIOR is not set
# CONFIG_JOYSTICK_MAGELLAN is not set
# CONFIG_JOYSTICK_SPACEORB is not set
# CONFIG_JOYSTICK_SPACEBALL is not set
# CONFIG_JOYSTICK_STINGER is not set
# CONFIG_JOYSTICK_TWIDJOY is not set
# CONFIG_JOYSTICK_DB9 is not set
# CONFIG_JOYSTICK_GAMECON is not set
# CONFIG_JOYSTICK_TURBOGRAFX is not set
# CONFIG_JOYSTICK_JOYDUMP is not set
CONFIG_INPUT_TOUCHSCREEN=y
# CONFIG_TOUCHSCREEN_GUNZE is not set
# CONFIG_TOUCHSCREEN_ELO is not set
# CONFIG_TOUCHSCREEN_MTOUCH is not set
# CONFIG_TOUCHSCREEN_MK712 is not set
CONFIG_INPUT_MISC=y
# CONFIG_INPUT_UINPUT is not set
CONFIG_HP_SDC_RTC=y
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
#
# Hardware I/O ports
#
CONFIG_SERIO=y
# CONFIG_SERIO_SERPORT is not set
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_PARKBD is not set
CONFIG_SERIO_GSCPS2=y
CONFIG_HP_SDC=y
CONFIG_HIL_MLC=y
# CONFIG_SERIO_PCIPS2 is not set
CONFIG_SERIO_LIBPS2=y
# CONFIG_SERIO_RAW is not set
# CONFIG_GAMEPORT is not set
@ -648,7 +764,8 @@ CONFIG_HW_CONSOLE=y
#
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_NR_UARTS=13
CONFIG_SERIAL_8250_CS=y
CONFIG_SERIAL_8250_NR_UARTS=17
CONFIG_SERIAL_8250_RUNTIME_UARTS=4
CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_MANY_PORTS=y
@ -666,10 +783,10 @@ CONFIG_SERIAL_CORE_CONSOLE=y
# CONFIG_SERIAL_JSM is not set
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
CONFIG_PRINTER=y
CONFIG_LEGACY_PTY_COUNT=64
CONFIG_PRINTER=m
# CONFIG_LP_CONSOLE is not set
# CONFIG_PPDEV is not set
CONFIG_PPDEV=m
# CONFIG_TIPAR is not set
#
@ -682,7 +799,7 @@ CONFIG_PRINTER=y
#
# CONFIG_WATCHDOG is not set
CONFIG_GEN_RTC=y
# CONFIG_GEN_RTC_X is not set
CONFIG_GEN_RTC_X=y
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
@ -691,6 +808,13 @@ CONFIG_GEN_RTC=y
# Ftape, the floppy tape device driver
#
# CONFIG_DRM is not set
#
# PCMCIA character devices
#
# CONFIG_SYNCLINK_CS is not set
# CONFIG_CARDMAN_4000 is not set
# CONFIG_CARDMAN_4040 is not set
# CONFIG_RAW_DRIVER is not set
#
@ -718,10 +842,8 @@ CONFIG_GEN_RTC=y
#
# Hardware Monitoring support
#
CONFIG_HWMON=y
# CONFIG_HWMON is not set
# CONFIG_HWMON_VID is not set
# CONFIG_SENSORS_F71805F is not set
# CONFIG_HWMON_DEBUG_CHIP is not set
#
# Misc devices
@ -749,8 +871,8 @@ CONFIG_FB_CFB_FILLRECT=y
CONFIG_FB_CFB_COPYAREA=y
CONFIG_FB_CFB_IMAGEBLIT=y
# CONFIG_FB_MACMODES is not set
# CONFIG_FB_MODE_HELPERS is not set
# CONFIG_FB_TILEBLITTING is not set
CONFIG_FB_MODE_HELPERS=y
CONFIG_FB_TILEBLITTING=y
# CONFIG_FB_CIRRUS is not set
# CONFIG_FB_PM2 is not set
# CONFIG_FB_CYBER2000 is not set
@ -778,8 +900,8 @@ CONFIG_FB_STI=y
# Console display driver support
#
CONFIG_DUMMY_CONSOLE=y
CONFIG_DUMMY_CONSOLE_COLUMNS=160
CONFIG_DUMMY_CONSOLE_ROWS=64
CONFIG_DUMMY_CONSOLE_COLUMNS=128
CONFIG_DUMMY_CONSOLE_ROWS=48
CONFIG_FRAMEBUFFER_CONSOLE=y
# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
CONFIG_STI_CONSOLE=y
@ -816,13 +938,14 @@ CONFIG_SOUND=y
CONFIG_SND=y
CONFIG_SND_TIMER=y
CONFIG_SND_PCM=y
CONFIG_SND_HWDEP=y
CONFIG_SND_SEQUENCER=y
# CONFIG_SND_SEQ_DUMMY is not set
CONFIG_SND_OSSEMUL=y
CONFIG_SND_MIXER_OSS=y
CONFIG_SND_PCM_OSS=y
CONFIG_SND_SEQUENCER_OSS=y
# CONFIG_SND_DYNAMIC_MINORS is not set
CONFIG_SND_DYNAMIC_MINORS=y
CONFIG_SND_SUPPORT_OLD_API=y
# CONFIG_SND_VERBOSE_PRINTK is not set
# CONFIG_SND_DEBUG is not set
@ -830,6 +953,7 @@ CONFIG_SND_SUPPORT_OLD_API=y
#
# Generic devices
#
CONFIG_SND_OPL3_LIB=y
CONFIG_SND_AC97_CODEC=y
CONFIG_SND_AC97_BUS=y
# CONFIG_SND_DUMMY is not set
@ -842,7 +966,7 @@ CONFIG_SND_AC97_BUS=y
# PCI devices
#
CONFIG_SND_AD1889=y
# CONFIG_SND_AD1889_OPL3 is not set
CONFIG_SND_AD1889_OPL3=y
# CONFIG_SND_ALI5451 is not set
# CONFIG_SND_ATIIXP is not set
# CONFIG_SND_ATIIXP_MODEM is not set
@ -889,6 +1013,10 @@ CONFIG_SND_AD1889=y
#
# CONFIG_SND_USB_AUDIO is not set
#
# PCMCIA devices
#
#
# GSC devices
#
@ -905,12 +1033,12 @@ CONFIG_SND_HARMONY=y
CONFIG_USB_ARCH_HAS_HCD=y
CONFIG_USB_ARCH_HAS_OHCI=y
CONFIG_USB=y
CONFIG_USB_DEBUG=y
# CONFIG_USB_DEBUG is not set
#
# Miscellaneous USB options
#
# CONFIG_USB_DEVICEFS is not set
CONFIG_USB_DEVICEFS=y
# CONFIG_USB_BANDWIDTH is not set
# CONFIG_USB_DYNAMIC_MINORS is not set
# CONFIG_USB_OTG is not set
@ -918,14 +1046,12 @@ CONFIG_USB_DEBUG=y
#
# USB Host Controller Drivers
#
CONFIG_USB_EHCI_HCD=y
# CONFIG_USB_EHCI_SPLIT_ISO is not set
# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
# CONFIG_USB_EHCI_HCD is not set
# CONFIG_USB_ISP116X_HCD is not set
CONFIG_USB_OHCI_HCD=y
# CONFIG_USB_OHCI_BIG_ENDIAN is not set
CONFIG_USB_OHCI_LITTLE_ENDIAN=y
# CONFIG_USB_UHCI_HCD is not set
CONFIG_USB_UHCI_HCD=y
# CONFIG_USB_SL811_HCD is not set
#
@ -948,13 +1074,11 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y
#
# USB Input Devices
#
# CONFIG_USB_HID is not set
#
# USB HID Boot Protocol drivers
#
# CONFIG_USB_KBD is not set
# CONFIG_USB_MOUSE is not set
CONFIG_USB_HID=y
CONFIG_USB_HIDINPUT=y
# CONFIG_USB_HIDINPUT_POWERBOOK is not set
# CONFIG_HID_FF is not set
# CONFIG_USB_HIDDEV is not set
# CONFIG_USB_AIPTEK is not set
# CONFIG_USB_WACOM is not set
# CONFIG_USB_ACECAD is not set
@ -1020,8 +1144,8 @@ CONFIG_USB_MON=y
# CONFIG_USB_PHIDGETKIT is not set
# CONFIG_USB_PHIDGETSERVO is not set
# CONFIG_USB_IDMOUSE is not set
# CONFIG_USB_SISUSBVGA is not set
# CONFIG_USB_LD is not set
# CONFIG_USB_TEST is not set
#
# USB DSL modem support
@ -1058,7 +1182,7 @@ CONFIG_JBD=y
# CONFIG_JBD_DEBUG is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_FS_POSIX_ACL is not set
CONFIG_FS_POSIX_ACL=y
# CONFIG_XFS_FS is not set
# CONFIG_OCFS2_FS is not set
# CONFIG_MINIX_FS is not set
@ -1066,7 +1190,7 @@ CONFIG_JBD=y
CONFIG_INOTIFY=y
# CONFIG_QUOTA is not set
CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
CONFIG_AUTOFS_FS=y
# CONFIG_AUTOFS4_FS is not set
# CONFIG_FUSE_FS is not set
@ -1081,8 +1205,11 @@ CONFIG_JOLIET=y
#
# DOS/FAT/NT Filesystems
#
CONFIG_FAT_FS=y
# CONFIG_MSDOS_FS is not set
# CONFIG_VFAT_FS is not set
CONFIG_VFAT_FS=y
CONFIG_FAT_DEFAULT_CODEPAGE=437
CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
# CONFIG_NTFS_FS is not set
#
@ -1125,7 +1252,7 @@ CONFIG_NFS_V3=y
CONFIG_NFSD=y
CONFIG_NFSD_V3=y
# CONFIG_NFSD_V3_ACL is not set
# CONFIG_NFSD_V4 is not set
CONFIG_NFSD_V4=y
CONFIG_NFSD_TCP=y
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
@ -1133,10 +1260,16 @@ CONFIG_LOCKD_V4=y
CONFIG_EXPORTFS=y
CONFIG_NFS_COMMON=y
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
CONFIG_SUNRPC_GSS=y
CONFIG_RPCSEC_GSS_KRB5=y
CONFIG_RPCSEC_GSS_SPKM3=m
CONFIG_SMB_FS=m
CONFIG_SMB_NLS_DEFAULT=y
CONFIG_SMB_NLS_REMOTE="cp437"
CONFIG_CIFS=m
# CONFIG_CIFS_STATS is not set
# CONFIG_CIFS_XATTR is not set
# CONFIG_CIFS_EXPERIMENTAL is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_AFS_FS is not set
@ -1153,50 +1286,50 @@ CONFIG_MSDOS_PARTITION=y
#
CONFIG_NLS=y
CONFIG_NLS_DEFAULT="iso8859-1"
# CONFIG_NLS_CODEPAGE_437 is not set
# CONFIG_NLS_CODEPAGE_737 is not set
# CONFIG_NLS_CODEPAGE_775 is not set
# CONFIG_NLS_CODEPAGE_850 is not set
# CONFIG_NLS_CODEPAGE_852 is not set
# CONFIG_NLS_CODEPAGE_855 is not set
# CONFIG_NLS_CODEPAGE_857 is not set
# CONFIG_NLS_CODEPAGE_860 is not set
# CONFIG_NLS_CODEPAGE_861 is not set
# CONFIG_NLS_CODEPAGE_862 is not set
# CONFIG_NLS_CODEPAGE_863 is not set
# CONFIG_NLS_CODEPAGE_864 is not set
# CONFIG_NLS_CODEPAGE_865 is not set
# CONFIG_NLS_CODEPAGE_866 is not set
# CONFIG_NLS_CODEPAGE_869 is not set
# CONFIG_NLS_CODEPAGE_936 is not set
# CONFIG_NLS_CODEPAGE_950 is not set
# CONFIG_NLS_CODEPAGE_932 is not set
# CONFIG_NLS_CODEPAGE_949 is not set
# CONFIG_NLS_CODEPAGE_874 is not set
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1250 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
# CONFIG_NLS_ASCII is not set
# CONFIG_NLS_ISO8859_1 is not set
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
# CONFIG_NLS_ISO8859_4 is not set
# CONFIG_NLS_ISO8859_5 is not set
# CONFIG_NLS_ISO8859_6 is not set
# CONFIG_NLS_ISO8859_7 is not set
# CONFIG_NLS_ISO8859_9 is not set
# CONFIG_NLS_ISO8859_13 is not set
# CONFIG_NLS_ISO8859_14 is not set
# CONFIG_NLS_ISO8859_15 is not set
# CONFIG_NLS_KOI8_R is not set
# CONFIG_NLS_KOI8_U is not set
# CONFIG_NLS_UTF8 is not set
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_737=m
CONFIG_NLS_CODEPAGE_775=m
CONFIG_NLS_CODEPAGE_850=m
CONFIG_NLS_CODEPAGE_852=m
CONFIG_NLS_CODEPAGE_855=m
CONFIG_NLS_CODEPAGE_857=m
CONFIG_NLS_CODEPAGE_860=m
CONFIG_NLS_CODEPAGE_861=m
CONFIG_NLS_CODEPAGE_862=m
CONFIG_NLS_CODEPAGE_863=m
CONFIG_NLS_CODEPAGE_864=m
CONFIG_NLS_CODEPAGE_865=m
CONFIG_NLS_CODEPAGE_866=m
CONFIG_NLS_CODEPAGE_869=m
CONFIG_NLS_CODEPAGE_936=m
CONFIG_NLS_CODEPAGE_950=m
CONFIG_NLS_CODEPAGE_932=m
CONFIG_NLS_CODEPAGE_949=m
CONFIG_NLS_CODEPAGE_874=m
CONFIG_NLS_ISO8859_8=m
CONFIG_NLS_CODEPAGE_1250=y
CONFIG_NLS_CODEPAGE_1251=m
CONFIG_NLS_ASCII=m
CONFIG_NLS_ISO8859_1=y
CONFIG_NLS_ISO8859_2=m
CONFIG_NLS_ISO8859_3=m
CONFIG_NLS_ISO8859_4=m
CONFIG_NLS_ISO8859_5=m
CONFIG_NLS_ISO8859_6=m
CONFIG_NLS_ISO8859_7=m
CONFIG_NLS_ISO8859_9=m
CONFIG_NLS_ISO8859_13=m
CONFIG_NLS_ISO8859_14=m
CONFIG_NLS_ISO8859_15=m
CONFIG_NLS_KOI8_R=m
CONFIG_NLS_KOI8_U=m
CONFIG_NLS_UTF8=y
#
# Profiling support
#
CONFIG_PROFILING=y
CONFIG_OPROFILE=y
CONFIG_OPROFILE=m
#
# Kernel hacking
@ -1204,7 +1337,7 @@ CONFIG_OPROFILE=y
# CONFIG_PRINTK_TIME is not set
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_KERNEL=y
CONFIG_LOG_BUF_SHIFT=15
CONFIG_LOG_BUF_SHIFT=16
CONFIG_DETECT_SOFTLOCKUP=y
# CONFIG_SCHEDSTATS is not set
# CONFIG_DEBUG_SLAB is not set
@ -1217,42 +1350,43 @@ CONFIG_DEBUG_MUTEXES=y
# CONFIG_DEBUG_VM is not set
CONFIG_FORCED_INLINING=y
# CONFIG_RCU_TORTURE_TEST is not set
CONFIG_DEBUG_RODATA=y
# CONFIG_DEBUG_RODATA is not set
#
# Security options
#
# CONFIG_KEYS is not set
CONFIG_KEYS=y
CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
#
# Cryptographic options
#
CONFIG_CRYPTO=y
# CONFIG_CRYPTO_HMAC is not set
# CONFIG_CRYPTO_NULL is not set
# CONFIG_CRYPTO_MD4 is not set
# CONFIG_CRYPTO_MD5 is not set
# CONFIG_CRYPTO_SHA1 is not set
# CONFIG_CRYPTO_SHA256 is not set
# CONFIG_CRYPTO_SHA512 is not set
# CONFIG_CRYPTO_WP512 is not set
# CONFIG_CRYPTO_TGR192 is not set
# CONFIG_CRYPTO_DES is not set
# CONFIG_CRYPTO_BLOWFISH is not set
# CONFIG_CRYPTO_TWOFISH is not set
# CONFIG_CRYPTO_SERPENT is not set
# CONFIG_CRYPTO_AES is not set
# CONFIG_CRYPTO_CAST5 is not set
# CONFIG_CRYPTO_CAST6 is not set
# CONFIG_CRYPTO_TEA is not set
# CONFIG_CRYPTO_ARC4 is not set
# CONFIG_CRYPTO_KHAZAD is not set
# CONFIG_CRYPTO_ANUBIS is not set
# CONFIG_CRYPTO_DEFLATE is not set
# CONFIG_CRYPTO_MICHAEL_MIC is not set
# CONFIG_CRYPTO_CRC32C is not set
# CONFIG_CRYPTO_TEST is not set
CONFIG_CRYPTO_HMAC=y
CONFIG_CRYPTO_NULL=m
CONFIG_CRYPTO_MD4=m
CONFIG_CRYPTO_MD5=y
CONFIG_CRYPTO_SHA1=y
CONFIG_CRYPTO_SHA256=m
CONFIG_CRYPTO_SHA512=m
CONFIG_CRYPTO_WP512=m
CONFIG_CRYPTO_TGR192=m
CONFIG_CRYPTO_DES=y
CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_TWOFISH=m
CONFIG_CRYPTO_SERPENT=m
CONFIG_CRYPTO_AES=m
CONFIG_CRYPTO_CAST5=m
CONFIG_CRYPTO_CAST6=m
CONFIG_CRYPTO_TEA=m
CONFIG_CRYPTO_ARC4=m
CONFIG_CRYPTO_KHAZAD=m
CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_MICHAEL_MIC=m
CONFIG_CRYPTO_CRC32C=m
CONFIG_CRYPTO_TEST=m
#
# Hardware crypto devices
@ -1261,7 +1395,9 @@ CONFIG_CRYPTO=y
#
# Library routines
#
# CONFIG_CRC_CCITT is not set
CONFIG_CRC_CCITT=m
# CONFIG_CRC16 is not set
CONFIG_CRC32=y
# CONFIG_LIBCRC32C is not set
CONFIG_LIBCRC32C=m
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y

3
arch/parisc/kernel/asm-offsets.c
View file

@ -288,8 +288,11 @@ int main(void)
DEFINE(ASM_PGD_ENTRY_SIZE, PGD_ENTRY_SIZE);
DEFINE(ASM_PMD_ENTRY_SIZE, PMD_ENTRY_SIZE);
DEFINE(ASM_PTE_ENTRY_SIZE, PTE_ENTRY_SIZE);
DEFINE(ASM_PFN_PTE_SHIFT, PFN_PTE_SHIFT);
DEFINE(ASM_PT_INITIAL, PT_INITIAL);
DEFINE(ASM_PAGE_SIZE, PAGE_SIZE);
DEFINE(ASM_PAGE_SIZE_DIV64, PAGE_SIZE/64);
DEFINE(ASM_PAGE_SIZE_DIV128, PAGE_SIZE/128);
BLANK();
DEFINE(EXCDATA_IP, offsetof(struct exception_data, fault_ip));
DEFINE(EXCDATA_SPACE, offsetof(struct exception_data, fault_space));

4
arch/parisc/kernel/cache.c
View file

@ -4,7 +4,7 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 1999 Helge Deller (07-13-1999)
* Copyright (C) 1999-2006 Helge Deller <deller@gmx.de> (07-13-1999)
* Copyright (C) 1999 SuSE GmbH Nuernberg
* Copyright (C) 2000 Philipp Rumpf (prumpf@tux.org)
*
@ -358,5 +358,5 @@ void parisc_setup_cache_timing(void)
if (!parisc_cache_flush_threshold)
parisc_cache_flush_threshold = FLUSH_THRESHOLD;
printk("Setting cache flush threshold to %x (%d CPUs online)\n", parisc_cache_flush_threshold, num_online_cpus());
printk(KERN_INFO "Setting cache flush threshold to %x (%d CPUs online)\n", parisc_cache_flush_threshold, num_online_cpus());
}

36
arch/parisc/kernel/entry.S
View file

@ -502,18 +502,20 @@
* all ILP32 processes and all the kernel for machines with
* under 4GB of memory) */
.macro L3_ptep pgd,pte,index,va,fault
#if PT_NLEVELS == 3 /* we might have a 2-Level scheme, e.g. with 16kb page size */
extrd,u \va,63-ASM_PGDIR_SHIFT,ASM_BITS_PER_PGD,\index
copy %r0,\pte
extrd,u,*= \va,31,32,%r0
extrd,u,*= \va,63-ASM_PGDIR_SHIFT,64-ASM_PGDIR_SHIFT,%r0
ldw,s \index(\pgd),\pgd
extrd,u,*= \va,31,32,%r0
extrd,u,*= \va,63-ASM_PGDIR_SHIFT,64-ASM_PGDIR_SHIFT,%r0
bb,>=,n \pgd,_PxD_PRESENT_BIT,\fault
extrd,u,*= \va,31,32,%r0
extrd,u,*= \va,63-ASM_PGDIR_SHIFT,64-ASM_PGDIR_SHIFT,%r0
shld \pgd,PxD_VALUE_SHIFT,\index
extrd,u,*= \va,31,32,%r0
extrd,u,*= \va,63-ASM_PGDIR_SHIFT,64-ASM_PGDIR_SHIFT,%r0
copy \index,\pgd
extrd,u,*<> \va,31,32,%r0
extrd,u,*<> \va,63-ASM_PGDIR_SHIFT,64-ASM_PGDIR_SHIFT,%r0
ldo ASM_PGD_PMD_OFFSET(\pgd),\pgd
#endif
L2_ptep \pgd,\pte,\index,\va,\fault
.endm
@ -563,10 +565,18 @@
extrd,u,*= \pte,_PAGE_GATEWAY_BIT+32,1,%r0
depd %r0,11,2,\prot /* If Gateway, Set PL2 to 0 */
/* Get rid of prot bits and convert to page addr for iitlbt and idtlbt */
/* Enforce uncacheable pages.
* This should ONLY be use for MMIO on PA 2.0 machines.
* Memory/DMA is cache coherent on all PA2.0 machines we support
* (that means T-class is NOT supported) and the memory controllers
* on most of those machines only handles cache transactions.
*/
extrd,u,*= \pte,_PAGE_NO_CACHE_BIT+32,1,%r0
depi 1,12,1,\prot
depd %r0,63,PAGE_SHIFT,\pte
extrd,s \pte,(63-PAGE_SHIFT)+(63-58),64-PAGE_SHIFT,\pte
/* Drop prot bits and convert to page addr for iitlbt and idtlbt */
extrd,u \pte,(63-ASM_PFN_PTE_SHIFT)+(63-58),64-PAGE_SHIFT,\pte
depdi _PAGE_SIZE_ENCODING_DEFAULT,63,63-58,\pte
.endm
/* Identical macro to make_insert_tlb above, except it
@ -584,9 +594,8 @@
/* Get rid of prot bits and convert to page addr for iitlba */
depi 0,31,PAGE_SHIFT,\pte
depi _PAGE_SIZE_ENCODING_DEFAULT,31,ASM_PFN_PTE_SHIFT,\pte
extru \pte,24,25,\pte
.endm
/* This is for ILP32 PA2.0 only. The TLB insertion needs
@ -1201,10 +1210,9 @@ intr_save:
*/
/* adjust isr/ior. */
extrd,u %r16,63,7,%r1 /* get high bits from isr for ior */
depd %r1,31,7,%r17 /* deposit them into ior */
depdi 0,63,7,%r16 /* clear them from isr */
extrd,u %r16,63,SPACEID_SHIFT,%r1 /* get high bits from isr for ior */
depd %r1,31,SPACEID_SHIFT,%r17 /* deposit them into ior */
depdi 0,63,SPACEID_SHIFT,%r16 /* clear them from isr */
#endif
STREG %r16, PT_ISR(%r29)
STREG %r17, PT_IOR(%r29)

15
arch/parisc/kernel/head.S
View file

@ -76,16 +76,16 @@ $bss_loop:
mtctl %r4,%cr24 /* Initialize kernel root pointer */
mtctl %r4,%cr25 /* Initialize user root pointer */
#ifdef CONFIG_64BIT
#if PT_NLEVELS == 3
/* Set pmd in pgd */
load32 PA(pmd0),%r5
shrd %r5,PxD_VALUE_SHIFT,%r3
ldo (PxD_FLAG_PRESENT+PxD_FLAG_VALID)(%r3),%r3
ldo (PxD_FLAG_PRESENT+PxD_FLAG_VALID)(%r3),%r3
stw %r3,ASM_PGD_ENTRY*ASM_PGD_ENTRY_SIZE(%r4)
ldo ASM_PMD_ENTRY*ASM_PMD_ENTRY_SIZE(%r5),%r4
#else
/* 2-level page table, so pmd == pgd */
ldo ASM_PGD_ENTRY*ASM_PGD_ENTRY_SIZE(%r4),%r4
ldo ASM_PGD_ENTRY*ASM_PGD_ENTRY_SIZE(%r4),%r4
#endif
/* Fill in pmd with enough pte directories */
@ -99,7 +99,7 @@ $bss_loop:
stw %r3,0(%r4)
ldo (ASM_PAGE_SIZE >> PxD_VALUE_SHIFT)(%r3),%r3
addib,> -1,%r1,1b
#ifdef CONFIG_64BIT
#if PT_NLEVELS == 3
ldo ASM_PMD_ENTRY_SIZE(%r4),%r4
#else
ldo ASM_PGD_ENTRY_SIZE(%r4),%r4
@ -107,13 +107,14 @@ $bss_loop:
/* Now initialize the PTEs themselves */
ldo _PAGE_KERNEL(%r0),%r3 /* Hardwired 0 phys addr start */
ldo 0+_PAGE_KERNEL(%r0),%r3 /* Hardwired 0 phys addr start */
ldi (1<<(KERNEL_INITIAL_ORDER-PAGE_SHIFT)),%r11 /* PFN count */
load32 PA(pg0),%r1
$pgt_fill_loop:
STREGM %r3,ASM_PTE_ENTRY_SIZE(%r1)
ldo ASM_PAGE_SIZE(%r3),%r3
bb,>= %r3,31-KERNEL_INITIAL_ORDER,$pgt_fill_loop
ldo (1<<PFN_PTE_SHIFT)(%r3),%r3 /* add one PFN */
addib,> -1,%r11,$pgt_fill_loop
nop
/* Load the return address...er...crash 'n burn */

10
arch/parisc/kernel/init_task.c
View file

@ -53,17 +53,17 @@ union thread_union init_thread_union
__attribute__((aligned(128))) __attribute__((__section__(".data.init_task"))) =
{ INIT_THREAD_INFO(init_task) };
#ifdef __LP64__
#if PT_NLEVELS == 3
/* NOTE: This layout exactly conforms to the hybrid L2/L3 page table layout
* with the first pmd adjacent to the pgd and below it. gcc doesn't actually
* guarantee that global objects will be laid out in memory in the same order
* as the order of declaration, so put these in different sections and use
* the linker script to order them. */
pmd_t pmd0[PTRS_PER_PMD] __attribute__ ((aligned(PAGE_SIZE))) __attribute__ ((__section__ (".data.vm0.pmd"))) = { {0}, };
pmd_t pmd0[PTRS_PER_PMD] __attribute__ ((__section__ (".data.vm0.pmd"), aligned(PAGE_SIZE)));
#endif
pgd_t swapper_pg_dir[PTRS_PER_PGD] __attribute__ ((aligned(PAGE_SIZE))) __attribute__ ((__section__ (".data.vm0.pgd"))) = { {0}, };
pte_t pg0[PT_INITIAL * PTRS_PER_PTE] __attribute__ ((aligned(PAGE_SIZE))) __attribute__ ((__section__ (".data.vm0.pte"))) = { {0}, };
pgd_t swapper_pg_dir[PTRS_PER_PGD] __attribute__ ((__section__ (".data.vm0.pgd"), aligned(PAGE_SIZE)));
pte_t pg0[PT_INITIAL * PTRS_PER_PTE] __attribute__ ((__section__ (".data.vm0.pte"), aligned(PAGE_SIZE)));
/*
* Initial task structure.

25
arch/parisc/kernel/pacache.S
View file

@ -65,7 +65,7 @@ flush_tlb_all_local:
*/
/* pcxt_ssm_bug - relied upon translation! PA 2.0 Arch. F-4 and F-5 */
rsm PSW_SM_I, %r19 /* save I-bit state */
rsm PSW_SM_I, %r19 /* save I-bit state */
load32 PA(1f), %r1
nop
nop
@ -84,8 +84,7 @@ flush_tlb_all_local:
rfi
nop
1: ldil L%PA(cache_info), %r1
ldo R%PA(cache_info)(%r1), %r1
1: load32 PA(cache_info), %r1
/* Flush Instruction Tlb */
@ -212,8 +211,7 @@ flush_instruction_cache_local:
.entry
mtsp %r0, %sr1
ldil L%cache_info, %r1
ldo R%cache_info(%r1), %r1
load32 cache_info, %r1
/* Flush Instruction Cache */
@ -254,8 +252,7 @@ flush_data_cache_local:
.entry
mtsp %r0, %sr1
ldil L%cache_info, %r1
ldo R%cache_info(%r1), %r1
load32 cache_info, %r1
/* Flush Data Cache */
@ -303,7 +300,8 @@ copy_user_page_asm:
*/
ldd 0(%r25), %r19
ldi 32, %r1 /* PAGE_SIZE/128 == 32 */
ldi ASM_PAGE_SIZE_DIV128, %r1
ldw 64(%r25), %r0 /* prefetch 1 cacheline ahead */
ldw 128(%r25), %r0 /* prefetch 2 */
@ -368,7 +366,7 @@ copy_user_page_asm:
* use ldd/std on a 32 bit kernel.
*/
ldw 0(%r25), %r19
ldi 64, %r1 /* PAGE_SIZE/64 == 64 */
ldi ASM_PAGE_SIZE_DIV64, %r1
1:
ldw 4(%r25), %r20
@ -461,6 +459,7 @@ copy_user_page_asm:
sub %r25, %r1, %r23 /* move physical addr into non shadowed reg */
ldil L%(TMPALIAS_MAP_START), %r28
/* FIXME for different page sizes != 4k */
#ifdef CONFIG_64BIT
extrd,u %r26,56,32, %r26 /* convert phys addr to tlb insert format */
extrd,u %r23,56,32, %r23 /* convert phys addr to tlb insert format */
@ -551,6 +550,7 @@ __clear_user_page_asm:
#ifdef CONFIG_64BIT
#if (TMPALIAS_MAP_START >= 0x80000000)
depdi 0, 31,32, %r28 /* clear any sign extension */
/* FIXME: page size dependend */
#endif
extrd,u %r26, 56,32, %r26 /* convert phys addr to tlb insert format */
depd %r25, 63,22, %r28 /* Form aliased virtual address 'to' */
@ -566,10 +566,10 @@ __clear_user_page_asm:
pdtlb 0(%r28)
#ifdef CONFIG_64BIT
ldi 32, %r1 /* PAGE_SIZE/128 == 32 */
ldi ASM_PAGE_SIZE_DIV128, %r1
/* PREFETCH (Write) has not (yet) been proven to help here */
/* #define PREFETCHW_OP ldd 256(%0), %r0 */
/* #define PREFETCHW_OP ldd 256(%0), %r0 */
1: std %r0, 0(%r28)
std %r0, 8(%r28)
@ -591,8 +591,7 @@ __clear_user_page_asm:
ldo 128(%r28), %r28
#else /* ! CONFIG_64BIT */
ldi 64, %r1 /* PAGE_SIZE/64 == 64 */
ldi ASM_PAGE_SIZE_DIV64, %r1
1:
stw %r0, 0(%r28)

8
arch/parisc/kernel/sys_parisc.c
View file

@ -231,6 +231,14 @@ asmlinkage long parisc_fadvise64_64(int fd,
(loff_t)high_len << 32 | low_len, advice);
}
asmlinkage long parisc_sync_file_range(int fd,
u32 hi_off, u32 lo_off, u32 hi_nbytes, u32 lo_nbytes,
unsigned int flags)
{
return sys_sync_file_range(fd, (loff_t)hi_off << 32 | lo_off,
(loff_t)hi_nbytes << 32 | lo_nbytes, flags);
}
asmlinkage unsigned long sys_alloc_hugepages(int key, unsigned long addr, unsigned long len, int prot, int flag)
{
return -ENOMEM;

10
arch/parisc/kernel/syscall.S
View file

@ -55,7 +55,7 @@
* pointers.
*/
.align 4096
.align ASM_PAGE_SIZE
linux_gateway_page:
/* ADDRESS 0x00 to 0xb0 = 176 bytes / 4 bytes per insn = 44 insns */
@ -632,7 +632,7 @@ cas_action:
end_compare_and_swap:
/* Make sure nothing else is placed on this page */
.align 4096
.align ASM_PAGE_SIZE
.export end_linux_gateway_page
end_linux_gateway_page:
@ -652,7 +652,7 @@ end_linux_gateway_page:
.section .rodata,"a"
.align 4096
.align ASM_PAGE_SIZE
/* Light-weight-syscall table */
/* Start of lws table. */
.export lws_table
@ -662,14 +662,14 @@ lws_table:
LWS_ENTRY(compare_and_swap64) /* 1 - ELF64 Atomic compare and swap */
/* End of lws table */
.align 4096
.align ASM_PAGE_SIZE
.export sys_call_table
.Lsys_call_table:
sys_call_table:
#include "syscall_table.S"
#ifdef CONFIG_64BIT
.align 4096
.align ASM_PAGE_SIZE
.export sys_call_table64
.Lsys_call_table64:
sys_call_table64:

8
arch/parisc/kernel/syscall_table.S
View file

@ -13,7 +13,7 @@
* Copyright (C) 2001 Helge Deller <deller at parisc-linux.org>
* Copyright (C) 2000-2001 Thomas Bogendoerfer <tsbogend at parisc-linux.org>
* Copyright (C) 2002 Randolph Chung <tausq with parisc-linux.org>
*
* Copyright (C) 2005-2006 Kyle McMartin <kyle at parisc-linux.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -393,5 +393,11 @@
ENTRY_SAME(readlinkat) /* 285 */
ENTRY_SAME(fchmodat)
ENTRY_SAME(faccessat)
ENTRY_SAME(unshare)
ENTRY_COMP(set_robust_list)
ENTRY_COMP(get_robust_list) /* 290 */
ENTRY_SAME(splice)
ENTRY_OURS(sync_file_range)
ENTRY_SAME(tee)
/* Nothing yet */

52
arch/parisc/kernel/vmlinux.lds.S
View file

@ -6,6 +6,7 @@
* Copyright (C) 2000 Michael Ang <mang with subcarrier.org>
* Copyright (C) 2002 Randolph Chung <tausq with parisc-linux.org>
* Copyright (C) 2003 James Bottomley <jejb with parisc-linux.org>
* Copyright (C) 2006 Helge Deller <deller@gmx.de>
*
*
* This program is free software; you can redistribute it and/or modify
@ -27,6 +28,7 @@
/* needed for the processor specific cache alignment size */
#include <asm/cache.h>
#include <asm/page.h>
#include <asm/asm-offsets.h>
/* ld script to make hppa Linux kernel */
#ifndef CONFIG_64BIT
@ -68,7 +70,7 @@ SECTIONS
RODATA
/* writeable */
. = ALIGN(4096); /* Make sure this is page aligned so
. = ALIGN(ASM_PAGE_SIZE); /* Make sure this is page aligned so
that we can properly leave these
as writable */
data_start = .;
@ -82,22 +84,16 @@ SECTIONS
.PARISC.unwind : { *(.PARISC.unwind) }
__stop___unwind = .;
/* rarely changed data like cpu maps */
. = ALIGN(16);
.data.read_mostly : { *(.data.read_mostly) }
. = ALIGN(L1_CACHE_BYTES);
.data : { /* Data */
*(.data)
*(.data.vm0.pmd)
*(.data.vm0.pgd)
*(.data.vm0.pte)
CONSTRUCTORS
}
. = ALIGN(4096);
/* nosave data is really only used for software suspend...it's here
* just in case we ever implement it */
__nosave_begin = .;
.data_nosave : { *(.data.nosave) }
. = ALIGN(4096);
__nosave_end = .;
. = ALIGN(L1_CACHE_BYTES);
.data.cacheline_aligned : { *(.data.cacheline_aligned) }
@ -105,12 +101,29 @@ SECTIONS
. = ALIGN(16);
.data.lock_aligned : { *(.data.lock_aligned) }
/* rarely changed data like cpu maps */
. = ALIGN(16);
.data.read_mostly : { *(.data.read_mostly) }
. = ALIGN(ASM_PAGE_SIZE);
/* nosave data is really only used for software suspend...it's here
* just in case we ever implement it */
__nosave_begin = .;
.data_nosave : { *(.data.nosave) }
. = ALIGN(ASM_PAGE_SIZE);
__nosave_end = .;
_edata = .; /* End of data section */
__bss_start = .; /* BSS */
/* page table entries need to be PAGE_SIZE aligned */
. = ALIGN(ASM_PAGE_SIZE);
.data.vmpages : {
*(.data.vm0.pmd)
*(.data.vm0.pgd)
*(.data.vm0.pte)
}
.bss : { *(.bss) *(COMMON) }
__bss_stop = .;
/* assembler code expects init_task to be 16k aligned */
. = ALIGN(16384); /* init_task */
.data.init_task : { *(.data.init_task) }
@ -126,6 +139,7 @@ SECTIONS
.dlt : { *(.dlt) }
#endif
/* reserve space for interrupt stack by aligning __init* to 16k */
. = ALIGN(16384);
__init_begin = .;
.init.text : {
@ -166,7 +180,7 @@ SECTIONS
from .altinstructions and .eh_frame */
.exit.text : { *(.exit.text) }
.exit.data : { *(.exit.data) }
. = ALIGN(4096);
. = ALIGN(ASM_PAGE_SIZE);
__initramfs_start = .;
.init.ramfs : { *(.init.ramfs) }
__initramfs_end = .;
@ -174,14 +188,10 @@ SECTIONS
__per_cpu_start = .;
.data.percpu : { *(.data.percpu) }
__per_cpu_end = .;
. = ALIGN(4096);
. = ALIGN(ASM_PAGE_SIZE);
__init_end = .;
/* freed after init ends here */
__bss_start = .; /* BSS */
.bss : { *(.bss) *(COMMON) }
__bss_stop = .;
_end = . ;
/* Sections to be discarded */

2
arch/parisc/mm/fault.c
View file

@ -186,7 +186,7 @@ good_area:
break;
case VM_FAULT_SIGBUS:
/*
* We hit a hared mapping outside of the file, or some
* We hit a shared mapping outside of the file, or some
* other thing happened to us that made us unable to
* handle the page fault gracefully.
*/

26
arch/parisc/mm/init.c
View file

@ -6,6 +6,7 @@
* changed by Philipp Rumpf
* Copyright 1999 Philipp Rumpf (prumpf@tux.org)
* Copyright 2004 Randolph Chung (tausq@debian.org)
* Copyright 2006 Helge Deller (deller@gmx.de)
*
*/
@ -371,7 +372,7 @@ static void __init setup_bootmem(void)
void free_initmem(void)
{
unsigned long addr;
unsigned long addr, init_begin, init_end;
printk(KERN_INFO "Freeing unused kernel memory: ");
@ -395,8 +396,11 @@ void free_initmem(void)
local_irq_enable();
#endif
addr = (unsigned long)(&__init_begin);
for (; addr < (unsigned long)(&__init_end); addr += PAGE_SIZE) {
/* align __init_begin and __init_end to page size,
ignoring linker script where we might have tried to save RAM */
init_begin = PAGE_ALIGN((unsigned long)(&__init_begin));
init_end = PAGE_ALIGN((unsigned long)(&__init_end));
for (addr = init_begin; addr < init_end; addr += PAGE_SIZE) {
ClearPageReserved(virt_to_page(addr));
init_page_count(virt_to_page(addr));
free_page(addr);
@ -407,7 +411,7 @@ void free_initmem(void)
/* set up a new led state on systems shipped LED State panel */
pdc_chassis_send_status(PDC_CHASSIS_DIRECT_BCOMPLETE);
printk("%luk freed\n", (unsigned long)(&__init_end - &__init_begin) >> 10);
printk("%luk freed\n", (init_end - init_begin) >> 10);
}
@ -639,11 +643,13 @@ static void __init map_pages(unsigned long start_vaddr, unsigned long start_padd
* Map the fault vector writable so we can
* write the HPMC checksum.
*/
#if defined(CONFIG_PARISC_PAGE_SIZE_4KB)
if (address >= ro_start && address < ro_end
&& address != fv_addr
&& address != gw_addr)
pte = __mk_pte(address, PAGE_KERNEL_RO);
else
#endif
pte = __mk_pte(address, pgprot);
if (address >= end_paddr)
@ -874,8 +880,7 @@ unsigned long alloc_sid(void)
flush_tlb_all(); /* flush_tlb_all() calls recycle_sids() */
spin_lock(&sid_lock);
}
if (free_space_ids == 0)
BUG();
BUG_ON(free_space_ids == 0);
}
free_space_ids--;
@ -899,8 +904,7 @@ void free_sid(unsigned long spaceid)
spin_lock(&sid_lock);
if (*dirty_space_offset & (1L << index))
BUG(); /* attempt to free space id twice */
BUG_ON(*dirty_space_offset & (1L << index)); /* attempt to free space id twice */
*dirty_space_offset |= (1L << index);
dirty_space_ids++;
@ -975,7 +979,7 @@ static void recycle_sids(void)
static unsigned long recycle_ndirty;
static unsigned long recycle_dirty_array[SID_ARRAY_SIZE];
static unsigned int recycle_inuse = 0;
static unsigned int recycle_inuse;
void flush_tlb_all(void)
{
@ -984,9 +988,7 @@ void flush_tlb_all(void)
do_recycle = 0;
spin_lock(&sid_lock);
if (dirty_space_ids > RECYCLE_THRESHOLD) {
if (recycle_inuse) {
BUG(); /* FIXME: Use a semaphore/wait queue here */
}
BUG_ON(recycle_inuse); /* FIXME: Use a semaphore/wait queue here */
get_dirty_sids(&recycle_ndirty,recycle_dirty_array);
recycle_inuse++;
do_recycle++;

3
arch/parisc/mm/ioremap.c
View file

@ -2,7 +2,7 @@
* arch/parisc/mm/ioremap.c
*
* (C) Copyright 1995 1996 Linus Torvalds
* (C) Copyright 2001 Helge Deller <deller@gmx.de>
* (C) Copyright 2001-2006 Helge Deller <deller@gmx.de>
* (C) Copyright 2005 Kyle McMartin <kyle@parisc-linux.org>
*/
@ -138,6 +138,7 @@ void __iomem * __ioremap(unsigned long phys_addr, unsigned long size, unsigned l
if ((phys_addr >= 0x00080000 && end < 0x000fffff) ||
(phys_addr >= 0x00500000 && end < 0x03bfffff)) {
phys_addr |= F_EXTEND(0xfc000000);
flags |= _PAGE_NO_CACHE;
}
#endif

2
drivers/input/keyboard/hil_kbd.c
View file

@ -350,11 +350,11 @@ static int hil_kbd_connect(struct serio *serio, struct serio_driver *drv)
return 0;
bail2:
serio_close(serio);
serio_set_drvdata(serio, NULL);
bail1:
input_free_device(kbd->dev);
bail0:
kfree(kbd);
serio_set_drvdata(serio, NULL);
return -EIO;
}

43
drivers/parisc/sba_iommu.c
View file

@ -178,6 +178,11 @@ extern struct proc_dir_entry * proc_mckinley_root;
#define ROPE6_CTL 0x230
#define ROPE7_CTL 0x238
#define IOC_ROPE0_CFG 0x500 /* pluto only */
#define IOC_ROPE_AO 0x10 /* Allow "Relaxed Ordering" */
#define HF_ENABLE 0x40
@ -1759,19 +1764,33 @@ printk("sba_hw_init(): mem_boot 0x%x 0x%x 0x%x 0x%x\n", PAGE0->mem_boot.hpa,
sba_dev->num_ioc = num_ioc;
for (i = 0; i < num_ioc; i++) {
/*
** Make sure the box crashes if we get any errors on a rope.
*/
WRITE_REG(HF_ENABLE, sba_dev->ioc[i].ioc_hpa + ROPE0_CTL);
WRITE_REG(HF_ENABLE, sba_dev->ioc[i].ioc_hpa + ROPE1_CTL);
WRITE_REG(HF_ENABLE, sba_dev->ioc[i].ioc_hpa + ROPE2_CTL);
WRITE_REG(HF_ENABLE, sba_dev->ioc[i].ioc_hpa + ROPE3_CTL);
WRITE_REG(HF_ENABLE, sba_dev->ioc[i].ioc_hpa + ROPE4_CTL);
WRITE_REG(HF_ENABLE, sba_dev->ioc[i].ioc_hpa + ROPE5_CTL);
WRITE_REG(HF_ENABLE, sba_dev->ioc[i].ioc_hpa + ROPE6_CTL);
WRITE_REG(HF_ENABLE, sba_dev->ioc[i].ioc_hpa + ROPE7_CTL);
unsigned long ioc_hpa = sba_dev->ioc[i].ioc_hpa;
unsigned int j;
/* flush out the writes */
for (j=0; j < sizeof(u64) * ROPES_PER_IOC; j+=sizeof(u64)) {
/*
* Clear ROPE(N)_CONFIG AO bit.
* Disables "NT Ordering" (~= !"Relaxed Ordering")
* Overrides bit 1 in DMA Hint Sets.
* Improves netperf UDP_STREAM by ~10% for bcm5701.
*/
if (IS_PLUTO(sba_dev->iodc)) {
unsigned long rope_cfg, cfg_val;
rope_cfg = ioc_hpa + IOC_ROPE0_CFG + j;
cfg_val = READ_REG(rope_cfg);
cfg_val &= ~IOC_ROPE_AO;
WRITE_REG(cfg_val, rope_cfg);
}
/*
** Make sure the box crashes on rope errors.
*/
WRITE_REG(HF_ENABLE, ioc_hpa + ROPE0_CTL + j);
}
/* flush out the last writes */
READ_REG(sba_dev->ioc[i].ioc_hpa + ROPE7_CTL);
DBG_INIT(" ioc[%d] ROPE_CFG 0x%Lx ROPE_DBG 0x%Lx\n",

4
drivers/parisc/superio.c
View file

@ -155,7 +155,7 @@ superio_init(struct pci_dev *pcidev)
struct pci_dev *pdev = sio->lio_pdev;
u16 word;
if (sio->suckyio_irq_enabled)
if (sio->suckyio_irq_enabled)
return;
BUG_ON(!pdev);
@ -194,7 +194,7 @@ superio_init(struct pci_dev *pcidev)
request_region (sio->acpi_base, 0x1f, "acpi");
/* Enable the legacy I/O function */
pci_read_config_word (pdev, PCI_COMMAND, &word);
pci_read_config_word (pdev, PCI_COMMAND, &word);
word |= PCI_COMMAND_SERR | PCI_COMMAND_PARITY | PCI_COMMAND_IO;
pci_write_config_word (pdev, PCI_COMMAND, word);

17
include/asm-parisc/io.h
View file

@ -126,24 +126,17 @@ static inline void gsc_writeq(unsigned long long val, unsigned long addr)
extern void __iomem * __ioremap(unsigned long offset, unsigned long size, unsigned long flags);
/* Most machines react poorly to I/O-space being cacheable... Instead let's
* define ioremap() in terms of ioremap_nocache().
*/
extern inline void __iomem * ioremap(unsigned long offset, unsigned long size)
{
return __ioremap(offset, size, 0);
}
/*
* This one maps high address device memory and turns off caching for that area.
* it's useful if some control registers are in such an area and write combining
* or read caching is not desirable:
*/
extern inline void * ioremap_nocache(unsigned long offset, unsigned long size)
{
return __ioremap(offset, size, _PAGE_NO_CACHE /* _PAGE_PCD */);
return __ioremap(offset, size, _PAGE_NO_CACHE);
}
#define ioremap_nocache(off, sz) ioremap((off), (sz))
extern void iounmap(void __iomem *addr);
static inline unsigned char __raw_readb(const volatile void __iomem *addr)
{
return (*(volatile unsigned char __force *) (addr));

25
include/asm-parisc/page.h
View file

@ -1,13 +1,30 @@
#ifndef _PARISC_PAGE_H
#define _PARISC_PAGE_H
/* PAGE_SHIFT determines the page size */
#define PAGE_SHIFT 12
#define PAGE_SIZE (1UL << PAGE_SHIFT)
#define PAGE_MASK (~(PAGE_SIZE-1))
#if !defined(__KERNEL__)
/* this is for userspace applications (4k page size) */
# define PAGE_SHIFT 12 /* 4k */
# define PAGE_SIZE (1UL << PAGE_SHIFT)
# define PAGE_MASK (~(PAGE_SIZE-1))
#endif
#ifdef __KERNEL__
#include <linux/config.h>
#if defined(CONFIG_PARISC_PAGE_SIZE_4KB)
# define PAGE_SHIFT 12 /* 4k */
#elif defined(CONFIG_PARISC_PAGE_SIZE_16KB)
# define PAGE_SHIFT 14 /* 16k */
#elif defined(CONFIG_PARISC_PAGE_SIZE_64KB)
# define PAGE_SHIFT 16 /* 64k */
#else
# error "unknown default kernel page size"
#endif
#define PAGE_SIZE (1UL << PAGE_SHIFT)
#define PAGE_MASK (~(PAGE_SIZE-1))
#ifndef __ASSEMBLY__
#include <asm/types.h>

63
include/asm-parisc/pgtable.h
View file

@ -59,16 +59,15 @@
#define ISTACK_SIZE 32768 /* Interrupt Stack Size */
#define ISTACK_ORDER 3
/* This is the size of the initially mapped kernel memory (i.e. currently
* 0 to 1<<23 == 8MB */
/* This is the size of the initially mapped kernel memory */
#ifdef CONFIG_64BIT
#define KERNEL_INITIAL_ORDER 24
#define KERNEL_INITIAL_ORDER 24 /* 0 to 1<<24 = 16MB */
#else
#define KERNEL_INITIAL_ORDER 23
#define KERNEL_INITIAL_ORDER 23 /* 0 to 1<<23 = 8MB */
#endif
#define KERNEL_INITIAL_SIZE (1 << KERNEL_INITIAL_ORDER)
#ifdef CONFIG_64BIT
#if defined(CONFIG_64BIT) && defined(CONFIG_PARISC_PAGE_SIZE_4KB)
#define PT_NLEVELS 3
#define PGD_ORDER 1 /* Number of pages per pgd */
#define PMD_ORDER 1 /* Number of pages per pmd */
@ -111,11 +110,15 @@
#define MAX_ADDRBITS (PGDIR_SHIFT + BITS_PER_PGD)
#define MAX_ADDRESS (1UL << MAX_ADDRBITS)
#define SPACEID_SHIFT (MAX_ADDRBITS - 32)
#define SPACEID_SHIFT (MAX_ADDRBITS - 32)
/* This calculates the number of initial pages we need for the initial
* page tables */
#define PT_INITIAL (1 << (KERNEL_INITIAL_ORDER - PMD_SHIFT))
#if (KERNEL_INITIAL_ORDER) >= (PMD_SHIFT)
# define PT_INITIAL (1 << (KERNEL_INITIAL_ORDER - PMD_SHIFT))
#else
# define PT_INITIAL (1) /* all initial PTEs fit into one page */
#endif
/*
* pgd entries used up by user/kernel:
@ -160,6 +163,10 @@ extern void *vmalloc_start;
* to zero */
#define PTE_SHIFT xlate_pabit(_PAGE_USER_BIT)
/* PFN_PTE_SHIFT defines the shift of a PTE value to access the PFN field */
#define PFN_PTE_SHIFT 12
/* this is how many bits may be used by the file functions */
#define PTE_FILE_MAX_BITS (BITS_PER_LONG - PTE_SHIFT)
@ -188,7 +195,8 @@ extern void *vmalloc_start;
/* The pgd/pmd contains a ptr (in phys addr space); since all pgds/pmds
* are page-aligned, we don't care about the PAGE_OFFSET bits, except
* for a few meta-information bits, so we shift the address to be
* able to effectively address 40-bits of physical address space. */
* able to effectively address 40/42/44-bits of physical address space
* depending on 4k/16k/64k PAGE_SIZE */
#define _PxD_PRESENT_BIT 31
#define _PxD_ATTACHED_BIT 30
#define _PxD_VALID_BIT 29
@ -198,7 +206,7 @@ extern void *vmalloc_start;
#define PxD_FLAG_VALID (1 << xlate_pabit(_PxD_VALID_BIT))
#define PxD_FLAG_MASK (0xf)
#define PxD_FLAG_SHIFT (4)
#define PxD_VALUE_SHIFT (8)
#define PxD_VALUE_SHIFT (8) /* (PAGE_SHIFT-PxD_FLAG_SHIFT) */
#ifndef __ASSEMBLY__
@ -246,6 +254,7 @@ extern void *vmalloc_start;
#define __S110 PAGE_RWX
#define __S111 PAGE_RWX
extern pgd_t swapper_pg_dir[]; /* declared in init_task.c */
/* initial page tables for 0-8MB for kernel */
@ -272,7 +281,7 @@ extern unsigned long *empty_zero_page;
#define pgd_flag(x) (pgd_val(x) & PxD_FLAG_MASK)
#define pgd_address(x) ((unsigned long)(pgd_val(x) &~ PxD_FLAG_MASK) << PxD_VALUE_SHIFT)
#ifdef CONFIG_64BIT
#if PT_NLEVELS == 3
/* The first entry of the permanent pmd is not there if it contains
* the gateway marker */
#define pmd_none(x) (!pmd_val(x) || pmd_flag(x) == PxD_FLAG_ATTACHED)
@ -282,7 +291,7 @@ extern unsigned long *empty_zero_page;
#define pmd_bad(x) (!(pmd_flag(x) & PxD_FLAG_VALID))
#define pmd_present(x) (pmd_flag(x) & PxD_FLAG_PRESENT)
static inline void pmd_clear(pmd_t *pmd) {
#ifdef CONFIG_64BIT
#if PT_NLEVELS == 3
if (pmd_flag(*pmd) & PxD_FLAG_ATTACHED)
/* This is the entry pointing to the permanent pmd
* attached to the pgd; cannot clear it */
@ -303,7 +312,7 @@ static inline void pmd_clear(pmd_t *pmd) {
#define pgd_bad(x) (!(pgd_flag(x) & PxD_FLAG_VALID))
#define pgd_present(x) (pgd_flag(x) & PxD_FLAG_PRESENT)
static inline void pgd_clear(pgd_t *pgd) {
#ifdef CONFIG_64BIT
#if PT_NLEVELS == 3
if(pgd_flag(*pgd) & PxD_FLAG_ATTACHED)
/* This is the permanent pmd attached to the pgd; cannot
* free it */
@ -351,7 +360,7 @@ extern inline pte_t pte_mkwrite(pte_t pte) { pte_val(pte) |= _PAGE_WRITE; return
({ \
pte_t __pte; \
\
pte_val(__pte) = ((addr)+pgprot_val(pgprot)); \
pte_val(__pte) = ((((addr)>>PAGE_SHIFT)<<PFN_PTE_SHIFT) + pgprot_val(pgprot)); \
\
__pte; \
})
@ -361,20 +370,16 @@ extern inline pte_t pte_mkwrite(pte_t pte) { pte_val(pte) |= _PAGE_WRITE; return
static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot)
{
pte_t pte;
pte_val(pte) = (pfn << PAGE_SHIFT) | pgprot_val(pgprot);
pte_val(pte) = (pfn << PFN_PTE_SHIFT) | pgprot_val(pgprot);
return pte;
}
/* This takes a physical page address that is used by the remapping functions */
#define mk_pte_phys(physpage, pgprot) \
({ pte_t __pte; pte_val(__pte) = physpage + pgprot_val(pgprot); __pte; })
extern inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
{ pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); return pte; }
/* Permanent address of a page. On parisc we don't have highmem. */
#define pte_pfn(x) (pte_val(x) >> PAGE_SHIFT)
#define pte_pfn(x) (pte_val(x) >> PFN_PTE_SHIFT)
#define pte_page(pte) (pfn_to_page(pte_pfn(pte)))
@ -499,6 +504,26 @@ static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr,
#endif /* !__ASSEMBLY__ */
/* TLB page size encoding - see table 3-1 in parisc20.pdf */
#define _PAGE_SIZE_ENCODING_4K 0
#define _PAGE_SIZE_ENCODING_16K 1
#define _PAGE_SIZE_ENCODING_64K 2
#define _PAGE_SIZE_ENCODING_256K 3
#define _PAGE_SIZE_ENCODING_1M 4
#define _PAGE_SIZE_ENCODING_4M 5
#define _PAGE_SIZE_ENCODING_16M 6
#define _PAGE_SIZE_ENCODING_64M 7
#if defined(CONFIG_PARISC_PAGE_SIZE_4KB)
# define _PAGE_SIZE_ENCODING_DEFAULT _PAGE_SIZE_ENCODING_4K
#elif defined(CONFIG_PARISC_PAGE_SIZE_16KB)
# define _PAGE_SIZE_ENCODING_DEFAULT _PAGE_SIZE_ENCODING_16K
#elif defined(CONFIG_PARISC_PAGE_SIZE_64KB)
# define _PAGE_SIZE_ENCODING_DEFAULT _PAGE_SIZE_ENCODING_64K
#endif
#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
remap_pfn_range(vma, vaddr, pfn, size, prot)

8
include/asm-parisc/unistd.h
View file

@ -780,8 +780,14 @@
#define __NR_readlinkat (__NR_Linux + 285)
#define __NR_fchmodat (__NR_Linux + 286)
#define __NR_faccessat (__NR_Linux + 287)
#define __NR_unshare (__NR_Linux + 288)
#define __NR_set_robust_list (__NR_Linux + 289)
#define __NR_get_robust_list (__NR_Linux + 290)
#define __NR_splice (__NR_Linux + 291)
#define __NR_sync_file_range (__NR_Linux + 292)
#define __NR_tee (__NR_Linux + 293)
#define __NR_Linux_syscalls 288
#define __NR_Linux_syscalls 294
#define HPUX_GATEWAY_ADDR 0xC0000004
#define LINUX_GATEWAY_ADDR 0x100

198
sound/oss/ad1889.c
View file

@ -75,7 +75,7 @@ static inline void ad1889_set_wav_rate(ad1889_dev_t *dev, int rate)
DBG("Setting WAV rate to %d\n", rate);
dev->state[AD_WAV_STATE].dmabuf.rate = rate;
AD1889_WRITEW(dev, AD_DSWAS, rate);
AD1889_WRITEW(dev, AD_DS_WAS, rate);
/* Cycle the DAC to enable the new rate */
ac97_codec->codec_write(dev->ac97_codec, AC97_POWER_CONTROL, 0x0200);
@ -89,14 +89,14 @@ static inline void ad1889_set_wav_fmt(ad1889_dev_t *dev, int fmt)
DBG("Setting WAV format to 0x%x\n", fmt);
tmp = AD1889_READW(ad1889_dev, AD_DSWSMC);
tmp = AD1889_READW(ad1889_dev, AD_DS_WSMC);
if (fmt & AFMT_S16_LE) {
//tmp |= 0x0100; /* set WA16 */
tmp |= 0x0300; /* set WA16 stereo */
} else if (fmt & AFMT_U8) {
tmp &= ~0x0100; /* clear WA16 */
}
AD1889_WRITEW(ad1889_dev, AD_DSWSMC, tmp);
AD1889_WRITEW(ad1889_dev, AD_DS_WSMC, tmp);
}
static inline void ad1889_set_adc_fmt(ad1889_dev_t *dev, int fmt)
@ -105,13 +105,13 @@ static inline void ad1889_set_adc_fmt(ad1889_dev_t *dev, int fmt)
DBG("Setting ADC format to 0x%x\n", fmt);
tmp = AD1889_READW(ad1889_dev, AD_DSRAMC);
tmp = AD1889_READW(ad1889_dev, AD_DS_RAMC);
if (fmt & AFMT_S16_LE) {
tmp |= 0x0100; /* set WA16 */
} else if (fmt & AFMT_U8) {
tmp &= ~0x0100; /* clear WA16 */
}
AD1889_WRITEW(ad1889_dev, AD_DSRAMC, tmp);
AD1889_WRITEW(ad1889_dev, AD_DS_RAMC, tmp);
}
static void ad1889_start_wav(ad1889_state_t *state)
@ -145,21 +145,21 @@ static void ad1889_start_wav(ad1889_state_t *state)
dmabuf->rd_ptr, dmabuf->dma_len);
/* load up the current register set */
AD1889_WRITEL(ad1889_dev, AD_DMAWAVCC, cnt);
AD1889_WRITEL(ad1889_dev, AD_DMAWAVICC, cnt);
AD1889_WRITEL(ad1889_dev, AD_DMAWAVCA, dmabuf->dma_handle);
AD1889_WRITEL(ad1889_dev, AD_DMA_WAVCC, cnt);
AD1889_WRITEL(ad1889_dev, AD_DMA_WAVICC, cnt);
AD1889_WRITEL(ad1889_dev, AD_DMA_WAVCA, dmabuf->dma_handle);
/* TODO: for now we load the base registers with the same thing */
AD1889_WRITEL(ad1889_dev, AD_DMAWAVBC, cnt);
AD1889_WRITEL(ad1889_dev, AD_DMAWAVIBC, cnt);
AD1889_WRITEL(ad1889_dev, AD_DMAWAVBA, dmabuf->dma_handle);
AD1889_WRITEL(ad1889_dev, AD_DMA_WAVBC, cnt);
AD1889_WRITEL(ad1889_dev, AD_DMA_WAVIBC, cnt);
AD1889_WRITEL(ad1889_dev, AD_DMA_WAVBA, dmabuf->dma_handle);
/* and we're off to the races... */
AD1889_WRITEL(ad1889_dev, AD_DMACHSS, 0x8);
tmp = AD1889_READW(ad1889_dev, AD_DSWSMC);
AD1889_WRITEL(ad1889_dev, AD_DMA_CHSS, 0x8);
tmp = AD1889_READW(ad1889_dev, AD_DS_WSMC);
tmp |= 0x0400; /* set WAEN */
AD1889_WRITEW(ad1889_dev, AD_DSWSMC, tmp);
(void) AD1889_READW(ad1889_dev, AD_DSWSMC); /* flush posted PCI write */
AD1889_WRITEW(ad1889_dev, AD_DS_WSMC, tmp);
(void) AD1889_READW(ad1889_dev, AD_DS_WSMC); /* flush posted PCI write */
dmabuf->enable |= DAC_RUNNING;
@ -179,10 +179,10 @@ static void ad1889_stop_wav(ad1889_state_t *state)
u16 tmp;
unsigned long cnt = dmabuf->dma_len;
tmp = AD1889_READW(ad1889_dev, AD_DSWSMC);
tmp = AD1889_READW(ad1889_dev, AD_DS_WSMC);
tmp &= ~0x0400; /* clear WAEN */
AD1889_WRITEW(ad1889_dev, AD_DSWSMC, tmp);
(void) AD1889_READW(ad1889_dev, AD_DSWSMC); /* flush posted PCI write */
AD1889_WRITEW(ad1889_dev, AD_DS_WSMC, tmp);
(void) AD1889_READW(ad1889_dev, AD_DS_WSMC); /* flush posted PCI write */
pci_unmap_single(ad1889_dev->pci, dmabuf->dma_handle,
cnt, PCI_DMA_TODEVICE);
@ -211,7 +211,7 @@ static void ad1889_startstop_adc(ad1889_state_t *state, int start)
spin_lock_irqsave(&state->card->lock, flags);
tmp = AD1889_READW(ad1889_dev, AD_DSRAMC);
tmp = AD1889_READW(ad1889_dev, AD_DS_RAMC);
if (start) {
state->dmabuf.enable |= ADC_RUNNING;
tmp |= 0x0004; /* set ADEN */
@ -219,7 +219,7 @@ static void ad1889_startstop_adc(ad1889_state_t *state, int start)
state->dmabuf.enable &= ~ADC_RUNNING;
tmp &= ~0x0004; /* clear ADEN */
}
AD1889_WRITEW(ad1889_dev, AD_DSRAMC, tmp);
AD1889_WRITEW(ad1889_dev, AD_DS_RAMC, tmp);
spin_unlock_irqrestore(&state->card->lock, flags);
}
@ -301,53 +301,53 @@ static int ad1889_read_proc (char *page, char **start, off_t off,
int len, i;
ad1889_dev_t *dev = data;
ad1889_reg_t regs[] = {
{ "WSMC", AD_DSWSMC, 16 },
{ "RAMC", AD_DSRAMC, 16 },
{ "WADA", AD_DSWADA, 16 },
{ "SYDA", AD_DSSYDA, 16 },
{ "WAS", AD_DSWAS, 16 },
{ "RES", AD_DSRES, 16 },
{ "CCS", AD_DSCCS, 16 },
{ "ADCBA", AD_DMAADCBA, 32 },
{ "ADCCA", AD_DMAADCCA, 32 },
{ "ADCBC", AD_DMAADCBC, 32 },
{ "ADCCC", AD_DMAADCCC, 32 },
{ "ADCIBC", AD_DMAADCIBC, 32 },
{ "ADCICC", AD_DMAADCICC, 32 },
{ "ADCCTRL", AD_DMAADCCTRL, 16 },
{ "WAVBA", AD_DMAWAVBA, 32 },
{ "WAVCA", AD_DMAWAVCA, 32 },
{ "WAVBC", AD_DMAWAVBC, 32 },
{ "WAVCC", AD_DMAWAVCC, 32 },
{ "WAVIBC", AD_DMAWAVIBC, 32 },
{ "WAVICC", AD_DMAWAVICC, 32 },
{ "WAVCTRL", AD_DMAWAVCTRL, 16 },
{ "DISR", AD_DMADISR, 32 },
{ "CHSS", AD_DMACHSS, 32 },
{ "IPC", AD_GPIOIPC, 16 },
{ "OP", AD_GPIOOP, 16 },
{ "IP", AD_GPIOIP, 16 },
{ "ACIC", AD_ACIC, 16 },
{ "AC97_RESET", 0x100 + AC97_RESET, 16 },
{ "AC97_MASTER_VOL_STEREO", 0x100 + AC97_MASTER_VOL_STEREO, 16 },
{ "AC97_HEADPHONE_VOL", 0x100 + AC97_HEADPHONE_VOL, 16 },
{ "AC97_MASTER_VOL_MONO", 0x100 + AC97_MASTER_VOL_MONO, 16 },
{ "AC97_MASTER_TONE", 0x100 + AC97_MASTER_TONE, 16 },
{ "AC97_PCBEEP_VOL", 0x100 + AC97_PCBEEP_VOL, 16 },
{ "AC97_PHONE_VOL", 0x100 + AC97_PHONE_VOL, 16 },
{ "AC97_MIC_VOL", 0x100 + AC97_MIC_VOL, 16 },
{ "AC97_LINEIN_VOL", 0x100 + AC97_LINEIN_VOL, 16 },
{ "AC97_CD_VOL", 0x100 + AC97_CD_VOL, 16 },
{ "AC97_VIDEO_VOL", 0x100 + AC97_VIDEO_VOL, 16 },
{ "AC97_AUX_VOL", 0x100 + AC97_AUX_VOL, 16 },
{ "AC97_PCMOUT_VOL", 0x100 + AC97_PCMOUT_VOL, 16 },
{ "AC97_RECORD_SELECT", 0x100 + AC97_RECORD_SELECT, 16 },
{ "AC97_RECORD_GAIN", 0x100 + AC97_RECORD_GAIN, 16 },
{ "AC97_RECORD_GAIN_MIC", 0x100 + AC97_RECORD_GAIN_MIC, 16 },
{ "AC97_GENERAL_PURPOSE", 0x100 + AC97_GENERAL_PURPOSE, 16 },
{ "AC97_3D_CONTROL", 0x100 + AC97_3D_CONTROL, 16 },
{ "AC97_MODEM_RATE", 0x100 + AC97_MODEM_RATE, 16 },
{ "AC97_POWER_CONTROL", 0x100 + AC97_POWER_CONTROL, 16 },
{ "WSMC", AD_DS_WSMC, 16 },
{ "RAMC", AD_DS_RAMC, 16 },
{ "WADA", AD_DS_WADA, 16 },
{ "SYDA", AD_DS_SYDA, 16 },
{ "WAS", AD_DS_WAS, 16 },
{ "RES", AD_DS_RES, 16 },
{ "CCS", AD_DS_CCS, 16 },
{ "ADCBA", AD_DMA_ADCBA, 32 },
{ "ADCCA", AD_DMA_ADCCA, 32 },
{ "ADCBC", AD_DMA_ADCBC, 32 },
{ "ADCCC", AD_DMA_ADCCC, 32 },
{ "ADCIBC", AD_DMA_ADCIBC, 32 },
{ "ADCICC", AD_DMA_ADCICC, 32 },
{ "ADCCTRL", AD_DMA_ADCCTRL, 16 },
{ "WAVBA", AD_DMA_WAVBA, 32 },
{ "WAVCA", AD_DMA_WAVCA, 32 },
{ "WAVBC", AD_DMA_WAVBC, 32 },
{ "WAVCC", AD_DMA_WAVCC, 32 },
{ "WAVIBC", AD_DMA_WAVIBC, 32 },
{ "WAVICC", AD_DMA_WAVICC, 32 },
{ "WAVCTRL", AD_DMA_WAVCTRL, 16 },
{ "DISR", AD_DMA_DISR, 32 },
{ "CHSS", AD_DMA_CHSS, 32 },
{ "IPC", AD_GPIO_IPC, 16 },
{ "OP", AD_GPIO_OP, 16 },
{ "IP", AD_GPIO_IP, 16 },
{ "ACIC", AD_AC97_ACIC, 16 },
{ "AC97_RESET", AD_AC97_BASE + AC97_RESET, 16 },
{ "AC97_MASTER_VOL_STEREO", AD_AC97_BASE + AC97_MASTER_VOL_STEREO, 16 },
{ "AC97_HEADPHONE_VOL", AD_AC97_BASE + AC97_HEADPHONE_VOL, 16 },
{ "AC97_MASTER_VOL_MONO", AD_AC97_BASE + AC97_MASTER_VOL_MONO, 16 },
{ "AC97_MASTER_TONE", AD_AC97_BASE + AC97_MASTER_TONE, 16 },
{ "AC97_PCBEEP_VOL", AD_AC97_BASE + AC97_PCBEEP_VOL, 16 },
{ "AC97_PHONE_VOL", AD_AC97_BASE + AC97_PHONE_VOL, 16 },
{ "AC97_MIC_VOL", AD_AC97_BASE + AC97_MIC_VOL, 16 },
{ "AC97_LINEIN_VOL", AD_AC97_BASE + AC97_LINEIN_VOL, 16 },
{ "AC97_CD_VOL", AD_AC97_BASE + AC97_CD_VOL, 16 },
{ "AC97_VIDEO_VOL", AD_AC97_BASE + AC97_VIDEO_VOL, 16 },
{ "AC97_AUX_VOL", AD_AC97_BASE + AC97_AUX_VOL, 16 },
{ "AC97_PCMOUT_VOL", AD_AC97_BASE + AC97_PCMOUT_VOL, 16 },
{ "AC97_RECORD_SELECT", AD_AC97_BASE + AC97_RECORD_SELECT, 16 },
{ "AC97_RECORD_GAIN", AD_AC97_BASE + AC97_RECORD_GAIN, 16 },
{ "AC97_RECORD_GAIN_MIC", AD_AC97_BASE + AC97_RECORD_GAIN_MIC, 16 },
{ "AC97_GENERAL_PURPOSE", AD_AC97_BASE + AC97_GENERAL_PURPOSE, 16 },
{ "AC97_3D_CONTROL", AD_AC97_BASE + AC97_3D_CONTROL, 16 },
{ "AC97_MODEM_RATE", AD_AC97_BASE + AC97_MODEM_RATE, 16 },
{ "AC97_POWER_CONTROL", AD_AC97_BASE + AC97_POWER_CONTROL, 16 },
{ NULL }
};
@ -400,9 +400,9 @@ static inline unsigned long ad1889_get_dma_addr(ad1889_state_t *state)
}
if (dmabuf->enable & DAC_RUNNING)
offset = le32_to_cpu(AD1889_READL(state->card, AD_DMAWAVBA));
offset = le32_to_cpu(AD1889_READL(state->card, AD_DMA_WAVBA));
else
offset = le32_to_cpu(AD1889_READL(state->card, AD_DMAADCBA));
offset = le32_to_cpu(AD1889_READL(state->card, AD_DMA_ADCBA));
return (unsigned long)bus_to_virt((unsigned long)offset) - (unsigned long)dmabuf->rawbuf;
}
@ -639,9 +639,9 @@ static int ad1889_ioctl(struct inode *inode, struct file *file, unsigned int cmd
if (val > 5400 && val < 48000)
{
if (file->f_mode & FMODE_WRITE)
AD1889_WRITEW(ad1889_dev, AD_DSWAS, val);
AD1889_WRITEW(ad1889_dev, AD_DS_WAS, val);
if (file->f_mode & FMODE_READ)
AD1889_WRITEW(ad1889_dev, AD_DSRES, val);
AD1889_WRITEW(ad1889_dev, AD_DS_RES, val);
}
return 0;
@ -649,22 +649,22 @@ static int ad1889_ioctl(struct inode *inode, struct file *file, unsigned int cmd
if (get_user(val, p))
return -EFAULT;
if (file->f_mode & FMODE_READ) {
val = AD1889_READW(ad1889_dev, AD_DSWSMC);
val = AD1889_READW(ad1889_dev, AD_DS_WSMC);
if (val) {
val |= 0x0200; /* set WAST */
} else {
val &= ~0x0200; /* clear WAST */
}
AD1889_WRITEW(ad1889_dev, AD_DSWSMC, val);
AD1889_WRITEW(ad1889_dev, AD_DS_WSMC, val);
}
if (file->f_mode & FMODE_WRITE) {
val = AD1889_READW(ad1889_dev, AD_DSRAMC);
val = AD1889_READW(ad1889_dev, AD_DS_RAMC);
if (val) {
val |= 0x0002; /* set ADST */
} else {
val &= ~0x0002; /* clear ADST */
}
AD1889_WRITEW(ad1889_dev, AD_DSRAMC, val);
AD1889_WRITEW(ad1889_dev, AD_DS_RAMC, val);
}
return 0;
@ -739,7 +739,7 @@ static int ad1889_ioctl(struct inode *inode, struct file *file, unsigned int cmd
break;
case SOUND_PCM_READ_RATE:
return put_user(AD1889_READW(ad1889_dev, AD_DSWAS), p);
return put_user(AD1889_READW(ad1889_dev, AD_DS_WAS), p);
case SOUND_PCM_READ_CHANNELS:
case SOUND_PCM_READ_BITS:
@ -769,7 +769,7 @@ static int ad1889_open(struct inode *inode, struct file *file)
ad1889_set_wav_rate(ad1889_dev, 48000);
ad1889_set_wav_fmt(ad1889_dev, AFMT_S16_LE);
AD1889_WRITEW(ad1889_dev, AD_DSWADA, 0x0404); /* attenuation */
AD1889_WRITEW(ad1889_dev, AD_DS_WADA, 0x0404); /* attenuation */
return nonseekable_open(inode, file);
}
@ -826,15 +826,15 @@ static void ad1889_codec_write(struct ac97_codec *ac97, u8 reg, u16 val)
{
ad1889_dev_t *dev = ac97->private_data;
//DBG("Writing 0x%x to 0x%lx\n", val, dev->regbase + 0x100 + reg);
AD1889_WRITEW(dev, 0x100 + reg, val);
//DBG("Writing 0x%x to 0x%lx\n", val, dev->regbase + AD_AC97_BASE + reg);
AD1889_WRITEW(dev, AD_AC97_BASE + reg, val);
}
static u16 ad1889_codec_read(struct ac97_codec *ac97, u8 reg)
{
ad1889_dev_t *dev = ac97->private_data;
//DBG("Reading from 0x%lx\n", dev->regbase + 0x100 + reg);
return AD1889_READW(dev, 0x100 + reg);
//DBG("Reading from 0x%lx\n", dev->regbase + AD_AC97_BASE + reg);
return AD1889_READW(dev, AD_AC97_BASE + reg);
}
static int ad1889_ac97_init(ad1889_dev_t *dev, int id)
@ -883,24 +883,24 @@ static int ad1889_aclink_reset(struct pci_dev * pcidev)
int retry = 200;
ad1889_dev_t *dev = pci_get_drvdata(pcidev);
AD1889_WRITEW(dev, AD_DSCCS, 0x8000); /* turn on clock */
AD1889_READW(dev, AD_DSCCS);
AD1889_WRITEW(dev, AD_DS_CCS, 0x8000); /* turn on clock */
AD1889_READW(dev, AD_DS_CCS);
WAIT_10MS();
stat = AD1889_READW(dev, AD_ACIC);
stat = AD1889_READW(dev, AD_AC97_ACIC);
stat |= 0x0002; /* Reset Disable */
AD1889_WRITEW(dev, AD_ACIC, stat);
(void) AD1889_READW(dev, AD_ACIC); /* flush posted write */
AD1889_WRITEW(dev, AD_AC97_ACIC, stat);
(void) AD1889_READW(dev, AD_AC97_ACIC); /* flush posted write */
udelay(10);
stat = AD1889_READW(dev, AD_ACIC);
stat = AD1889_READW(dev, AD_AC97_ACIC);
stat |= 0x0001; /* Interface Enable */
AD1889_WRITEW(dev, AD_ACIC, stat);
AD1889_WRITEW(dev, AD_AC97_ACIC, stat);
do {
if (AD1889_READW(dev, AD_ACIC) & 0x8000) /* Ready */
if (AD1889_READW(dev, AD_AC97_ACIC) & 0x8000) /* Ready */
break;
WAIT_10MS();
retry--;
@ -908,16 +908,16 @@ static int ad1889_aclink_reset(struct pci_dev * pcidev)
if (!retry) {
printk(KERN_ERR "ad1889_aclink_reset: codec is not ready [0x%x]\n",
AD1889_READW(dev, AD_ACIC));
AD1889_READW(dev, AD_AC97_ACIC));
return -EBUSY;
}
/* TODO reset AC97 codec */
/* TODO set wave/adc pci ctrl status */
stat = AD1889_READW(dev, AD_ACIC);
stat = AD1889_READW(dev, AD_AC97_ACIC);
stat |= 0x0004; /* Audio Stream Output Enable */
AD1889_WRITEW(dev, AD_ACIC, stat);
AD1889_WRITEW(dev, AD_AC97_ACIC, stat);
return 0;
}
@ -935,10 +935,10 @@ static irqreturn_t ad1889_interrupt(int irq, void *dev_id, struct pt_regs *regs)
u32 stat;
ad1889_dev_t *dev = (ad1889_dev_t *)dev_id;
stat = AD1889_READL(dev, AD_DMADISR);
stat = AD1889_READL(dev, AD_DMA_DISR);
/* clear ISR */
AD1889_WRITEL(dev, AD_DMADISR, stat);
AD1889_WRITEL(dev, AD_DMA_DISR, stat);
if (stat & 0x8) { /* WAVI */
DBG("WAV interrupt\n");
@ -964,15 +964,15 @@ static void ad1889_initcfg(ad1889_dev_t *dev)
u32 tmp32;
/* make sure the interrupt bits are setup the way we want */
tmp32 = AD1889_READL(dev, AD_DMAWAVCTRL);
tmp32 = AD1889_READL(dev, AD_DMA_WAVCTRL);
tmp32 &= ~0xff; /* flat dma, no sg, mask out the intr bits */
tmp32 |= 0x6; /* intr on count, loop */
AD1889_WRITEL(dev, AD_DMAWAVCTRL, tmp32);
AD1889_WRITEL(dev, AD_DMA_WAVCTRL, tmp32);
/* unmute... */
tmp16 = AD1889_READW(dev, AD_DSWADA);
tmp16 = AD1889_READW(dev, AD_DS_WADA);
tmp16 &= ~0x8080;
AD1889_WRITEW(dev, AD_DSWADA, tmp16);
AD1889_WRITEW(dev, AD_DS_WADA, tmp16);
}
static int __devinit ad1889_probe(struct pci_dev *pcidev, const struct pci_device_id *ent)
@ -1005,7 +1005,7 @@ static int __devinit ad1889_probe(struct pci_dev *pcidev, const struct pci_devic
goto out1;
}
dev->regbase = ioremap_nocache(bar, AD_DSIOMEMSIZE);
dev->regbase = ioremap_nocache(bar, AD_DS_IOMEMSIZE);
if (!dev->regbase) {
printk(KERN_ERR DEVNAME ": unable to remap iomem\n");
goto out2;

97
sound/oss/ad1889.h
View file

@ -1,57 +1,58 @@
#ifndef _AD1889_H_
#define _AD1889_H_
#define AD_DSWSMC 0x00 /* DMA input wave/syn mixer control */
#define AD_DSRAMC 0x02 /* DMA output resamp/ADC mixer control */
#define AD_DSWADA 0x04 /* DMA input wave attenuation */
#define AD_DSSYDA 0x06 /* DMA input syn attentuation */
#define AD_DSWAS 0x08 /* wave input sample rate */
#define AD_DSRES 0x0a /* resampler output sample rate */
#define AD_DSCCS 0x0c /* chip control/status */
#define AD_DS_WSMC 0x00 /* DMA input wave/syn mixer control */
#define AD_DS_RAMC 0x02 /* DMA output resamp/ADC mixer control */
#define AD_DS_WADA 0x04 /* DMA input wave attenuation */
#define AD_DS_SYDA 0x06 /* DMA input syn attentuation */
#define AD_DS_WAS 0x08 /* wave input sample rate */
#define AD_DS_RES 0x0a /* resampler output sample rate */
#define AD_DS_CCS 0x0c /* chip control/status */
#define AD_DMARESBA 0x40 /* RES base addr */
#define AD_DMARESCA 0x44 /* RES current addr */
#define AD_DMARESBC 0x48 /* RES base cnt */
#define AD_DMARESCC 0x4c /* RES current count */
#define AD_DMAADCBA 0x50 /* ADC */
#define AD_DMAADCCA 0x54
#define AD_DMAADCBC 0x58
#define AD_DMAADCCC 0x5c
#define AD_DMASYNBA 0x60 /* SYN */
#define AD_DMASYNCA 0x64
#define AD_DMASYNBC 0x68
#define AD_DMASYNCC 0x6c
#define AD_DMAWAVBA 0x70 /* WAV */
#define AD_DMAWAVCA 0x74
#define AD_DMAWAVBC 0x78
#define AD_DMAWAVCC 0x7c
#define AD_DMARESICC 0x80 /* RES interrupt current count */
#define AD_DMARESIBC 0x84 /* RES interrupt base count */
#define AD_DMAADCICC 0x88 /* ADC interrupt current count */
#define AD_DMAADCIBC 0x8c /* ADC interrupt base count */
#define AD_DMASYNICC 0x90 /* SYN interrupt current count */
#define AD_DMASYNIBC 0x94 /* SYN interrupt base count */
#define AD_DMAWAVICC 0x98 /* WAV interrupt current count */
#define AD_DMAWAVIBC 0x9c /* WAV interrupt base count */
#define AD_DMARESCTRL 0xa0 /* RES PCI control/status */
#define AD_DMAADCCTRL 0xa8 /* ADC PCI control/status */
#define AD_DMASYNCTRL 0xb0 /* SYN PCI control/status */
#define AD_DMAWAVCTRL 0xb8 /* WAV PCI control/status */
#define AD_DMADISR 0xc0 /* PCI DMA intr status */
#define AD_DMACHSS 0xc4 /* PCI DMA channel stop status */
#define AD_DMA_RESBA 0x40 /* RES base addr */
#define AD_DMA_RESCA 0x44 /* RES current addr */
#define AD_DMA_RESBC 0x48 /* RES base cnt */
#define AD_DMA_RESCC 0x4c /* RES current count */
#define AD_DMA_ADCBA 0x50 /* ADC */
#define AD_DMA_ADCCA 0x54
#define AD_DMA_ADCBC 0x58
#define AD_DMA_ADCCC 0x5c
#define AD_DMA_SYNBA 0x60 /* SYN */
#define AD_DMA_SYNCA 0x64
#define AD_DMA_SYNBC 0x68
#define AD_DMA_SYNCC 0x6c
#define AD_DMA_WAVBA 0x70 /* WAV */
#define AD_DMA_WAVCA 0x74
#define AD_DMA_WAVBC 0x78
#define AD_DMA_WAVCC 0x7c
#define AD_DMA_RESICC 0x80 /* RES interrupt current count */
#define AD_DMA_RESIBC 0x84 /* RES interrupt base count */
#define AD_DMA_ADCICC 0x88 /* ADC interrupt current count */
#define AD_DMA_ADCIBC 0x8c /* ADC interrupt base count */
#define AD_DMA_SYNICC 0x90 /* SYN interrupt current count */
#define AD_DMA_SYNIBC 0x94 /* SYN interrupt base count */
#define AD_DMA_WAVICC 0x98 /* WAV interrupt current count */
#define AD_DMA_WAVIBC 0x9c /* WAV interrupt base count */
#define AD_DMA_RESCTRL 0xa0 /* RES PCI control/status */
#define AD_DMA_ADCCTRL 0xa8 /* ADC PCI control/status */
#define AD_DMA_SYNCTRL 0xb0 /* SYN PCI control/status */
#define AD_DMA_WAVCTRL 0xb8 /* WAV PCI control/status */
#define AD_DMA_DISR 0xc0 /* PCI DMA intr status */
#define AD_DMA_CHSS 0xc4 /* PCI DMA channel stop status */
#define AD_GPIOIPC 0xc8 /* IO port ctrl */
#define AD_GPIOOP 0xca /* IO output status */
#define AD_GPIOIP 0xcc /* IO input status */
#define AD_GPIO_IPC 0xc8 /* IO port ctrl */
#define AD_GPIO_OP 0xca /* IO output status */
#define AD_GPIO_IP 0xcc /* IO input status */
/* AC97 registers, 0x100 - 0x17f; see ac97.h */
#define AD_ACIC 0x180 /* AC Link interface ctrl */
#define AD_AC97_BASE 0x100 /* ac97 base register */
#define AD_AC97_ACIC 0x180 /* AC Link interface ctrl */
/* OPL3; BAR1 */
#define AD_OPLM0AS 0x00 /* Music0 address/status */
#define AD_OPLM0DATA 0x01 /* Music0 data */
#define AD_OPLM1A 0x02 /* Music1 address */
#define AD_OPLM1DATA 0x03 /* Music1 data */
#define AD_OPL_M0AS 0x00 /* Music0 address/status */
#define AD_OPL_M0DATA 0x01 /* Music0 data */
#define AD_OPL_M1A 0x02 /* Music1 address */
#define AD_OPL_M1DATA 0x03 /* Music1 data */
/* 0x04-0x0f reserved */
/* MIDI; BAR2 */
@ -59,9 +60,9 @@
#define AD_MISC 0x01 /* MIDI status/cmd */
/* 0x02-0xff reserved */
#define AD_DSIOMEMSIZE 512
#define AD_OPLMEMSIZE 16
#define AD_MIDIMEMSIZE 16
#define AD_DS_IOMEMSIZE 512
#define AD_OPL_MEMSIZE 16
#define AD_MIDI_MEMSIZE 16
#define AD_WAV_STATE 0
#define AD_ADC_STATE 1