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ARM: SoC DT updates for 3.19

Browse source 
The DT branch adds a lot of new stuff for additional SoC and board
 support. The branch is the largest one and contains 513 out of the
 total 972 non-merge arm-soc changesets for 3.19.
 
 Most of the changes are about enabling additional on-chip devices for
 existing machines, but there are also an unusual number of new SoC
 types being added this time:
 
 * AMLogic Meson8
 * ARM Realview in DT mode
 * Allwinner A80
 * Broadcom BCM47081
 * Broadcom Cygnus
 * Freescale LS1021A
 * Freescale Vybrid 500 series
 * Mediatek MT6592, MT8127, MT8135
 * STMicroelectronics STiH410
 * Samsung Exynos4415
 
 The level of support for the above differs widely, some are just
 stubs with nothing more than CPU, memory and a UART, but others
 are fairly complete. As usual, these get extended over time.
 
 There are also many new boards getting added, this is the
 list of model strings that are showing up in new dts files:
 
 * ARM RealView PB1176
 * Altera SOCFPGA Arria 10
 * Asus RT-N18U (BCM47081)
 * Buffalo WZR-1750DHP (BCM4708)
 * Buffalo WZR-600DHP2 (BCM47081)
 * Cygnus Enterprise Phone (BCM911360_ENTPHN)
 * D-Link DIR-665
 * Google Spring
 * IGEP COM MODULE Rev. G (TI OMAP AM/DM37x)
 * IGEPv2 Rev. F (TI OMAP AM/DM37x)
 * LS1021A QDS Board
 * LS1021A TWR Board
 * LeMaker Banana Pi
 * MarsBoard RK3066
 * MediaTek MT8127 Moose Board
 * MediaTek MT8135 evaluation board
 * Mele M3
 * Merrii A80 Optimus Board
 * Netgear R6300 V2 (BCM4708)
 * Nomadik STN8815NHK
 * NovaTech OrionLXm
 * Olimex A20-OLinuXino-LIME2
 * Raspberry Pi Model B+
 * STiH410 B2120
 * Samsung Monk board
 * Samsung Rinato board
 * Synology DS213j
 * Synology DS414
 * TBS2910 Matrix ARM mini PC
 * TI AM5728 BeagleBoard-X15
 * Toradex Colibri VF50 on Colibri Evaluation Board
 * Zynq ZYBO Development Board
 
 Other notable changes include:
 
 * exynos: cleanup of existing dts files
 * mvebu: improved pinctrl support for Armada 370/XP
 * nomadik: restructuring dts files
 * omap: added CAN bus support
 * shmobile: added clock support for some SoCs
 * shmobile: added sound support for some SoCs
 * sirf: reset controller support
 * sunxi: continuing the relicensing under dual GPL/MIT
 * sunxi: lots of new on-chip device support
 * sunxi: working simplefb support (long awaited)
 * various: provide stdout-path property for earlycon
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Merge tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC DT updates from Arnd Bergmann:
 "The DT branch adds a lot of new stuff for additional SoC and board
  support.  The branch is the largest one and contains 513 out of the
  total 972 non-merge arm-soc changesets for 3.19.

  Most of the changes are about enabling additional on-chip devices for
  existing machines, but there are also an unusual number of new SoC
  types being added this time:

   - AMLogic Meson8
   - ARM Realview in DT mode
   - Allwinner A80
   - Broadcom BCM47081
   - Broadcom Cygnus
   - Freescale LS1021A
   - Freescale Vybrid 500 series
   - Mediatek MT6592, MT8127, MT8135
   - STMicroelectronics STiH410
   - Samsung Exynos4415

  The level of support for the above differs widely, some are just stubs
  with nothing more than CPU, memory and a UART, but others are fairly
  complete.  As usual, these get extended over time.

  There are also many new boards getting added, this is the list of
  model strings that are showing up in new dts files:

   - ARM RealView PB1176
   - Altera SOCFPGA Arria 10
   - Asus RT-N18U (BCM47081)
   - Buffalo WZR-1750DHP (BCM4708)
   - Buffalo WZR-600DHP2 (BCM47081)
   - Cygnus Enterprise Phone (BCM911360_ENTPHN)
   - D-Link DIR-665
   - Google Spring
   - IGEP COM MODULE Rev. G (TI OMAP AM/DM37x)
   - IGEPv2 Rev. F (TI OMAP AM/DM37x)
   - LS1021A QDS Board
   - LS1021A TWR Board
   - LeMaker Banana Pi
   - MarsBoard RK3066
   - MediaTek MT8127 Moose Board
   - MediaTek MT8135 evaluation board
   - Mele M3
   - Merrii A80 Optimus Board
   - Netgear R6300 V2 (BCM4708)
   - Nomadik STN8815NHK
   - NovaTech OrionLXm
   - Olimex A20-OLinuXino-LIME2
   - Raspberry Pi Model B+
   - STiH410 B2120
   - Samsung Monk board
   - Samsung Rinato board
   - Synology DS213j
   - Synology DS414
   - TBS2910 Matrix ARM mini PC
   - TI AM5728 BeagleBoard-X15
   - Toradex Colibri VF50 on Colibri Evaluation Board
   - Zynq ZYBO Development Board

  Other notable changes include:

   - exynos: cleanup of existing dts files
   - mvebu: improved pinctrl support for Armada 370/XP
   - nomadik: restructuring dts files
   - omap: added CAN bus support
   - shmobile: added clock support for some SoCs
   - shmobile: added sound support for some SoCs
   - sirf: reset controller support
   - sunxi: continuing the relicensing under dual GPL/MIT
   - sunxi: lots of new on-chip device support
   - sunxi: working simplefb support (long awaited)
   - various: provide stdout-path property for earlycon"

* tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (510 commits)
  ARM: dts: rk3288: add arm,cpu-registers-not-fw-configured
  Revert "ARM: dts: rockchip: temporarily disable smp on rk3288"
  ARM: BCM5301X: Add DT for Buffalo WZR-600DHP2
  ARM: BCM5301X: Add DT for Asus RT-N18U
  ARM: BCM5301X: Add DT for Buffalo WZR-1750DHP
  ARM: BCM5301X: Add DT for Netgear R6300 V2
  ARM: BCM5301X: Add buttons for Netgear R6250
  ARM: dts: rockchip: Add input voltage supply regulators in pmic for Marsboard
  ARM: BCM5301X: Add IRQs to Broadcom's bus-axi in DTS file
  arm: dts: zynq: Add Digilent ZYBO board
  arm: dts: zynq: Move crystal freq. to board level
  doc: dt: vendor-prefixes: Add Digilent Inc
  Documentation: devicetree: Fix Xilinx VDMA specification
  ARM: dts: rockchip: set FIFO size for SDMMC, SDIO and EMMC on rk3066 and rk3188
  ARM: dts: rockchip: add label property for leds on Radxa Rock
  ARM: BCM5301X: Add LEDs for Netgear R6250 V1
  ARM: BCM5301X: Add Broadcom's bus-axi to the DTS file
  ARM: dts: add sysreg phandle to i2c device nodes for exynos
  ARM: dts: Remove unused bootargs from exynos3250-rinato
  ARM: dts: add board dts file for Exynos3250-based Monk board
  ...
This commit is contained in:
Linus Torvalds 2014-12-09 14:57:37 -08:00
commit 6da314122d
297 changed files with 20509 additions and 3351 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

65
Documentation/devicetree/bindings/arm/arm-boards
View file

@ -92,3 +92,68 @@ Required nodes:
- core-module: the root node to the Versatile platforms must have
a core-module with regs and the compatible strings
"arm,core-module-versatile", "syscon"
ARM RealView Boards
-------------------
The RealView boards cover tailored evaluation boards that are used to explore
the ARM11 and Cortex A-8 and Cortex A-9 processors.
Required properties (in root node):
/* RealView Emulation Baseboard */
compatible = "arm,realview-eb";
/* RealView Platform Baseboard for ARM1176JZF-S */
compatible = "arm,realview-pb1176";
/* RealView Platform Baseboard for ARM11 MPCore */
compatible = "arm,realview-pb11mp";
/* RealView Platform Baseboard for Cortex A-8 */
compatible = "arm,realview-pba8";
/* RealView Platform Baseboard Explore for Cortex A-9 */
compatible = "arm,realview-pbx";
Required nodes:
- soc: some node of the RealView platforms must be the SoC
node that contain the SoC-specific devices, withe the compatible
string set to one of these tuples:
"arm,realview-eb-soc", "simple-bus"
"arm,realview-pb1176-soc", "simple-bus"
"arm,realview-pb11mp-soc", "simple-bus"
"arm,realview-pba8-soc", "simple-bus"
"arm,realview-pbx-soc", "simple-bus"
- syscon: some subnode of the RealView SoC node must be a
system controller node pointing to the control registers,
with the compatible string set to one of these tuples:
"arm,realview-eb-syscon", "syscon"
"arm,realview-pb1176-syscon", "syscon"
"arm,realview-pb11mp-syscon", "syscon"
"arm,realview-pba8-syscon", "syscon"
"arm,realview-pbx-syscon", "syscon"
Required properties for the system controller:
- regs: the location and size of the system controller registers,
one range of 0x1000 bytes.
Example:
/dts-v1/;
#include <dt-bindings/interrupt-controller/irq.h>
#include "skeleton.dtsi"
/ {
model = "ARM RealView PB1176 with device tree";
compatible = "arm,realview-pb1176";
soc {
#address-cells = <1>;
#size-cells = <1>;
compatible = "arm,realview-pb1176-soc", "simple-bus";
ranges;
syscon: syscon@10000000 {
compatible = "arm,realview-syscon", "syscon";
reg = <0x10000000 0x1000>;
};
};
};

31
Documentation/devicetree/bindings/arm/bcm/cygnus.txt Normal file
View file

@ -0,0 +1,31 @@
Broadcom Cygnus device tree bindings
------------------------------------
Boards with Cygnus SoCs shall have the following properties:
Required root node property:
BCM11300
compatible = "brcm,bcm11300", "brcm,cygnus";
BCM11320
compatible = "brcm,bcm11320", "brcm,cygnus";
BCM11350
compatible = "brcm,bcm11350", "brcm,cygnus";
BCM11360
compatible = "brcm,bcm11360", "brcm,cygnus";
BCM58300
compatible = "brcm,bcm58300", "brcm,cygnus";
BCM58302
compatible = "brcm,bcm58302", "brcm,cygnus";
BCM58303
compatible = "brcm,bcm58303", "brcm,cygnus";
BCM58305
compatible = "brcm,bcm58305", "brcm,cygnus";

38
Documentation/devicetree/bindings/arm/fsl.txt
View file

@ -74,3 +74,41 @@ Required root node properties:
i.MX6q generic board
Required root node properties:
- compatible = "fsl,imx6q";
Freescale LS1021A Platform Device Tree Bindings
------------------------------------------------
Required root node compatible properties:
- compatible = "fsl,ls1021a";
Freescale LS1021A SoC-specific Device Tree Bindings
-------------------------------------------
Freescale SCFG
SCFG is the supplemental configuration unit, that provides SoC specific
configuration and status registers for the chip. Such as getting PEX port
status.
Required properties:
- compatible: should be "fsl,ls1021a-scfg"
- reg: should contain base address and length of SCFG memory-mapped registers
Example:
scfg: scfg@1570000 {
compatible = "fsl,ls1021a-scfg";
reg = <0x0 0x1570000 0x0 0x10000>;
};
Freescale DCFG
DCFG is the device configuration unit, that provides general purpose
configuration and status for the device. Such as setting the secondary
core start address and release the secondary core from holdoff and startup.
Required properties:
- compatible: should be "fsl,ls1021a-dcfg"
- reg : should contain base address and length of DCFG memory-mapped registers
Example:
dcfg: dcfg@1ee0000 {
compatible = "fsl,ls1021a-dcfg";
reg = <0x0 0x1ee0000 0x0 0x10000>;
};

1
Documentation/devicetree/bindings/arm/gic.txt
View file

@ -17,6 +17,7 @@ Main node required properties:
"arm,cortex-a7-gic"
"arm,arm11mp-gic"
"brcm,brahma-b15-gic"
"arm,arm1176jzf-devchip-gic"
- interrupt-controller : Identifies the node as an interrupt controller
- #interrupt-cells : Specifies the number of cells needed to encode an
interrupt source. The type shall be a <u32> and the value shall be 3.

10
Documentation/devicetree/bindings/arm/marvell,berlin.txt
View file

@ -106,11 +106,21 @@ Required subnode-properties:
- groups: a list of strings describing the group names.
- function: a string describing the function used to mux the groups.
* Reset controller binding
A reset controller is part of the chip control registers set. The chip control
node also provides the reset. The register set is not at the same offset between
Berlin SoCs.
Required property:
- #reset-cells: must be set to 2
Example:
chip: chip-control@ea0000 {
compatible = "marvell,berlin2-chip-ctrl";
#clock-cells = <1>;
#reset-cells = <2>;
reg = <0xea0000 0x400>;
clocks = <&refclk>, <&externaldev 0>;
clock-names = "refclk", "video_ext0";

19
Documentation/devicetree/bindings/arm/mediatek.txt
View file

@ -1,10 +1,14 @@
Mediatek MT6589 Platforms Device Tree Bindings
MediaTek mt65xx & mt81xx Platforms Device Tree Bindings
Boards with a SoC of the Mediatek MT6589 shall have the following property:
Boards with a MediaTek mt65xx/mt81xx SoC shall have the following property:
Required root node property:
compatible: must contain "mediatek,mt6589"
compatible: Must contain one of
"mediatek,mt6589"
"mediatek,mt6592"
"mediatek,mt8127"
"mediatek,mt8135"
Supported boards:
@ -12,3 +16,12 @@ Supported boards:
- bq Aquaris5 smart phone:
Required root node properties:
- compatible = "mundoreader,bq-aquaris5", "mediatek,mt6589";
- Evaluation board for MT6592:
Required root node properties:
- compatible = "mediatek,mt6592-evb", "mediatek,mt6592";
- MTK mt8127 tablet moose EVB:
Required root node properties:
- compatible = "mediatek,mt8127-moose", "mediatek,mt8127";
- MTK mt8135 tablet EVB:
Required root node properties:
- compatible = "mediatek,mt8135-evbp1", "mediatek,mt8135";

3
Documentation/devicetree/bindings/arm/omap/omap.txt
View file

@ -132,6 +132,9 @@ Boards:
- AM335X Bone : Low cost community board
compatible = "ti,am335x-bone", "ti,am33xx", "ti,omap3"
- AM335X OrionLXm : Substation Automation Platform
compatible = "novatech,am335x-lxm", "ti,am33xx"
- OMAP5 EVM : Evaluation Module
compatible = "ti,omap5-evm", "ti,omap5"

4
Documentation/devicetree/bindings/arm/rockchip.txt
View file

@ -1,6 +1,10 @@
Rockchip platforms device tree bindings
---------------------------------------
- MarsBoard RK3066 board:
Required root node properties:
- compatible = "haoyu,marsboard-rk3066", "rockchip,rk3066a";
- bq Curie 2 tablet:
Required root node properties:
- compatible = "mundoreader,bq-curie2", "rockchip,rk3066a";

19
Documentation/devicetree/bindings/arm/samsung-boards.txt
View file

@ -1,11 +1,20 @@
* Samsung's Exynos4210 based SMDKV310 evaluation board
SMDKV310 evaluation board is based on Samsung's Exynos4210 SoC.
* Samsung's Exynos SoC based boards
Required root node properties:
- compatible = should be one or more of the following.
(a) "samsung,smdkv310" - for Samsung's SMDKV310 eval board.
(b) "samsung,exynos4210" - for boards based on Exynos4210 SoC.
- "samsung,monk" - for Exynos3250-based Samsung Simband board.
- "samsung,rinato" - for Exynos3250-based Samsung Gear2 board.
- "samsung,smdkv310" - for Exynos4210-based Samsung SMDKV310 eval board.
- "samsung,trats" - for Exynos4210-based Tizen Reference board.
- "samsung,universal_c210" - for Exynos4210-based Samsung board.
- "samsung,smdk4412", - for Exynos4412-based Samsung SMDK4412 eval board.
- "samsung,trats2" - for Exynos4412-based Tizen Reference board.
- "samsung,smdk5250" - for Exynos5250-based Samsung SMDK5250 eval board.
- "samsung,xyref5260" - for Exynos5260-based Samsung board.
- "samsung,smdk5410" - for Exynos5410-based Samsung SMDK5410 eval board.
- "samsung,smdk5420" - for Exynos5420-based Samsung SMDK5420 eval board.
- "samsung,sd5v1" - for Exynos5440-based Samsung board.
- "samsung,ssdk5440" - for Exynos5440-based Samsung board.
Optional:
- firmware node, specifying presence and type of secure firmware:

6
Documentation/devicetree/bindings/arm/ste-nomadik.txt
View file

@ -10,6 +10,12 @@ Required root node property: src
Boards with the Nomadik SoC include:
Nomadik NHK-15 board manufactured by ST Microelectronics:
Required root node property:
compatible="st,nomadik-nhk-15";
S8815 "MiniKit" manufactured by Calao Systems:
Required root node property:

34
Documentation/devicetree/bindings/clock/bcm-cygnus-clock.txt Normal file
View file

@ -0,0 +1,34 @@
Broadcom Cygnus Clocks
This binding uses the common clock binding:
Documentation/devicetree/bindings/clock/clock-bindings.txt
Currently various "fixed" clocks are declared for peripheral drivers that use
the common clock framework to reference their core clocks. Proper support of
these clocks will be added later
Device tree example:
clocks {
#address-cells = <1>;
#size-cells = <1>;
ranges;
osc: oscillator {
compatible = "fixed-clock";
#clock-cells = <1>;
clock-frequency = <25000000>;
};
apb_clk: apb_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <1000000000>;
};
periph_clk: periph_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <500000000>;
};
};

15
Documentation/devicetree/bindings/clock/vf610-clock.txt
View file

@ -5,6 +5,19 @@ Required properties:
- reg: Address and length of the register set
- #clock-cells: Should be <1>
Optional properties:
- clocks: list of clock identifiers which are external input clocks to the
given clock controller. Please refer the next section to find
the input clocks for a given controller.
- clock-names: list of names of clocks which are exteral input clocks to the
given clock controller.
Input clocks for top clock controller:
- sxosc (external crystal oscillator 32KHz, recommended)
- fxosc (external crystal oscillator 24MHz, recommended)
- audio_ext
- enet_ext
The clock consumer should specify the desired clock by having the clock
ID in its "clocks" phandle cell. See include/dt-bindings/clock/vf610-clock.h
for the full list of VF610 clock IDs.
@ -15,6 +28,8 @@ clks: ccm@4006b000 {
compatible = "fsl,vf610-ccm";
reg = <0x4006b000 0x1000>;
#clock-cells = <1>;
clocks = <&sxosc>, <&fxosc>;
clock-names = "sxosc", "fxosc";
};
uart1: serial@40028000 {

2
Documentation/devicetree/bindings/dma/xilinx/xilinx_vdma.txt
View file

@ -25,7 +25,7 @@ Required child node properties:
- compatible: It should be either "xlnx,axi-vdma-mm2s-channel" or
"xlnx,axi-vdma-s2mm-channel".
- interrupts: Should contain per channel VDMA interrupts.
- xlnx,data-width: Should contain the stream data width, take values
- xlnx,datawidth: Should contain the stream data width, take values
{32,64...1024}.
Optional child node properties:

1
Documentation/devicetree/bindings/i2c/i2c-s3c2410.txt
View file

@ -32,6 +32,7 @@ Optional properties:
specified, default value is 0.
- samsung,i2c-max-bus-freq: Desired frequency in Hz of the bus. If not
specified, the default value in Hz is 100000.
- samsung,sysreg-phandle - handle to syscon used to control the system registers
Example:

2
Documentation/devicetree/bindings/i2c/trivial-devices.txt
View file

@ -56,6 +56,8 @@ gmt,g751 G751: Digital Temperature Sensor and Thermal Watchdog with Two-Wire In
infineon,slb9635tt Infineon SLB9635 (Soft-) I2C TPM (old protocol, max 100khz)
infineon,slb9645tt Infineon SLB9645 I2C TPM (new protocol, max 400khz)
isl,isl12057 Intersil ISL12057 I2C RTC Chip
isil,isl29028 (deprecated, use isl)
isl,isl29028 Intersil ISL29028 Ambient Light and Proximity Sensor
maxim,ds1050 5 Bit Programmable, Pulse-Width Modulator
maxim,max1237 Low-Power, 4-/12-Channel, 2-Wire Serial, 12-Bit ADCs
maxim,max6625 9-Bit/12-Bit Temperature Sensors with I²C-Compatible Serial Interface

2
Documentation/devicetree/bindings/timer/renesas,mtu2.txt
View file

@ -1,4 +1,4 @@
* Renesas R-Car Multi-Function Timer Pulse Unit 2 (MTU2)
* Renesas Multi-Function Timer Pulse Unit 2 (MTU2)
The MTU2 is a multi-purpose, multi-channel timer/counter with configurable
clock inputs and programmable compare match.

4
Documentation/devicetree/bindings/timer/renesas,tmu.txt
View file

@ -1,4 +1,4 @@
* Renesas R-Car Timer Unit (TMU)
* Renesas R-Mobile/R-Car Timer Unit (TMU)
The TMU is a 32-bit timer/counter with configurable clock inputs and
programmable compare match.
@ -9,6 +9,8 @@ are independent. The TMU hardware supports up to three channels.
Required Properties:
- compatible: must contain one or more of the following:
- "renesas,tmu-r8a7740" for the r8a7740 TMU
- "renesas,tmu-r8a7778" for the r8a7778 TMU
- "renesas,tmu-r8a7779" for the r8a7779 TMU
- "renesas,tmu" for any TMU.
This is a fallback for the above renesas,tmu-* entries

3
Documentation/devicetree/bindings/vendor-prefixes.txt
View file

@ -41,6 +41,7 @@ dallas Maxim Integrated Products (formerly Dallas Semiconductor)
davicom DAVICOM Semiconductor, Inc.
denx Denx Software Engineering
digi Digi International Inc.
digilent Diglent, Inc.
dlg Dialog Semiconductor
dlink D-Link Corporation
dmo Data Modul AG
@ -78,6 +79,7 @@ innolux Innolux Corporation
intel Intel Corporation
intercontrol Inter Control Group
isee ISEE 2007 S.L.
isil Intersil (deprecated, use isl)
isl Intersil
karo Ka-Ro electronics GmbH
keymile Keymile GmbH
@ -150,6 +152,7 @@ st STMicroelectronics
ste ST-Ericsson
stericsson ST-Ericsson
synology Synology, Inc.
tbs TBS Technologies
thine THine Electronics, Inc.
ti Texas Instruments
tlm Trusted Logic Mobility

53
arch/arm/boot/dts/Makefile
View file

@ -54,8 +54,17 @@ dtb-$(CONFIG_ARCH_AT91) += at91-sama5d4ek.dtb
dtb-$(CONFIG_ARCH_ATLAS6) += atlas6-evb.dtb
dtb-$(CONFIG_ARCH_AXXIA) += axm5516-amarillo.dtb
dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
dtb-$(CONFIG_ARCH_BCM_5301X) += bcm4708-netgear-r6250.dtb
dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b-plus.dtb
dtb-$(CONFIG_ARCH_BCM_5301X) += \
bcm4708-buffalo-wzr-1750dhp.dtb \
bcm4708-netgear-r6250.dtb \
bcm4708-netgear-r6300-v2.dtb \
bcm47081-asus-rt-n18u.dtb \
bcm47081-buffalo-wzr-600dhp2.dtb
dtb-$(CONFIG_ARCH_BCM_63XX) += bcm963138dvt.dtb
dtb-$(CONFIG_ARCH_BCM_CYGNUS) += bcm911360_entphn.dtb \
bcm911360k.dtb \
bcm958300k.dtb
dtb-$(CONFIG_ARCH_BCM_MOBILE) += bcm28155-ap.dtb \
bcm21664-garnet.dtb
dtb-$(CONFIG_ARCH_BERLIN) += \
@ -67,7 +76,9 @@ dtb-$(CONFIG_ARCH_BRCMSTB) += \
dtb-$(CONFIG_ARCH_DAVINCI) += da850-enbw-cmc.dtb \
da850-evm.dtb
dtb-$(CONFIG_ARCH_EFM32) += efm32gg-dk3750.dtb
dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
dtb-$(CONFIG_ARCH_EXYNOS) += exynos3250-monk.dtb \
exynos3250-rinato.dtb \
exynos4210-origen.dtb \
exynos4210-smdkv310.dtb \
exynos4210-trats.dtb \
exynos4210-universal_c210.dtb \
@ -81,6 +92,7 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
exynos5250-arndale.dtb \
exynos5250-smdk5250.dtb \
exynos5250-snow.dtb \
exynos5250-spring.dtb \
exynos5260-xyref5260.dtb \
exynos5410-smdk5410.dtb \
exynos5420-arndale-octa.dtb \
@ -104,6 +116,7 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += kirkwood-b3.dtb \
kirkwood-d2net.dtb \
kirkwood-db-88f6281.dtb \
kirkwood-db-88f6282.dtb \
kirkwood-dir665.dtb \
kirkwood-dns320.dtb \
kirkwood-dns325.dtb \
kirkwood-dockstar.dtb \
@ -240,6 +253,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
imx6q-sabrelite.dtb \
imx6q-sabresd.dtb \
imx6q-sbc6x.dtb \
imx6q-tbs2910.dtb \
imx6q-udoo.dtb \
imx6q-wandboard.dtb \
imx6q-wandboard-revb1.dtb \
@ -250,6 +264,9 @@ dtb-$(CONFIG_ARCH_MXC) += \
imx6q-tx6q-1110.dtb \
imx6sl-evk.dtb \
imx6sx-sdb.dtb \
ls1021a-qds.dtb \
ls1021a-twr.dtb \
vf500-colibri-eval-v3.dtb \
vf610-colibri-eval-v3.dtb \
vf610-cosmic.dtb \
vf610-twr.dtb
@ -274,7 +291,8 @@ dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \
imx28-m28evk.dtb \
imx28-sps1.dtb \
imx28-tx28.dtb
dtb-$(CONFIG_ARCH_NOMADIK) += ste-nomadik-s8815.dtb
dtb-$(CONFIG_ARCH_NOMADIK) += ste-nomadik-s8815.dtb \
ste-nomadik-nhk15.dtb
dtb-$(CONFIG_ARCH_NSPIRE) += nspire-cx.dtb \
nspire-tp.dtb \
nspire-clp.dtb
@ -302,7 +320,9 @@ dtb-$(CONFIG_ARCH_OMAP3) += am3517-craneboard.dtb \
omap3-ha.dtb \
omap3-ha-lcd.dtb \
omap3-igep0020.dtb \
omap3-igep0020-rev-f.dtb \
omap3-igep0030.dtb \
omap3-igep0030-rev-g.dtb \
omap3-ldp.dtb \
omap3-lilly-dbb056.dtb \
omap3-n900.dtb \
@ -331,7 +351,8 @@ dtb-$(CONFIG_SOC_AM33XX) += am335x-base0033.dtb \
am335x-evm.dtb \
am335x-evmsk.dtb \
am335x-nano.dtb \
am335x-pepper.dtb
am335x-pepper.dtb \
am335x-lxm.dtb
dtb-$(CONFIG_ARCH_OMAP4) += omap4-duovero-parlor.dtb \
omap4-panda.dtb \
omap4-panda-a4.dtb \
@ -347,6 +368,7 @@ dtb-$(CONFIG_SOC_OMAP5) += omap5-cm-t54.dtb \
omap5-sbc-t54.dtb \
omap5-uevm.dtb
dtb-$(CONFIG_SOC_DRA7XX) += dra7-evm.dtb \
am57xx-beagle-x15.dtb \
dra72-evm.dtb
dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-d2-network.dtb \
orion5x-lacie-ethernet-disk-mini-v2.dtb \
@ -363,8 +385,10 @@ dtb-$(CONFIG_ARCH_QCOM) += \
qcom-msm8660-surf.dtb \
qcom-msm8960-cdp.dtb \
qcom-msm8974-sony-xperia-honami.dtb
dtb-$(CONFIG_ARCH_REALVIEW) += arm-realview-pb1176.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3066a-bqcurie2.dtb \
rk3066a-marsboard.dtb \
rk3188-radxarock.dtb \
rk3288-evb-act8846.dtb \
rk3288-evb-rk808.dtb
@ -396,6 +420,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d.dtb \
r8a7791-koelsch.dtb \
r8a7794-alt.dtb
dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_arria5_socdk.dtb \
socfpga_arria10_socdk.dtb \
socfpga_cyclone5_socdk.dtb \
socfpga_cyclone5_sockit.dtb \
socfpga_cyclone5_socrates.dtb \
@ -408,6 +433,7 @@ dtb-$(CONFIG_ARCH_SPEAR3XX)+= spear300-evb.dtb \
spear320-hmi.dtb
dtb-$(CONFIG_ARCH_SPEAR6XX)+= spear600-evb.dtb
dtb-$(CONFIG_ARCH_STI)+= stih407-b2120.dtb \
stih410-b2120.dtb \
stih415-b2000.dtb \
stih415-b2020.dtb \
stih416-b2000.dtb \
@ -434,15 +460,20 @@ dtb-$(CONFIG_MACH_SUN6I) += \
sun6i-a31-hummingbird.dtb \
sun6i-a31-m9.dtb
dtb-$(CONFIG_MACH_SUN7I) += \
sun7i-a20-bananapi.dtb \
sun7i-a20-cubieboard2.dtb \
sun7i-a20-cubietruck.dtb \
sun7i-a20-hummingbird.dtb \
sun7i-a20-i12-tvbox.dtb \
sun7i-a20-m3.dtb \
sun7i-a20-olinuxino-lime.dtb \
sun7i-a20-olinuxino-lime2.dtb \
sun7i-a20-olinuxino-micro.dtb \
sun7i-a20-pcduino3.dtb
dtb-$(CONFIG_MACH_SUN8I) += \
sun8i-a23-ippo-q8h-v5.dtb
dtb-$(CONFIG_MACH_SUN9I) += \
sun9i-a80-optimus.dtb
dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
tegra20-iris-512.dtb \
tegra20-medcom-wide.dtb \
@ -488,13 +519,15 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
zynq-parallella.dtb \
zynq-zc702.dtb \
zynq-zc706.dtb \
zynq-zed.dtb
zynq-zed.dtb \
zynq-zybo.dtb
dtb-$(CONFIG_MACH_ARMADA_370) += \
armada-370-db.dtb \
armada-370-mirabox.dtb \
armada-370-netgear-rn102.dtb \
armada-370-netgear-rn104.dtb \
armada-370-rd.dtb
armada-370-rd.dtb \
armada-370-synology-ds213j.dtb
dtb-$(CONFIG_MACH_ARMADA_375) += \
armada-375-db.dtb
dtb-$(CONFIG_MACH_ARMADA_38X) += \
@ -507,14 +540,18 @@ dtb-$(CONFIG_MACH_ARMADA_XP) += \
armada-xp-lenovo-ix4-300d.dtb \
armada-xp-matrix.dtb \
armada-xp-netgear-rn2120.dtb \
armada-xp-openblocks-ax3-4.dtb
armada-xp-openblocks-ax3-4.dtb \
armada-xp-synology-ds414.dtb
dtb-$(CONFIG_MACH_DOVE) += dove-cm-a510.dtb \
dove-cubox.dtb \
dove-cubox-es.dtb \
dove-d2plug.dtb \
dove-d3plug.dtb \
dove-dove-db.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt6589-aquaris5.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt6589-aquaris5.dtb \
mt6592-evb.dtb \
mt8127-moose.dtb \
mt8135-evbp1.dtb
endif

17
arch/arm/boot/dts/am335x-evm.dts
View file

@ -307,6 +307,13 @@
0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
>;
};
dcan1_pins_default: dcan1_pins_default {
pinctrl-single,pins = <
0x168 (PIN_OUTPUT | MUX_MODE2) /* uart0_ctsn.d_can1_tx */
0x16c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* uart0_rtsn.d_can1_rx */
>;
};
};
&uart0 {
@ -437,9 +444,9 @@
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&nandflash_pins_s0>;
ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */
nand@0,0 {
reg = <0 0 0>; /* CS0, offset 0 */
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
ti,nand-ecc-opt = "bch8";
ti,elm-id = <&elm>;
nand-bus-width = <8>;
@ -664,3 +671,9 @@
&aes {
status = "okay";
};
&dcan1 {
status = "disabled"; /* Enable only if Profile 1 is selected */
pinctrl-names = "default";
pinctrl-0 = <&dcan1_pins_default>;
};

4
arch/arm/boot/dts/am335x-igep0033.dtsi
View file

@ -126,10 +126,10 @@
pinctrl-names = "default";
pinctrl-0 = <&nandflash_pins>;
ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */
nand@0,0 {
reg = <0 0 0>; /* CS0, offset 0 */
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
nand-bus-width = <8>;
ti,nand-ecc-opt = "bch8";
gpmc,device-width = <1>;

362
arch/arm/boot/dts/am335x-lxm.dts Normal file
View file

@ -0,0 +1,362 @@
/*
* Copyright (C) 2014 NovaTech LLC - http://www.novatechweb.com
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include "am33xx.dtsi"
/ {
model = "NovaTech OrionLXm";
compatible = "novatech,am335x-lxm", "ti,am33xx";
cpus {
cpu@0 {
cpu0-supply = <&vdd1_reg>;
};
};
memory {
device_type = "memory";
reg = <0x80000000 0x20000000>; /* 512 MB */
};
/* Power supply provides a fixed 5V @2A */
vbat: fixedregulator@0 {
compatible = "regulator-fixed";
regulator-name = "vbat";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
};
/* Power supply provides a fixed 3.3V @3A */
vmmcsd_fixed: fixedregulator@1 {
compatible = "regulator-fixed";
regulator-name = "vmmcsd_fixed";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
};
};
&am33xx_pinmux {
mmc1_pins: pinmux_mmc1_pins {
pinctrl-single,pins = <
0xf0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3 */
0xf4 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2 */
0xf8 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1 */
0xfc (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0 */
0x100 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk */
0x104 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd */
>;
};
i2c0_pins: pinmux_i2c0_pins {
pinctrl-single,pins = <
0x188 (PIN_INPUT | MUX_MODE0) /* i2c0_sda.i2c0_sda */
0x18c (PIN_INPUT | MUX_MODE0) /* i2c0_scl.i2c0_scl */
>;
};
cpsw_default: cpsw_default {
pinctrl-single,pins = <
/* Slave 1 */
0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_int */
0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* rmii1_crs_dv */
0x110 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* rmii1_rxer */
0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* rmii1_txen */
0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* rmii1_td1 */
0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* rmii1_td0 */
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* rmii1_rd1 */
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* rmii1_rd0 */
0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii1_refclk */
/* Slave 2 */
0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* rmii2_txen */
0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* rmii2_td1 */
0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* rmii2_td0 */
0x68 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* rmii2_rd1 */
0x6c (PIN_INPUT_PULLDOWN | MUX_MODE3) /* rmii2_rd0 */
0x70 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* rmii2_crs_dv */
0x74 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* rmii2_rxer */
0x78 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_int */
0x108 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* rmii2_refclk */
>;
};
cpsw_sleep: cpsw_sleep {
pinctrl-single,pins = <
/* Slave 1 reset value */
0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_int */
0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_crs_dv */
0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_rxer */
0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_txen */
0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_td1 */
0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_td0 */
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_rd1 */
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_rd0 */
0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_refclk */
/* Slave 2 reset value*/
0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_txen */
0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_td1 */
0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_td0 */
0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_rd1 */
0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_rd0 */
0x70 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_crs_dv */
0x74 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_rxer */
0x78 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_int */
0x108 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii2_refclk */
>;
};
davinci_mdio_default: davinci_mdio_default {
pinctrl-single,pins = <
/* MDIO */
0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
>;
};
davinci_mdio_sleep: davinci_mdio_sleep {
pinctrl-single,pins = <
/* MDIO reset value */
0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
emmc_pins: pinmux_emmc_pins {
pinctrl-single,pins = <
0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
0x10 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
0x14 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
0x18 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
>;
};
uart0_pins: pinmux_uart0_pins {
pinctrl-single,pins = <
0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
>;
};
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
status = "okay";
clock-frequency = <400000>;
serial_config1: serial_config1@20 {
compatible = "nxp,pca9539";
reg = <0x20>;
};
serial_config2: serial_config2@21 {
compatible = "nxp,pca9539";
reg = <0x21>;
};
tps: tps@2d {
compatible = "ti,tps65910";
reg = <0x2d>;
};
};
/include/ "tps65910.dtsi"
&tps {
vcc1-supply = <&vbat>;
vcc2-supply = <&vbat>;
vcc3-supply = <&vbat>;
vcc4-supply = <&vbat>;
vcc5-supply = <&vbat>;
vcc6-supply = <&vbat>;
vcc7-supply = <&vbat>;
vccio-supply = <&vbat>;
regulators {
/* vrtc - unused */
vio_reg: regulator@1 {
regulator-name = "vio_1v5,ddr";
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-boot-on;
regulator-always-on;
};
vdd1_reg: regulator@2 {
regulator-name = "vdd1,mpu";
regulator-min-microvolt = <600000>;
regulator-max-microvolt = <1500000>;
regulator-boot-on;
regulator-always-on;
};
vdd2_reg: regulator@3 {
regulator-name = "vdd2_1v1,core";
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-boot-on;
regulator-always-on;
};
/* vdd3 - unused */
/* vdig1 - unused */
vdig2_reg: regulator@6 {
regulator-name = "vdig2_1v8,vdds_pll";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
/* vpll - unused */
vdac_reg: regulator@8 {
regulator-name = "vdac_1v8,vdds";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
vaux1_reg: regulator@9 {
regulator-name = "vaux1_1v8,usb";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
vaux2_reg: regulator@10 {
regulator-name = "vaux2_3v3,io";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
vaux33_reg: regulator@11 {
regulator-name = "vaux33_3v3,usb";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
vmmc_reg: regulator@12 {
regulator-name = "vmmc_3v3,io";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
};
};
&sham {
status = "okay";
};
&aes {
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
&usb {
status = "okay";
};
&usb_ctrl_mod {
status = "okay";
};
&usb0_phy {
status = "okay";
};
&usb1_phy {
status = "okay";
};
&usb0 {
status = "okay";
dr_mode = "host";
};
&usb1 {
status = "okay";
dr_mode = "host";
};
&cppi41dma {
status = "okay";
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <5>;
phy-mode = "rmii";
dual_emac_res_vlan = <2>;
};
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <4>;
phy-mode = "rmii";
dual_emac_res_vlan = <3>;
};
&mac {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&cpsw_default>;
pinctrl-1 = <&cpsw_sleep>;
dual_emac = <1>;
status = "okay";
};
&davinci_mdio {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay";
};
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
vmmc-supply = <&vmmcsd_fixed>;
bus-width = <4>;
status = "okay";
};
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&emmc_pins>;
vmmc-supply = <&vmmcsd_fixed>;
bus-width = <8>;
ti,non-removable;
status = "okay";
};

32
arch/arm/boot/dts/am33xx.dtsi
View file

@ -83,6 +83,11 @@
};
};
am33xx_control_module: control_module@4a002000 {
compatible = "syscon";
reg = <0x44e10000 0x7fc>;
};
am33xx_pinmux: pinmux@44e10800 {
compatible = "pinctrl-single";
reg = <0x44e10800 0x0238>;
@ -204,6 +209,8 @@
reg = <0x44e09000 0x2000>;
interrupts = <72>;
status = "disabled";
dmas = <&edma 26>, <&edma 27>;
dma-names = "tx", "rx";
};
uart1: serial@48022000 {
@ -213,6 +220,8 @@
reg = <0x48022000 0x2000>;
interrupts = <73>;
status = "disabled";
dmas = <&edma 28>, <&edma 29>;
dma-names = "tx", "rx";
};
uart2: serial@48024000 {
@ -222,6 +231,8 @@
reg = <0x48024000 0x2000>;
interrupts = <74>;
status = "disabled";
dmas = <&edma 30>, <&edma 31>;
dma-names = "tx", "rx";
};
uart3: serial@481a6000 {
@ -333,20 +344,24 @@
interrupts = <91>;
};
dcan0: d_can@481cc000 {
compatible = "bosch,d_can";
dcan0: can@481cc000 {
compatible = "ti,am3352-d_can";
ti,hwmods = "d_can0";
reg = <0x481cc000 0x2000
0x44e10644 0x4>;
reg = <0x481cc000 0x2000>;
clocks = <&dcan0_fck>;
clock-names = "fck";
syscon-raminit = <&am33xx_control_module 0x644 0>;
interrupts = <52>;
status = "disabled";
};
dcan1: d_can@481d0000 {
compatible = "bosch,d_can";
dcan1: can@481d0000 {
compatible = "ti,am3352-d_can";
ti,hwmods = "d_can1";
reg = <0x481d0000 0x2000
0x44e10644 0x4>;
reg = <0x481d0000 0x2000>;
clocks = <&dcan1_fck>;
clock-names = "fck";
syscon-raminit = <&am33xx_control_module 0x644 1>;
interrupts = <55>;
status = "disabled";
};
@ -356,6 +371,7 @@
reg = <0x480C8000 0x200>;
interrupts = <77>;
ti,hwmods = "mailbox";
#mbox-cells = <1>;
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <8>;
mbox_wkupm3: wkup_m3 {

48
arch/arm/boot/dts/am4372.dtsi
View file

@ -57,6 +57,11 @@
cache-level = <2>;
};
am43xx_control_module: control_module@4a002000 {
compatible = "syscon";
reg = <0x44e10000 0x7f4>;
};
am43xx_pinmux: pinmux@44e10800 {
compatible = "ti,am437-padconf", "pinctrl-single";
reg = <0x44e10800 0x31c>;
@ -168,6 +173,7 @@
reg = <0x480C8000 0x200>;
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mailbox";
#mbox-cells = <1>;
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <8>;
mbox_wkupm3: wkup_m3 {
@ -667,6 +673,26 @@
};
};
tscadc: tscadc@44e0d000 {
compatible = "ti,am3359-tscadc";
reg = <0x44e0d000 0x1000>;
ti,hwmods = "adc_tsc";
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&adc_tsc_fck>;
clock-names = "fck";
status = "disabled";
tsc {
compatible = "ti,am3359-tsc";
};
adc {
#io-channel-cells = <1>;
compatible = "ti,am3359-adc";
};
};
sham: sham@53100000 {
compatible = "ti,omap5-sham";
ti,hwmods = "sham";
@ -896,6 +922,28 @@
compatible = "mmio-sram";
reg = <0x40300000 0x40000>; /* 256k */
};
dcan0: can@481cc000 {
compatible = "ti,am4372-d_can", "ti,am3352-d_can";
ti,hwmods = "d_can0";
clocks = <&dcan0_fck>;
clock-names = "fck";
reg = <0x481cc000 0x2000>;
syscon-raminit = <&am43xx_control_module 0x644 0>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
dcan1: can@481d0000 {
compatible = "ti,am4372-d_can", "ti,am3352-d_can";
ti,hwmods = "d_can1";
clocks = <&dcan1_fck>;
clock-names = "fck";
reg = <0x481d0000 0x2000>;
syscon-raminit = <&am43xx_control_module 0x644 1>;
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
};
};

34
arch/arm/boot/dts/am437x-gp-evm.dts
View file

@ -254,6 +254,20 @@
0x238 (PIN_OUTPUT_PULLUP | MUX_MODE7)
>;
};
dcan0_default: dcan0_default_pins {
pinctrl-single,pins = <
0x178 (PIN_OUTPUT | MUX_MODE2) /* uart1_ctsn.d_can0_tx */
0x17c (PIN_INPUT_PULLUP | MUX_MODE2) /* uart1_rtsn.d_can0_rx */
>;
};
dcan1_default: dcan1_default_pins {
pinctrl-single,pins = <
0x180 (PIN_OUTPUT | MUX_MODE2) /* uart1_rxd.d_can1_tx */
0x184 (PIN_INPUT_PULLUP | MUX_MODE2) /* uart1_txd.d_can1_rx */
>;
};
};
&i2c0 {
@ -343,6 +357,14 @@
status = "okay";
};
&tscadc {
status = "okay";
adc {
ti,adc-channels = <0 1 2 3 4 5 6 7>;
};
};
&ecap0 {
status = "okay";
pinctrl-names = "default";
@ -511,3 +533,15 @@
};
};
};
&dcan0 {
pinctrl-names = "default";
pinctrl-0 = <&dcan0_default>;
status = "okay";
};
&dcan1 {
pinctrl-names = "default";
pinctrl-0 = <&dcan1_default>;
status = "okay";
};

12
arch/arm/boot/dts/am43x-epos-evm.dts
View file

@ -438,9 +438,9 @@
status = "okay"; /* Disable QSPI when enabling GPMC (NAND) */
pinctrl-names = "default";
pinctrl-0 = <&nand_flash_x8>;
ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */
nand@0,0 {
reg = <0 0 0>; /* CS0, offset 0 */
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
ti,nand-ecc-opt = "bch16";
ti,elm-id = <&elm>;
nand-bus-width = <8>;
@ -519,6 +519,14 @@
status = "okay";
};
&tscadc {
status = "okay";
adc {
ti,adc-channels = <0 1 2 3 4 5 6 7>;
};
};
&ecap0 {
status = "okay";
pinctrl-names = "default";

405
arch/arm/boot/dts/am57xx-beagle-x15.dts Normal file
View file

@ -0,0 +1,405 @@
/*
* Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include "dra74x.dtsi"
#include <dt-bindings/clk/ti-dra7-atl.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "TI AM5728 BeagleBoard-X15";
compatible = "ti,am572x-beagle-x15", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7";
aliases {
rtc0 = &mcp_rtc;
rtc1 = &tps659038_rtc;
};
memory {
device_type = "memory";
reg = <0x80000000 0x80000000>;
};
vdd_3v3: fixedregulator-vdd_3v3 {
compatible = "regulator-fixed";
regulator-name = "vdd_3v3";
vin-supply = <&regen1>;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
vtt_fixed: fixedregulator-vtt {
/* TPS51200 */
compatible = "regulator-fixed";
regulator-name = "vtt_fixed";
vin-supply = <&smps3_reg>;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
enable-active-high;
gpio = <&gpio7 11 GPIO_ACTIVE_HIGH>;
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&leds_pins_default>;
led@0 {
label = "beagle-x15:usr0";
gpios = <&gpio7 9 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
default-state = "off";
};
led@1 {
label = "beagle-x15:usr1";
gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "cpu0";
default-state = "off";
};
led@2 {
label = "beagle-x15:usr2";
gpios = <&gpio7 14 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc0";
default-state = "off";
};
led@3 {
label = "beagle-x15:usr3";
gpios = <&gpio7 15 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "ide-disk";
default-state = "off";
};
};
};
&dra7_pmx_core {
leds_pins_default: leds_pins_default {
pinctrl-single,pins = <
0x3a8 (PIN_OUTPUT | MUX_MODE14) /* spi1_d1.gpio7_8 */
0x3ac (PIN_OUTPUT | MUX_MODE14) /* spi1_d0.gpio7_9 */
0x3c0 (PIN_OUTPUT | MUX_MODE14) /* spi2_sclk.gpio7_14 */
0x3c4 (PIN_OUTPUT | MUX_MODE14) /* spi2_d1.gpio7_15 */
>;
};
i2c1_pins_default: i2c1_pins_default {
pinctrl-single,pins = <
0x400 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda.sda */
0x404 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl.scl */
>;
};
i2c3_pins_default: i2c3_pins_default {
pinctrl-single,pins = <
0x2a4 (PIN_INPUT| MUX_MODE10) /* mcasp1_aclkx.i2c3_sda */
0x2a8 (PIN_INPUT| MUX_MODE10) /* mcasp1_fsx.i2c3_scl */
>;
};
uart3_pins_default: uart3_pins_default {
pinctrl-single,pins = <
0x248 (PIN_INPUT_SLEW | MUX_MODE0) /* uart3_rxd.rxd */
0x24c (PIN_INPUT_SLEW | MUX_MODE0) /* uart3_txd.txd */
>;
};
mmc1_pins_default: mmc1_pins_default {
pinctrl-single,pins = <
0x36c (PIN_INPUT | MUX_MODE14) /* mmc1sdcd.gpio219 */
0x354 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
0x358 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
0x35c (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
0x360 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
0x364 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
0x368 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
>;
};
mmc2_pins_default: mmc2_pins_default {
pinctrl-single,pins = <
0x9c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
0xb0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
0xa0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
0xa4 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
0xa8 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
0xac (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
0x8c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
0x90 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
0x94 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
0x98 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
>;
};
tps659038_pins_default: tps659038_pins_default {
pinctrl-single,pins = <
0x418 (PIN_INPUT_PULLUP | MUX_MODE14) /* wakeup0.gpio1_0 */
>;
};
tmp102_pins_default: tmp102_pins_default {
pinctrl-single,pins = <
0x3C8 (PIN_INPUT_PULLUP | MUX_MODE14) /* spi2_d0.gpio7_16 */
>;
};
mcp79410_pins_default: mcp79410_pins_default {
pinctrl-single,pins = <
0x424 (PIN_INPUT_PULLUP | MUX_MODE1) /* wakeup3.sys_nirq1 */
>;
};
usb1_pins: pinmux_usb1_pins {
pinctrl-single,pins = <
0x280 (PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */
>;
};
};
&i2c1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins_default>;
clock-frequency = <400000>;
tps659038: tps659038@58 {
compatible = "ti,tps659038";
reg = <0x58>;
interrupt-parent = <&gpio1>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&tps659038_pins_default>;
#interrupt-cells = <2>;
interrupt-controller;
ti,system-power-controller;
tps659038_pmic {
compatible = "ti,tps659038-pmic";
regulators {
smps12_reg: smps12 {
/* VDD_MPU */
regulator-name = "smps12";
regulator-min-microvolt = < 850000>;
regulator-max-microvolt = <1250000>;
regulator-always-on;
regulator-boot-on;
};
smps3_reg: smps3 {
/* VDD_DDR */
regulator-name = "smps3";
regulator-min-microvolt = <1350000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
regulator-boot-on;
};
smps45_reg: smps45 {
/* VDD_DSPEVE, VDD_IVA, VDD_GPU */
regulator-name = "smps45";
regulator-min-microvolt = < 850000>;
regulator-max-microvolt = <1150000>;
regulator-always-on;
regulator-boot-on;
};
smps6_reg: smps6 {
/* VDD_CORE */
regulator-name = "smps6";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1030000>;
regulator-always-on;
regulator-boot-on;
};
/* SMPS7 unused */
smps8_reg: smps8 {
/* VDD_1V8 */
regulator-name = "smps8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
/* SMPS9 unused */
ldo1_reg: ldo1 {
/* VDD_SD */
regulator-name = "ldo1";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
};
ldo2_reg: ldo2 {
/* VDD_SHV5 */
regulator-name = "ldo2";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};
ldo3_reg: ldo3 {
/* VDDA_1V8_PHY */
regulator-name = "ldo3";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
ldo9_reg: ldo9 {
/* VDD_RTC */
regulator-name = "ldo9";
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
regulator-always-on;
regulator-boot-on;
};
ldoln_reg: ldoln {
/* VDDA_1V8_PLL */
regulator-name = "ldoln";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
ldousb_reg: ldousb {
/* VDDA_3V_USB: VDDA_USBHS33 */
regulator-name = "ldousb";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
};
regen1: regen1 {
/* VDD_3V3_ON */
regulator-name = "regen1";
regulator-boot-on;
regulator-always-on;
};
};
};
tps659038_rtc: tps659038_rtc {
compatible = "ti,palmas-rtc";
interrupt-parent = <&tps659038>;
interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
wakeup-source;
};
tps659038_pwr_button: tps659038_pwr_button {
compatible = "ti,palmas-pwrbutton";
interrupt-parent = <&tps659038>;
interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
wakeup-source;
ti,palmas-long-press-seconds = <12>;
};
};
tmp102: tmp102@48 {
compatible = "ti,tmp102";
reg = <0x48>;
pinctrl-names = "default";
pinctrl-0 = <&tmp102_pins_default>;
interrupt-parent = <&gpio7>;
interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
};
};
&i2c3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c3_pins_default>;
clock-frequency = <400000>;
mcp_rtc: rtc@6f {
compatible = "microchip,mcp7941x";
reg = <0x6f>;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_LOW>; /* IRQ_SYS_1N */
pinctrl-names = "default";
pinctrl-0 = <&mcp79410_pins_default>;
vcc-supply = <&vdd_3v3>;
wakeup-source;
};
};
&gpio7 {
ti,no-reset-on-init;
ti,no-idle-on-init;
};
&cpu0 {
cpu0-supply = <&smps12_reg>;
voltage-tolerance = <1>;
};
&uart3 {
status = "okay";
interrupts-extended = <&gic GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
<&dra7_pmx_core 0x248>;
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins_default>;
};
&mmc1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins_default>;
vmmc-supply = <&ldo1_reg>;
vmmc_aux-supply = <&vdd_3v3>;
pbias-supply = <&pbias_mmc_reg>;
bus-width = <4>;
cd-gpios = <&gpio6 27 0>; /* gpio 219 */
};
&mmc2 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mmc2_pins_default>;
vmmc-supply = <&vdd_3v3>;
bus-width = <8>;
ti,non-removable;
cap-mmc-dual-data-rate;
};
&sata {
status = "okay";
};
&usb2_phy1 {
phy-supply = <&ldousb_reg>;
};
&usb1 {
dr_mode = "host";
pinctrl-names = "default";
pinctrl-0 = <&usb1_pins>;
};

412
arch/arm/boot/dts/arm-realview-pb1176.dts Normal file
View file

@ -0,0 +1,412 @@
/*
* Copyright 2014 Linaro Ltd
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
/dts-v1/;
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
#include "skeleton.dtsi"
/ {
model = "ARM RealView PB1176";
compatible = "arm,realview-pb1176";
chosen { };
aliases {
serial0 = &pb1176_serial0;
serial1 = &pb1176_serial1;
serial2 = &pb1176_serial2;
serial3 = &pb1176_serial3;
serial4 = &fpga_serial;
};
memory {
/* 128 MiB memory @ 0x0 */
reg = <0x00000000 0x08000000>;
};
/* The voltage to the MMC card is hardwired at 3.3V */
vmmc: fixedregulator@0 {
compatible = "regulator-fixed";
regulator-name = "vmmc";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
};
xtal24mhz: xtal24mhz@24M {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24000000>;
};
timclk: timclk@1M {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clock-div = <24>;
clock-mult = <1>;
clocks = <&xtal24mhz>;
};
mclk: mclk@24M {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clock-div = <1>;
clock-mult = <1>;
clocks = <&xtal24mhz>;
};
kmiclk: kmiclk@24M {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clock-div = <1>;
clock-mult = <1>;
clocks = <&xtal24mhz>;
};
sspclk: sspclk@24M {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clock-div = <1>;
clock-mult = <1>;
clocks = <&xtal24mhz>;
};
uartclk: uartclk@24M {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clock-div = <1>;
clock-mult = <1>;
clocks = <&xtal24mhz>;
};
/* FIXME: this actually hangs off the PLL clocks */
pclk: pclk@0 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <0>;
};
soc {
#address-cells = <1>;
#size-cells = <1>;
compatible = "arm,realview-pb1176-soc", "simple-bus";
regmap = <&syscon>;
ranges;
syscon: syscon@10000000 {
compatible = "arm,realview-pb1176-syscon", "syscon";
reg = <0x10000000 0x1000>;
led@08.0 {
compatible = "register-bit-led";
offset = <0x08>;
mask = <0x01>;
label = "versatile:0";
linux,default-trigger = "heartbeat";
default-state = "on";
};
led@08.1 {
compatible = "register-bit-led";
offset = <0x08>;
mask = <0x02>;
label = "versatile:1";
linux,default-trigger = "mmc0";
default-state = "off";
};
led@08.2 {
compatible = "register-bit-led";
offset = <0x08>;
mask = <0x04>;
label = "versatile:2";
linux,default-trigger = "cpu0";
default-state = "off";
};
led@08.3 {
compatible = "register-bit-led";
offset = <0x08>;
mask = <0x08>;
label = "versatile:3";
default-state = "off";
};
led@08.4 {
compatible = "register-bit-led";
offset = <0x08>;
mask = <0x10>;
label = "versatile:4";
default-state = "off";
};
led@08.5 {
compatible = "register-bit-led";
offset = <0x08>;
mask = <0x20>;
label = "versatile:5";
default-state = "off";
};
led@08.6 {
compatible = "register-bit-led";
offset = <0x08>;
mask = <0x40>;
label = "versatile:6";
default-state = "off";
};
led@08.7 {
compatible = "register-bit-led";
offset = <0x08>;
mask = <0x80>;
label = "versatile:7";
default-state = "off";
};
};
/* Primary DevChip GIC synthesized with the CPU */
intc_dc1176: interrupt-controller@10120000 {
compatible = "arm,arm1176jzf-devchip-gic", "arm,arm11mp-gic";
#interrupt-cells = <3>;
#address-cells = <1>;
interrupt-controller;
reg = <0x10121000 0x1000>,
<0x10120000 0x100>;
};
L2: l2-cache {
compatible = "arm,l220-cache";
reg = <0x10110000 0x1000>;
interrupt-parent = <&intc_dc1176>;
interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>;
cache-unified;
cache-level = <2>;
/*
* Override default cache size, sets and
* associativity as these may be erroneously set
* up by boot loader(s).
*/
arm,override-auxreg;
cache-size = <131072>; // 128kB
cache-sets = <512>;
cache-line-size = <32>;
};
pmu {
compatible = "arm,arm1176-pmu";
interrupt-parent = <&intc_dc1176>;
interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
};
timer01: timer@10104000 {
compatible = "arm,sp804", "arm,primecell";
reg = <0x10104000 0x1000>;
interrupt-parent = <&intc_dc1176>;
interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>, <0 9 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&timclk>, <&timclk>, <&pclk>;
clock-names = "timer1", "timer2", "apb_pclk";
};
timer23: timer@10105000 {
compatible = "arm,sp804", "arm,primecell";
reg = <0x10105000 0x1000>;
interrupt-parent = <&intc_dc1176>;
interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
arm,sp804-has-irq = <1>;
clocks = <&timclk>, <&timclk>, <&pclk>;
clock-names = "timer1", "timer2", "apb_pclk";
};
pb1176_rtc: rtc@10108000 {
compatible = "arm,pl031", "arm,primecell";
reg = <0x10108000 0x1000>;
interrupt-parent = <&intc_dc1176>;
interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&pclk>;
clock-names = "apb_pclk";
};
pb1176_gpio0: gpio@1010a000 {
compatible = "arm,pl061", "arm,primecell";
reg = <0x1010a000 0x1000>;
gpio-controller;
interrupt-parent = <&intc_dc1176>;
interrupts = <0 16 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pclk>;
clock-names = "apb_pclk";
};
pb1176_ssp: ssp@1010b000 {
compatible = "arm,pl022", "arm,primecell";
reg = <0x1010b000 0x1000>;
interrupt-parent = <&intc_dc1176>;
interrupts = <0 17 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&sspclk>, <&pclk>;
clock-names = "SSPCLK", "apb_pclk";
};
pb1176_serial0: serial@1010c000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x1010c000 0x1000>;
interrupt-parent = <&intc_dc1176>;
interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&uartclk>, <&pclk>;
clock-names = "uartclk", "apb_pclk";
};
pb1176_serial1: serial@1010d000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x1010d000 0x1000>;
interrupt-parent = <&intc_dc1176>;
interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&uartclk>, <&pclk>;
clock-names = "uartclk", "apb_pclk";
};
pb1176_serial2: serial@1010e000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x1010e000 0x1000>;
interrupt-parent = <&intc_dc1176>;
interrupts = <0 20 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&uartclk>, <&pclk>;
clock-names = "uartclk", "apb_pclk";
};
pb1176_serial3: serial@1010f000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x1010f000 0x1000>;
interrupt-parent = <&intc_dc1176>;
interrupts = <0 21 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&uartclk>, <&pclk>;
clock-names = "uartclk", "apb_pclk";
};
};
/* These peripherals are inside the FPGA rather than the DevChip */
fpga {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
ranges;
fpga_mci: mmcsd@10005000 {
compatible = "arm,pl18x", "arm,primecell";
reg = <0x10005000 0x1000>;
interrupt-parent = <&intc_fpga1176>;
interrupts = <0 1 IRQ_TYPE_LEVEL_HIGH>,
<0 2 IRQ_TYPE_LEVEL_HIGH>;
/* Due to frequent FIFO overruns, use just 500 kHz */
max-frequency = <500000>;
bus-width = <4>;
cap-sd-highspeed;
cap-mmc-highspeed;
clocks = <&mclk>, <&pclk>;
clock-names = "mclk", "apb_pclk";
vmmc-supply = <&vmmc>;
cd-gpios = <&fpga_gpio1 0 GPIO_ACTIVE_LOW>;
wp-gpios = <&fpga_gpio1 1 GPIO_ACTIVE_HIGH>;
};
fpga_kmi0: kmi@10006000 {
compatible = "arm,pl050", "arm,primecell";
reg = <0x10006000 0x1000>;
interrupt-parent = <&intc_fpga1176>;
interrupts = <0 3 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&kmiclk>, <&pclk>;
clock-names = "KMIREFCLK", "apb_pclk";
};
fpga_kmi1: kmi@10007000 {
compatible = "arm,pl050", "arm,primecell";
reg = <0x10007000 0x1000>;
interrupt-parent = <&intc_fpga1176>;
interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&kmiclk>, <&pclk>;
clock-names = "KMIREFCLK", "apb_pclk";
};
fpga_charlcd: charlcd@10008000 {
compatible = "arm,versatile-lcd";
reg = <0x10008000 0x1000>;
interrupt-parent = <&intc_fpga1176>;
interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&pclk>;
clock-names = "apb_pclk";
};
fpga_serial: serial@10009000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x10009000 0x1000>;
interrupt-parent = <&intc_fpga1176>;
interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&uartclk>, <&pclk>;
clock-names = "uartclk", "apb_pclk";
};
/* This GIC on the board is cascaded off the DevChip GIC */
intc_fpga1176: interrupt-controller@10040000 {
compatible = "arm,arm1176jzf-devchip-gic", "arm,arm11mp-gic";
#interrupt-cells = <3>;
#address-cells = <1>;
interrupt-controller;
reg = <0x10041000 0x1000>,
<0x10040000 0x100>;
interrupt-parent = <&intc_dc1176>;
interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>;
};
fpga_gpio0: gpio@10014000 {
compatible = "arm,pl061", "arm,primecell";
reg = <0x10014000 0x1000>;
gpio-controller;
interrupt-parent = <&intc_fpga1176>;
interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pclk>;
clock-names = "apb_pclk";
};
fpga_gpio1: gpio@10015000 {
compatible = "arm,pl061", "arm,primecell";
reg = <0x10015000 0x1000>;
gpio-controller;
interrupt-parent = <&intc_fpga1176>;
interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pclk>;
clock-names = "apb_pclk";
};
fpga_rtc: rtc@10017000 {
compatible = "arm,pl031", "arm,primecell";
reg = <0x10017000 0x1000>;
interrupt-parent = <&intc_fpga1176>;
interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&pclk>;
clock-names = "apb_pclk";
};
};
};

100
arch/arm/boot/dts/armada-370-db.dts
View file

@ -75,6 +75,7 @@
clock-frequency = <100000>;
status = "okay";
audio_codec: audio-codec@4a {
#sound-dai-cells = <0>;
compatible = "cirrus,cs42l51";
reg = <0x4a>;
};
@ -102,30 +103,6 @@
broken-cd;
};
pinctrl {
/*
* These pins might be muxed as I2S by
* the bootloader, but it conflicts
* with the real I2S pins that are
* muxed using i2s_pins. We must mux
* those pins to a function other than
* I2S.
*/
pinctrl-0 = <&hog_pins1 &hog_pins2>;
pinctrl-names = "default";
hog_pins1: hog-pins1 {
marvell,pins = "mpp6", "mpp8", "mpp10",
"mpp12", "mpp13";
marvell,function = "gpio";
};
hog_pins2: hog-pins2 {
marvell,pins = "mpp5", "mpp7", "mpp9";
marvell,function = "gpo";
};
};
usb@50000 {
status = "okay";
};
@ -135,6 +112,8 @@
};
spi0: spi@10600 {
pinctrl-0 = <&spi0_pins2>;
pinctrl-names = "default";
status = "okay";
spi-flash@0 {
@ -167,17 +146,84 @@
};
sound {
compatible = "marvell,a370db-audio";
marvell,audio-controller = <&audio_controller>;
marvell,audio-codec = <&audio_codec &spdif_out &spdif_in>;
compatible = "simple-audio-card";
simple-audio-card,name = "Armada 370 DB Audio";
simple-audio-card,mclk-fs = <256>;
simple-audio-card,widgets =
"Headphone", "Out Jack",
"Line", "In Jack";
simple-audio-card,routing =
"Out Jack", "HPL",
"Out Jack", "HPR",
"AIN1L", "In Jack",
"AIN1L", "In Jack";
status = "okay";
simple-audio-card,dai-link@0 {
format = "i2s";
cpu {
sound-dai = <&audio_controller 0>;
};
codec {
sound-dai = <&audio_codec>;
};
};
simple-audio-card,dai-link@1 {
format = "i2s";
cpu {
sound-dai = <&audio_controller 1>;
};
codec {
sound-dai = <&spdif_out>;
};
};
simple-audio-card,dai-link@2 {
format = "i2s";
cpu {
sound-dai = <&audio_controller 1>;
};
codec {
sound-dai = <&spdif_in>;
};
};
};
spdif_out: spdif-out {
#sound-dai-cells = <0>;
compatible = "linux,spdif-dit";
};
spdif_in: spdif-in {
#sound-dai-cells = <0>;
compatible = "linux,spdif-dir";
};
};
&pinctrl {
/*
* These pins might be muxed as I2S by
* the bootloader, but it conflicts
* with the real I2S pins that are
* muxed using i2s_pins. We must mux
* those pins to a function other than
* I2S.
*/
pinctrl-0 = <&hog_pins1 &hog_pins2>;
pinctrl-names = "default";
hog_pins1: hog-pins1 {
marvell,pins = "mpp6", "mpp8", "mpp10",
"mpp12", "mpp13";
marvell,function = "gpio";
};
hog_pins2: hog-pins2 {
marvell,pins = "mpp5", "mpp7", "mpp9";
marvell,function = "gpo";
};
};

25
arch/arm/boot/dts/armada-370-mirabox.dts
View file

@ -54,18 +54,6 @@
status = "okay";
};
pinctrl {
pwr_led_pin: pwr-led-pin {
marvell,pins = "mpp63";
marvell,function = "gpo";
};
stat_led_pins: stat-led-pins {
marvell,pins = "mpp64", "mpp65";
marvell,function = "gpio";
};
};
gpio_leds {
compatible = "gpio-leds";
pinctrl-names = "default";
@ -169,3 +157,16 @@
};
};
};
&pinctrl {
pwr_led_pin: pwr-led-pin {
marvell,pins = "mpp63";
marvell,function = "gpo";
};
stat_led_pins: stat-led-pins {
marvell,pins = "mpp64", "mpp65";
marvell,function = "gpio";
};
};

101
arch/arm/boot/dts/armada-370-netgear-rn102.dts
View file

@ -35,7 +35,7 @@
pcie-controller {
status = "okay";
/* Connected to Marvell SATA controller */
/* Connected to Marvell 88SE9170 SATA controller */
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
@ -53,53 +53,12 @@
status = "okay";
};
/* eSATA interface */
sata@a0000 {
nr-ports = <2>;
nr-ports = <1>;
status = "okay";
};
pinctrl {
power_led_pin: power-led-pin {
marvell,pins = "mpp57";
marvell,function = "gpio";
};
sata1_led_pin: sata1-led-pin {
marvell,pins = "mpp15";
marvell,function = "gpio";
};
sata2_led_pin: sata2-led-pin {
marvell,pins = "mpp14";
marvell,function = "gpio";
};
backup_led_pin: backup-led-pin {
marvell,pins = "mpp56";
marvell,function = "gpio";
};
backup_button_pin: backup-button-pin {
marvell,pins = "mpp58";
marvell,function = "gpio";
};
power_button_pin: power-button-pin {
marvell,pins = "mpp62";
marvell,function = "gpio";
};
reset_button_pin: reset-button-pin {
marvell,pins = "mpp6";
marvell,function = "gpio";
};
poweroff: poweroff {
marvell,pins = "mpp8";
marvell,function = "gpio";
};
};
mdio {
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
@ -204,20 +163,20 @@
default-state = "keep";
};
green-sata1-led {
label = "rn102:green:sata1";
blue-sata1-led {
label = "rn102:blue:sata1";
gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
default-state = "on";
};
green-sata2-led {
label = "rn102:green:sata2";
blue-sata2-led {
label = "rn102:blue:sata2";
gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
default-state = "on";
};
green-backup-led {
label = "rn102:green:backup";
blue-backup-led {
label = "rn102:blue:backup";
gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
default-state = "on";
};
@ -256,3 +215,45 @@
gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
};
};
&pinctrl {
power_led_pin: power-led-pin {
marvell,pins = "mpp57";
marvell,function = "gpio";
};
sata1_led_pin: sata1-led-pin {
marvell,pins = "mpp15";
marvell,function = "gpio";
};
sata2_led_pin: sata2-led-pin {
marvell,pins = "mpp14";
marvell,function = "gpio";
};
backup_led_pin: backup-led-pin {
marvell,pins = "mpp56";
marvell,function = "gpio";
};
backup_button_pin: backup-button-pin {
marvell,pins = "mpp58";
marvell,function = "gpio";
};
power_button_pin: power-button-pin {
marvell,pins = "mpp62";
marvell,function = "gpio";
};
reset_button_pin: reset-button-pin {
marvell,pins = "mpp6";
marvell,function = "gpio";
};
poweroff: poweroff {
marvell,pins = "mpp8";
marvell,function = "gpio";
};
};

64
arch/arm/boot/dts/armada-370-netgear-rn104.dts
View file

@ -53,38 +53,6 @@
status = "okay";
};
pinctrl {
poweroff: poweroff {
marvell,pins = "mpp60";
marvell,function = "gpio";
};
backup_button_pin: backup-button-pin {
marvell,pins = "mpp52";
marvell,function = "gpio";
};
power_button_pin: power-button-pin {
marvell,pins = "mpp62";
marvell,function = "gpio";
};
backup_led_pin: backup-led-pin {
marvell,pins = "mpp63";
marvell,function = "gpo";
};
power_led_pin: power-led-pin {
marvell,pins = "mpp64";
marvell,function = "gpio";
};
reset_button_pin: reset-button-pin {
marvell,pins = "mpp65";
marvell,function = "gpio";
};
};
mdio {
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
@ -269,3 +237,35 @@
gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
};
};
&pinctrl {
poweroff: poweroff {
marvell,pins = "mpp60";
marvell,function = "gpio";
};
backup_button_pin: backup-button-pin {
marvell,pins = "mpp52";
marvell,function = "gpio";
};
power_button_pin: power-button-pin {
marvell,pins = "mpp62";
marvell,function = "gpio";
};
backup_led_pin: backup-led-pin {
marvell,pins = "mpp63";
marvell,function = "gpo";
};
power_led_pin: power-led-pin {
marvell,pins = "mpp64";
marvell,function = "gpio";
};
reset_button_pin: reset-button-pin {
marvell,pins = "mpp65";
marvell,function = "gpio";
};
};

73
arch/arm/boot/dts/armada-370-rd.dts
View file

@ -59,18 +59,6 @@
};
internal-regs {
pinctrl {
fan_pins: fan-pins {
marvell,pins = "mpp8";
marvell,function = "gpio";
};
led_pins: led-pins {
marvell,pins = "mpp32";
marvell,function = "gpio";
};
};
serial@12000 {
status = "okay";
};
@ -85,10 +73,6 @@
phy0: ethernet-phy@0 {
reg = <0>;
};
phy1: ethernet-phy@1 {
reg = <1>;
};
};
ethernet@70000 {
@ -100,8 +84,11 @@
pinctrl-0 = <&ge1_rgmii_pins>;
pinctrl-names = "default";
status = "okay";
phy = <&phy1>;
phy-mode = "rgmii-id";
fixed-link {
speed = <1000>;
full-duplex;
};
};
mvsdio@d4000 {
@ -173,4 +160,56 @@
};
};
};
dsa@0 {
compatible = "marvell,dsa";
#address-cells = <2>;
#size-cells = <0>;
dsa,ethernet = <&eth1>;
dsa,mii-bus = <&mdio>;
switch@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x10 0>; /* MDIO address 16, switch 0 in tree */
port@0 {
reg = <0>;
label = "lan0";
};
port@1 {
reg = <1>;
label = "lan1";
};
port@2 {
reg = <2>;
label = "lan2";
};
port@3 {
reg = <3>;
label = "lan3";
};
port@5 {
reg = <5>;
label = "cpu";
};
};
};
};
&pinctrl {
fan_pins: fan-pins {
marvell,pins = "mpp8";
marvell,function = "gpio";
};
led_pins: led-pins {
marvell,pins = "mpp32";
marvell,function = "gpio";
};
};

316
arch/arm/boot/dts/armada-370-synology-ds213j.dts Normal file
View file

@ -0,0 +1,316 @@
/*
* Device Tree file for Synology DS213j
*
* Copyright (C) 2014, Arnaud EBALARD <arno@natisbad.org>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*
* Note: this Device Tree assumes that the bootloader has remapped the
* internal registers to 0xf1000000 (instead of the old 0xd0000000).
* The 0xf1000000 is the default used by the recent, DT-capable, U-Boot
* bootloaders provided by Marvell. It is used in recent versions of
* DSM software provided by Synology. Nonetheless, some earlier boards
* were delivered with an older version of u-boot that left internal
* registers mapped at 0xd0000000. If you have such a device you will
* not be able to directly boot a kernel based on this Device Tree. In
* that case, the preferred solution is to update your bootloader (e.g.
* by upgrading to latest version of DSM, or building a new one and
* installing it from u-boot prompt) or adjust the Devive Tree
* (s/0xf1000000/0xd0000000/ in 'ranges' below).
*/
/dts-v1/;
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include "armada-370.dtsi"
/ {
model = "Synology DS213j";
compatible = "synology,ds213j", "marvell,armada370",
"marvell,armada-370-xp";
chosen {
bootargs = "console=ttyS0,115200 earlyprintk";
stdout-path = &uart0;
};
memory {
device_type = "memory";
reg = <0x00000000 0x20000000>; /* 512 MB */
};
soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
internal-regs {
/* RTC provided by Seiko S-35390A I2C RTC chip below */
rtc@10300 {
status = "disabled";
};
spi0: spi@10600 {
status = "okay";
spi-flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,n25q064";
reg = <0>; /* Chip select 0 */
spi-max-frequency = <20000000>;
/*
* Warning!
*
* Synology u-boot uses its compiled-in environment
* and it seems Synology did not care to change u-boot
* default configuration in order to allow saving a
* modified environment at a sensible location. So,
* if you do a 'saveenv' under u-boot, your modified
* environment will be saved at 1MB after the start
* of the flash, i.e. in the middle of the uImage.
* For that reason, it is strongly advised not to
* change the default environment, unless you know
* what you are doing.
*/
partition@00000000 { /* u-boot */
label = "RedBoot";
reg = <0x00000000 0x000c0000>; /* 768KB */
};
partition@000c0000 { /* uImage */
label = "zImage";
reg = <0x000c0000 0x002d0000>; /* 2880KB */
};
partition@00390000 { /* uInitramfs */
label = "rd.gz";
reg = <0x00390000 0x00440000>; /* 4250KB */
};
partition@007d0000 { /* MAC address and serial number */
label = "vendor";
reg = <0x007d0000 0x00010000>; /* 64KB */
};
partition@007e0000 {
label = "RedBoot config";
reg = <0x007e0000 0x00010000>; /* 64KB */
};
partition@007f0000 {
label = "FIS directory";
reg = <0x007f0000 0x00010000>; /* 64KB */
};
};
};
i2c@11000 {
compatible = "marvell,mv64xxx-i2c";
pinctrl-0 = <&i2c0_pins>;
pinctrl-names = "default";
clock-frequency = <400000>;
status = "okay";
/* Main device RTC chip */
s35390a: s35390a@30 {
compatible = "sii,s35390a";
reg = <0x30>;
};
};
/* Connected to a header on device's PCB */
serial@12000 {
status = "okay";
};
/* Connected to a TI MSP430F2111 for power control */
serial@12100 {
status = "okay";
};
poweroff@12100 {
compatible = "synology,power-off";
reg = <0x12100 0x100>;
clocks = <&coreclk 0>;
};
/* rear USB port, near reset button */
usb@50000 {
status = "okay";
};
/* rear USB port, near RJ45 port */
usb@51000 {
status = "okay";
};
mdio {
phy1: ethernet-phy@1 { /* Marvell 88E1512 */
reg = <1>;
};
};
ethernet@70000 {
status = "okay";
phy = <&phy1>;
phy-mode = "sgmii";
};
sata@a0000 {
nr-ports = <2>;
status = "okay";
};
};
};
gpio-fan-32-38 {
status = "okay";
compatible = "gpio-fan";
pinctrl-0 = <&fan_ctrl_low_pin &fan_ctrl_mid_pin
&fan_ctrl_high_pin &fan_alarm_pin>;
pinctrl-names = "default";
gpios = <&gpio1 31 GPIO_ACTIVE_HIGH
&gpio2 0 GPIO_ACTIVE_HIGH
&gpio2 1 GPIO_ACTIVE_HIGH>;
alarm-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
gpio-fan,speed-map = < 0 0
1000 1
1150 2
1350 4
1500 3
1650 5
1750 6
1900 7 >;
};
gpio-leds {
compatible = "gpio-leds";
pinctrl-0 = <&disk1_led_pin
&disk2_led_pin>;
pinctrl-names = "default";
disk1-led-amber {
label = "synology:amber:disk1";
gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
default-state = "keep";
};
disk2-led-amber {
label = "synology:amber:disk2";
gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
default-state = "keep";
};
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&sata1_pwr_pin &sata2_pwr_pin>;
pinctrl-names = "default";
sata1_regulator: sata1-regulator {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "SATA1 Power";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
startup-delay-us = <2000000>;
enable-active-high;
regulator-always-on;
regulator-boot-on;
gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
};
sata2_regulator: sata2-regulator {
compatible = "regulator-fixed";
reg = <2>;
regulator-name = "SATA2 Power";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
startup-delay-us = <4000000>;
enable-active-high;
regulator-always-on;
regulator-boot-on;
gpio = <&gpio1 30 GPIO_ACTIVE_HIGH>;
};
};
};
&pinctrl {
disk1_led_pin: disk1-led-pin {
marvell,pins = "mpp31";
marvell,function = "gpio";
};
disk2_led_pin: disk2-led-pin {
marvell,pins = "mpp32";
marvell,function = "gpio";
};
sata1_pwr_pin: sata1-pwr-pin {
marvell,pins = "mpp37";
marvell,function = "gpio";
};
sata2_pwr_pin: sata2-pwr-pin {
marvell,pins = "mpp62";
marvell,function = "gpio";
};
sata1_pres_pin: sata1-pres-pin {
marvell,pins = "mpp60";
marvell,function = "gpio";
};
sata2_pres_pin: sata2-pres-pin {
marvell,pins = "mpp48";
marvell,function = "gpio";
};
syno_id_bit0_pin: syno-id-bit0-pin {
marvell,pins = "mpp55";
marvell,function = "gpio";
};
syno_id_bit1_pin: syno-id-bit1-pin {
marvell,pins = "mpp56";
marvell,function = "gpio";
};
syno_id_bit2_pin: syno-id-bit2-pin {
marvell,pins = "mpp57";
marvell,function = "gpio";
};
syno_id_bit3_pin: syno-id-bit3-pin {
marvell,pins = "mpp58";
marvell,function = "gpio";
};
fan_ctrl_low_pin: fan-ctrl-low-pin {
marvell,pins = "mpp65";
marvell,function = "gpio";
};
fan_ctrl_mid_pin: fan-ctrl-mid-pin {
marvell,pins = "mpp64";
marvell,function = "gpio";
};
fan_ctrl_high_pin: fan-ctrl-high-pin {
marvell,pins = "mpp63";
marvell,function = "gpo";
};
fan_alarm_pin: fan-alarm-pin {
marvell,pins = "mpp38";
marvell,function = "gpio";
};
};

11
arch/arm/boot/dts/armada-370-xp.dtsi
View file

@ -151,7 +151,7 @@
status = "disabled";
};
serial@12000 {
uart0: serial@12000 {
compatible = "snps,dw-apb-uart";
reg = <0x12000 0x100>;
reg-shift = <2>;
@ -160,7 +160,8 @@
clocks = <&coreclk 0>;
status = "disabled";
};
serial@12100 {
uart1: serial@12100 {
compatible = "snps,dw-apb-uart";
reg = <0x12100 0x100>;
reg-shift = <2>;
@ -170,6 +171,10 @@
status = "disabled";
};
pinctrl: pin-ctrl@18000 {
reg = <0x18000 0x38>;
};
coredivclk: corediv-clock@18740 {
compatible = "marvell,armada-370-corediv-clock";
reg = <0x18740 0xc>;
@ -233,7 +238,7 @@
status = "disabled";
};
mdio {
mdio: mdio {
#address-cells = <1>;
#size-cells = <0>;
compatible = "marvell,orion-mdio";

190
arch/arm/boot/dts/armada-370.dtsi
View file

@ -95,9 +95,24 @@
compatible = "marvell,aurora-outer-cache";
reg = <0x08000 0x1000>;
cache-id-part = <0x100>;
cache-unified;
wt-override;
};
/*
* Default SPI pinctrl setting, can be overwritten on
* board level if a different configuration is used.
*/
spi0: spi@10600 {
pinctrl-0 = <&spi0_pins1>;
pinctrl-names = "default";
};
spi1: spi@10680 {
pinctrl-0 = <&spi1_pins>;
pinctrl-names = "default";
};
i2c0: i2c@11000 {
reg = <0x11000 0x20>;
};
@ -106,72 +121,6 @@
reg = <0x11100 0x20>;
};
system-controller@18200 {
compatible = "marvell,armada-370-xp-system-controller";
reg = <0x18200 0x100>;
};
pinctrl {
compatible = "marvell,mv88f6710-pinctrl";
reg = <0x18000 0x38>;
sdio_pins1: sdio-pins1 {
marvell,pins = "mpp9", "mpp11", "mpp12",
"mpp13", "mpp14", "mpp15";
marvell,function = "sd0";
};
sdio_pins2: sdio-pins2 {
marvell,pins = "mpp47", "mpp48", "mpp49",
"mpp50", "mpp51", "mpp52";
marvell,function = "sd0";
};
sdio_pins3: sdio-pins3 {
marvell,pins = "mpp48", "mpp49", "mpp50",
"mpp51", "mpp52", "mpp53";
marvell,function = "sd0";
};
i2c0_pins: i2c0-pins {
marvell,pins = "mpp2", "mpp3";
marvell,function = "i2c0";
};
i2s_pins1: i2s-pins1 {
marvell,pins = "mpp5", "mpp6", "mpp7",
"mpp8", "mpp9", "mpp10",
"mpp12", "mpp13";
marvell,function = "audio";
};
i2s_pins2: i2s-pins2 {
marvell,pins = "mpp49", "mpp47", "mpp50",
"mpp59", "mpp57", "mpp61",
"mpp62", "mpp60", "mpp58";
marvell,function = "audio";
};
mdio_pins: mdio-pins {
marvell,pins = "mpp17", "mpp18";
marvell,function = "ge";
};
ge0_rgmii_pins: ge0-rgmii-pins {
marvell,pins = "mpp5", "mpp6", "mpp7", "mpp8",
"mpp9", "mpp10", "mpp11", "mpp12",
"mpp13", "mpp14", "mpp15", "mpp16";
marvell,function = "ge0";
};
ge1_rgmii_pins: ge1-rgmii-pins {
marvell,pins = "mpp19", "mpp20", "mpp21", "mpp22",
"mpp23", "mpp24", "mpp25", "mpp26",
"mpp27", "mpp28", "mpp29", "mpp30";
marvell,function = "ge1";
};
};
gpio0: gpio@18100 {
compatible = "marvell,orion-gpio";
reg = <0x18100 0x40>;
@ -205,6 +154,26 @@
interrupts = <91>;
};
/*
* Default UART pinctrl setting without RTS/CTS, can
* be overwritten on board level if a different
* configuration is used.
*/
uart0: serial@12000 {
pinctrl-0 = <&uart0_pins>;
pinctrl-names = "default";
};
uart1: serial@12100 {
pinctrl-0 = <&uart1_pins>;
pinctrl-names = "default";
};
system-controller@18200 {
compatible = "marvell,armada-370-xp-system-controller";
reg = <0x18200 0x100>;
};
gateclk: clock-gating-control@18220 {
compatible = "marvell,armada-370-gating-clock";
reg = <0x18220 0x4>;
@ -249,6 +218,7 @@
};
audio_controller: audio-controller@30000 {
#sound-dai-cells = <1>;
compatible = "marvell,armada370-audio";
reg = <0x30000 0x4000>;
interrupts = <93>;
@ -305,3 +275,91 @@
};
};
};
&pinctrl {
compatible = "marvell,mv88f6710-pinctrl";
spi0_pins1: spi0-pins1 {
marvell,pins = "mpp33", "mpp34",
"mpp35", "mpp36";
marvell,function = "spi0";
};
spi0_pins2: spi0_pins2 {
marvell,pins = "mpp32", "mpp63",
"mpp64", "mpp65";
marvell,function = "spi0";
};
spi1_pins: spi1-pins {
marvell,pins = "mpp49", "mpp50",
"mpp51", "mpp52";
marvell,function = "spi1";
};
uart0_pins: uart0-pins {
marvell,pins = "mpp0", "mpp1";
marvell,function = "uart0";
};
uart1_pins: uart1-pins {
marvell,pins = "mpp41", "mpp42";
marvell,function = "uart1";
};
sdio_pins1: sdio-pins1 {
marvell,pins = "mpp9", "mpp11", "mpp12",
"mpp13", "mpp14", "mpp15";
marvell,function = "sd0";
};
sdio_pins2: sdio-pins2 {
marvell,pins = "mpp47", "mpp48", "mpp49",
"mpp50", "mpp51", "mpp52";
marvell,function = "sd0";
};
sdio_pins3: sdio-pins3 {
marvell,pins = "mpp48", "mpp49", "mpp50",
"mpp51", "mpp52", "mpp53";
marvell,function = "sd0";
};
i2c0_pins: i2c0-pins {
marvell,pins = "mpp2", "mpp3";
marvell,function = "i2c0";
};
i2s_pins1: i2s-pins1 {
marvell,pins = "mpp5", "mpp6", "mpp7",
"mpp8", "mpp9", "mpp10",
"mpp12", "mpp13";
marvell,function = "audio";
};
i2s_pins2: i2s-pins2 {
marvell,pins = "mpp49", "mpp47", "mpp50",
"mpp59", "mpp57", "mpp61",
"mpp62", "mpp60", "mpp58";
marvell,function = "audio";
};
mdio_pins: mdio-pins {
marvell,pins = "mpp17", "mpp18";
marvell,function = "ge";
};
ge0_rgmii_pins: ge0-rgmii-pins {
marvell,pins = "mpp5", "mpp6", "mpp7", "mpp8",
"mpp9", "mpp10", "mpp11", "mpp12",
"mpp13", "mpp14", "mpp15", "mpp16";
marvell,function = "ge0";
};
ge1_rgmii_pins: ge1-rgmii-pins {
marvell,pins = "mpp19", "mpp20", "mpp21", "mpp22",
"mpp23", "mpp24", "mpp25", "mpp26",
"mpp27", "mpp28", "mpp29", "mpp30";
marvell,function = "ge1";
};
};

12
arch/arm/boot/dts/armada-375.dtsi
View file

@ -36,6 +36,12 @@
#clock-cells = <0>;
clock-frequency = <2000000000>;
};
/* 25 MHz reference crystal */
refclk: oscillator {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <25000000>;
};
};
cpus {
@ -366,13 +372,15 @@
<&gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
<&mpic 5>,
<&mpic 6>;
clocks = <&coreclk 0>;
clocks = <&coreclk 0>, <&refclk>;
clock-names = "nbclk", "fixed";
};
watchdog@20300 {
compatible = "marvell,armada-375-wdt";
reg = <0x20300 0x34>, <0x20704 0x4>, <0x18254 0x4>;
clocks = <&coreclk 0>;
clocks = <&coreclk 0>, <&refclk>;
clock-names = "nbclk", "fixed";
};
cpurst@20800 {

2
arch/arm/boot/dts/armada-385-db.dts
View file

@ -116,11 +116,11 @@
};
sdhci@d8000 {
clock-frequency = <200000000>;
broken-cd;
wp-inverted;
bus-width = <8>;
status = "okay";
no-1-8-v;
};
usb3@f0000 {

6
arch/arm/boot/dts/armada-38x.dtsi
View file

@ -25,9 +25,9 @@
aliases {
gpio0 = &gpio0;
gpio1 = &gpio1;
eth0 = &eth0;
eth1 = &eth1;
eth2 = &eth2;
ethernet0 = &eth0;
ethernet1 = &eth1;
ethernet2 = &eth2;
};
soc {

57
arch/arm/boot/dts/armada-xp-axpwifiap.dts
View file

@ -60,40 +60,6 @@
};
internal-regs {
pinctrl {
pinctrl-0 = <&pmx_phy_int>;
pinctrl-names = "default";
pmx_ge0: pmx-ge0 {
marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",
"mpp4", "mpp5", "mpp6", "mpp7",
"mpp8", "mpp9", "mpp10", "mpp11";
marvell,function = "ge0";
};
pmx_ge1: pmx-ge1 {
marvell,pins = "mpp12", "mpp13", "mpp14", "mpp15",
"mpp16", "mpp17", "mpp18", "mpp19",
"mpp20", "mpp21", "mpp22", "mpp23";
marvell,function = "ge1";
};
pmx_keys: pmx-keys {
marvell,pins = "mpp33";
marvell,function = "gpio";
};
pmx_spi: pmx-spi {
marvell,pins = "mpp36", "mpp37", "mpp38", "mpp39";
marvell,function = "spi";
};
pmx_phy_int: pmx-phy-int {
marvell,pins = "mpp32";
marvell,function = "gpio";
};
};
serial@12000 {
status = "okay";
};
@ -118,14 +84,14 @@
};
ethernet@70000 {
pinctrl-0 = <&pmx_ge0>;
pinctrl-0 = <&ge0_rgmii_pins>;
pinctrl-names = "default";
status = "okay";
phy = <&phy0>;
phy-mode = "rgmii-id";
};
ethernet@74000 {
pinctrl-0 = <&pmx_ge1>;
pinctrl-0 = <&ge1_rgmii_pins>;
pinctrl-names = "default";
status = "okay";
phy = <&phy1>;
@ -134,8 +100,6 @@
spi0: spi@10600 {
status = "okay";
pinctrl-0 = <&pmx_spi>;
pinctrl-names = "default";
spi-flash@0 {
#address-cells = <1>;
@ -152,7 +116,7 @@
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&pmx_keys>;
pinctrl-0 = <&keys_pin>;
pinctrl-names = "default";
button@1 {
@ -162,3 +126,18 @@
};
};
};
&pinctrl {
pinctrl-0 = <&phy_int_pin>;
pinctrl-names = "default";
keys_pin: keys-pin {
marvell,pins = "mpp33";
marvell,function = "gpio";
};
phy_int_pin: phy-int-pin {
marvell,pins = "mpp32";
marvell,function = "gpio";
};
};

75
arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts
View file

@ -22,7 +22,7 @@
chosen {
bootargs = "console=ttyS0,115200 earlyprintk";
stdout-path = "/soc/internal-regs/serial@12000";
stdout-path = &uart0;
};
memory {
@ -51,37 +51,6 @@
};
internal-regs {
pinctrl {
poweroff_pin: poweroff-pin {
marvell,pins = "mpp24";
marvell,function = "gpio";
};
power_button_pin: power-button-pin {
marvell,pins = "mpp44";
marvell,function = "gpio";
};
reset_button_pin: reset-button-pin {
marvell,pins = "mpp45";
marvell,function = "gpio";
};
select_button_pin: select-button-pin {
marvell,pins = "mpp41";
marvell,function = "gpio";
};
scroll_button_pin: scroll-button-pin {
marvell,pins = "mpp42";
marvell,function = "gpio";
};
hdd_led_pin: hdd-led-pin {
marvell,pins = "mpp26";
marvell,function = "gpio";
};
};
serial@12000 {
status = "okay";
};
@ -97,12 +66,16 @@
};
ethernet@70000 {
pinctrl-0 = <&ge0_rgmii_pins>;
pinctrl-names = "default";
status = "okay";
phy = <&phy0>;
phy-mode = "rgmii-id";
};
ethernet@74000 {
pinctrl-0 = <&ge1_rgmii_pins>;
pinctrl-names = "default";
status = "okay";
phy = <&phy1>;
phy-mode = "rgmii-id";
@ -125,6 +98,11 @@
reg = <0x2e>;
};
eeprom@50 {
compatible = "atmel,24c64";
reg = <0x50>;
};
pcf8563@51 {
compatible = "nxp,pcf8563";
reg = <0x51>;
@ -226,7 +204,7 @@
gpio-controller;
#gpio-cells = <2>;
reg = <0>;
registers-number = <2>;
registers-number = <1>;
spi-max-frequency = <100000>;
};
};
@ -282,3 +260,34 @@
gpios = <&gpio0 24 GPIO_ACTIVE_HIGH>;
};
};
&pinctrl {
poweroff_pin: poweroff-pin {
marvell,pins = "mpp24";
marvell,function = "gpio";
};
power_button_pin: power-button-pin {
marvell,pins = "mpp44";
marvell,function = "gpio";
};
reset_button_pin: reset-button-pin {
marvell,pins = "mpp45";
marvell,function = "gpio";
};
select_button_pin: select-button-pin {
marvell,pins = "mpp41";
marvell,function = "gpio";
};
scroll_button_pin: scroll-button-pin {
marvell,pins = "mpp42";
marvell,function = "gpio";
};
hdd_led_pin: hdd-led-pin {
marvell,pins = "mpp26";
marvell,function = "gpio";
};
};

15
arch/arm/boot/dts/armada-xp-mv78230.dtsi
View file

@ -167,17 +167,6 @@
};
internal-regs {
pinctrl {
compatible = "marvell,mv78230-pinctrl";
reg = <0x18000 0x38>;
sdio_pins: sdio-pins {
marvell,pins = "mpp30", "mpp31", "mpp32",
"mpp33", "mpp34", "mpp35";
marvell,function = "sd0";
};
};
gpio0: gpio@18100 {
compatible = "marvell,orion-gpio";
reg = <0x18100 0x40>;
@ -202,3 +191,7 @@
};
};
};
&pinctrl {
compatible = "marvell,mv78230-pinctrl";
};

15
arch/arm/boot/dts/armada-xp-mv78260.dtsi
View file

@ -251,17 +251,6 @@
};
internal-regs {
pinctrl {
compatible = "marvell,mv78260-pinctrl";
reg = <0x18000 0x38>;
sdio_pins: sdio-pins {
marvell,pins = "mpp30", "mpp31", "mpp32",
"mpp33", "mpp34", "mpp35";
marvell,function = "sd0";
};
};
gpio0: gpio@18100 {
compatible = "marvell,orion-gpio";
reg = <0x18100 0x40>;
@ -305,3 +294,7 @@
};
};
};
&pinctrl {
compatible = "marvell,mv78260-pinctrl";
};

15
arch/arm/boot/dts/armada-xp-mv78460.dtsi
View file

@ -289,17 +289,6 @@
};
internal-regs {
pinctrl {
compatible = "marvell,mv78460-pinctrl";
reg = <0x18000 0x38>;
sdio_pins: sdio-pins {
marvell,pins = "mpp30", "mpp31", "mpp32",
"mpp33", "mpp34", "mpp35";
marvell,function = "sd0";
};
};
gpio0: gpio@18100 {
compatible = "marvell,orion-gpio";
reg = <0x18100 0x40>;
@ -343,3 +332,7 @@
};
};
};
&pinctrl {
compatible = "marvell,mv78460-pinctrl";
};

166
arch/arm/boot/dts/armada-xp-netgear-rn2120.dts
View file

@ -55,86 +55,10 @@
};
internal-regs {
pinctrl {
poweroff: poweroff {
marvell,pins = "mpp42";
marvell,function = "gpio";
};
power_button_pin: power-button-pin {
marvell,pins = "mpp27";
marvell,function = "gpio";
};
reset_button_pin: reset-button-pin {
marvell,pins = "mpp41";
marvell,function = "gpio";
};
sata1_led_pin: sata1-led-pin {
marvell,pins = "mpp31";
marvell,function = "gpio";
};
sata2_led_pin: sata2-led-pin {
marvell,pins = "mpp40";
marvell,function = "gpio";
};
sata3_led_pin: sata3-led-pin {
marvell,pins = "mpp44";
marvell,function = "gpio";
};
sata4_led_pin: sata4-led-pin {
marvell,pins = "mpp47";
marvell,function = "gpio";
};
sata1_power_pin: sata1-power-pin {
marvell,pins = "mpp24";
marvell,function = "gpio";
};
sata2_power_pin: sata2-power-pin {
marvell,pins = "mpp25";
marvell,function = "gpio";
};
sata3_power_pin: sata3-power-pin {
marvell,pins = "mpp26";
marvell,function = "gpio";
};
sata4_power_pin: sata4-power-pin {
marvell,pins = "mpp28";
marvell,function = "gpio";
};
sata1_pres_pin: sata1-pres-pin {
marvell,pins = "mpp32";
marvell,function = "gpio";
};
sata2_pres_pin: sata2-pres-pin {
marvell,pins = "mpp33";
marvell,function = "gpio";
};
sata3_pres_pin: sata3-pres-pin {
marvell,pins = "mpp34";
marvell,function = "gpio";
};
sata4_pres_pin: sata4-pres-pin {
marvell,pins = "mpp35";
marvell,function = "gpio";
};
err_led_pin: err-led-pin {
marvell,pins = "mpp45";
marvell,function = "gpio";
};
/* Two rear eSATA ports */
sata@a0000 {
nr-ports = <2>;
status = "okay";
};
serial@12000 {
@ -328,3 +252,85 @@
gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
};
};
&pinctrl {
poweroff: poweroff {
marvell,pins = "mpp42";
marvell,function = "gpio";
};
power_button_pin: power-button-pin {
marvell,pins = "mpp27";
marvell,function = "gpio";
};
reset_button_pin: reset-button-pin {
marvell,pins = "mpp41";
marvell,function = "gpio";
};
sata1_led_pin: sata1-led-pin {
marvell,pins = "mpp31";
marvell,function = "gpio";
};
sata2_led_pin: sata2-led-pin {
marvell,pins = "mpp40";
marvell,function = "gpio";
};
sata3_led_pin: sata3-led-pin {
marvell,pins = "mpp44";
marvell,function = "gpio";
};
sata4_led_pin: sata4-led-pin {
marvell,pins = "mpp47";
marvell,function = "gpio";
};
sata1_power_pin: sata1-power-pin {
marvell,pins = "mpp24";
marvell,function = "gpio";
};
sata2_power_pin: sata2-power-pin {
marvell,pins = "mpp25";
marvell,function = "gpio";
};
sata3_power_pin: sata3-power-pin {
marvell,pins = "mpp26";
marvell,function = "gpio";
};
sata4_power_pin: sata4-power-pin {
marvell,pins = "mpp28";
marvell,function = "gpio";
};
sata1_pres_pin: sata1-pres-pin {
marvell,pins = "mpp32";
marvell,function = "gpio";
};
sata2_pres_pin: sata2-pres-pin {
marvell,pins = "mpp33";
marvell,function = "gpio";
};
sata3_pres_pin: sata3-pres-pin {
marvell,pins = "mpp34";
marvell,function = "gpio";
};
sata4_pres_pin: sata4-pres-pin {
marvell,pins = "mpp35";
marvell,function = "gpio";
};
err_led_pin: err-led-pin {
marvell,pins = "mpp45";
marvell,function = "gpio";
};
};

14
arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
View file

@ -77,12 +77,7 @@
serial@12100 {
status = "okay";
};
pinctrl {
led_pins: led-pins-0 {
marvell,pins = "mpp49", "mpp51", "mpp53";
marvell,function = "gpio";
};
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
@ -187,3 +182,10 @@
};
};
};
&pinctrl {
led_pins: led-pins-0 {
marvell,pins = "mpp49", "mpp51", "mpp53";
marvell,function = "gpio";
};
};

330
arch/arm/boot/dts/armada-xp-synology-ds414.dts Normal file
View file

@ -0,0 +1,330 @@
/*
* Device Tree file for Synology DS414
*
* Copyright (C) 2014, Arnaud EBALARD <arno@natisbad.org>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*
* Note: this Device Tree assumes that the bootloader has remapped the
* internal registers to 0xf1000000 (instead of the old 0xd0000000).
* The 0xf1000000 is the default used by the recent, DT-capable, U-Boot
* bootloaders provided by Marvell. It is used in recent versions of
* DSM software provided by Synology. Nonetheless, some earlier boards
* were delivered with an older version of u-boot that left internal
* registers mapped at 0xd0000000. If you have such a device you will
* not be able to directly boot a kernel based on this Device Tree. In
* that case, the preferred solution is to update your bootloader (e.g.
* by upgrading to latest version of DSM, or building a new one and
* installing it from u-boot prompt) or adjust the Devive Tree
* (s/0xf1000000/0xd0000000/ in 'ranges' below).
*/
/dts-v1/;
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include "armada-xp-mv78230.dtsi"
/ {
model = "Synology DS414";
compatible = "synology,ds414", "marvell,armadaxp-mv78230",
"marvell,armadaxp", "marvell,armada-370-xp";
chosen {
bootargs = "console=ttyS0,115200 earlyprintk";
stdout-path = &uart0;
};
memory {
device_type = "memory";
reg = <0 0x00000000 0 0x40000000>; /* 1GB */
};
soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>;
pcie-controller {
status = "okay";
/*
* Connected to Marvell 88SX7042 SATA-II controller
* handling the four disks.
*/
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
/*
* Connected to EtronTech EJ168A XHCI controller
* providing the two rear USB 3.0 ports.
*/
pcie@5,0 {
/* Port 1, Lane 0 */
status = "okay";
};
};
internal-regs {
/* RTC is provided by Seiko S-35390A below */
rtc@10300 {
status = "disabled";
};
spi0: spi@10600 {
status = "okay";
spi-flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,n25q064";
reg = <0>; /* Chip select 0 */
spi-max-frequency = <20000000>;
/*
* Warning!
*
* Synology u-boot uses its compiled-in environment
* and it seems Synology did not care to change u-boot
* default configuration in order to allow saving a
* modified environment at a sensible location. So,
* if you do a 'saveenv' under u-boot, your modified
* environment will be saved at 1MB after the start
* of the flash, i.e. in the middle of the uImage.
* For that reason, it is strongly advised not to
* change the default environment, unless you know
* what you are doing.
*/
partition@00000000 { /* u-boot */
label = "RedBoot";
reg = <0x00000000 0x000d0000>; /* 832KB */
};
partition@000c0000 { /* uImage */
label = "zImage";
reg = <0x000d0000 0x002d0000>; /* 2880KB */
};
partition@003a0000 { /* uInitramfs */
label = "rd.gz";
reg = <0x003a0000 0x00430000>; /* 4250KB */
};
partition@007d0000 { /* MAC address and serial number */
label = "vendor";
reg = <0x007d0000 0x00010000>; /* 64KB */
};
partition@007e0000 {
label = "RedBoot config";
reg = <0x007e0000 0x00010000>; /* 64KB */
};
partition@007f0000 {
label = "FIS directory";
reg = <0x007f0000 0x00010000>; /* 64KB */
};
};
};
i2c@11000 {
clock-frequency = <400000>;
status = "okay";
s35390a: s35390a@30 {
compatible = "sii,s35390a";
reg = <0x30>;
};
};
/* Connected to a header on device's PCB. This
* provides the main console for the device.
*
* Warning: the device may not boot with a 3.3V
* USB-serial converter connected when the power
* button is pressed. The converter needs to be
* connected a few seconds after pressing the
* power button. This is possibly due to UART0_TXD
* pin being sampled at reset (bit 0 of SAR).
*/
serial@12000 {
status = "okay";
};
/* Connected to a Microchip PIC16F883 for power control */
serial@12100 {
status = "okay";
};
poweroff@12100 {
compatible = "synology,power-off";
reg = <0x12100 0x100>;
clocks = <&coreclk 0>;
};
/* Front USB 2.0 port */
usb@50000 {
status = "okay";
};
mdio {
phy0: ethernet-phy@0 { /* Marvell 88E1512 */
reg = <0>;
};
phy1: ethernet-phy@1 { /* Marvell 88E1512 */
reg = <1>;
};
};
ethernet@70000 {
status = "okay";
pinctrl-0 = <&ge0_rgmii_pins>;
pinctrl-names = "default";
phy = <&phy1>;
phy-mode = "rgmii-id";
};
ethernet@74000 {
pinctrl-0 = <&ge1_rgmii_pins>;
pinctrl-names = "default";
status = "okay";
phy = <&phy0>;
phy-mode = "rgmii-id";
};
};
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&sata1_pwr_pin &sata2_pwr_pin
&sata3_pwr_pin &sata4_pwr_pin>;
pinctrl-names = "default";
sata1_regulator: sata1-regulator {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "SATA1 Power";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
startup-delay-us = <2000000>;
enable-active-high;
regulator-always-on;
regulator-boot-on;
gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>;
};
sata2_regulator: sata2-regulator {
compatible = "regulator-fixed";
reg = <2>;
regulator-name = "SATA2 Power";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
startup-delay-us = <4000000>;
enable-active-high;
regulator-always-on;
regulator-boot-on;
gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
};
sata3_regulator: sata3-regulator {
compatible = "regulator-fixed";
reg = <3>;
regulator-name = "SATA3 Power";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
startup-delay-us = <6000000>;
enable-active-high;
regulator-always-on;
regulator-boot-on;
gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>;
};
sata4_regulator: sata4-regulator {
compatible = "regulator-fixed";
reg = <4>;
regulator-name = "SATA4 Power";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
startup-delay-us = <8000000>;
enable-active-high;
regulator-always-on;
regulator-boot-on;
gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
};
};
};
&pinctrl {
sata1_pwr_pin: sata1-pwr-pin {
marvell,pins = "mpp42";
marvell,function = "gpio";
};
sata2_pwr_pin: sata2-pwr-pin {
marvell,pins = "mpp44";
marvell,function = "gpio";
};
sata3_pwr_pin: sata3-pwr-pin {
marvell,pins = "mpp45";
marvell,function = "gpio";
};
sata4_pwr_pin: sata4-pwr-pin {
marvell,pins = "mpp46";
marvell,function = "gpio";
};
sata1_pres_pin: sata1-pres-pin {
marvell,pins = "mpp34";
marvell,function = "gpio";
};
sata2_pres_pin: sata2-pres-pin {
marvell,pins = "mpp35";
marvell,function = "gpio";
};
sata3_pres_pin: sata3-pres-pin {
marvell,pins = "mpp40";
marvell,function = "gpio";
};
sata4_pres_pin: sata4-pres-pin {
marvell,pins = "mpp41";
marvell,function = "gpio";
};
syno_id_bit0_pin: syno-id-bit0-pin {
marvell,pins = "mpp26";
marvell,function = "gpio";
};
syno_id_bit1_pin: syno-id-bit1-pin {
marvell,pins = "mpp28";
marvell,function = "gpio";
};
syno_id_bit2_pin: syno-id-bit2-pin {
marvell,pins = "mpp29";
marvell,function = "gpio";
};
fan1_alarm_pin: fan1-alarm-pin {
marvell,pins = "mpp33";
marvell,function = "gpio";
};
fan2_alarm_pin: fan2-alarm-pin {
marvell,pins = "mpp32";
marvell,function = "gpio";
};
};

66
arch/arm/boot/dts/armada-xp.dtsi
View file

@ -44,9 +44,15 @@
compatible = "marvell,aurora-system-cache";
reg = <0x08000 0x1000>;
cache-id-part = <0x100>;
cache-unified;
wt-override;
};
spi0: spi@10600 {
pinctrl-0 = <&spi0_pins>;
pinctrl-names = "default";
};
i2c0: i2c@11000 {
compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
reg = <0x11000 0x100>;
@ -57,8 +63,10 @@
reg = <0x11100 0x100>;
};
serial@12200 {
uart2: serial@12200 {
compatible = "snps,dw-apb-uart";
pinctrl-0 = <&uart2_pins>;
pinctrl-names = "default";
reg = <0x12200 0x100>;
reg-shift = <2>;
interrupts = <43>;
@ -66,8 +74,11 @@
clocks = <&coreclk 0>;
status = "disabled";
};
serial@12300 {
uart3: serial@12300 {
compatible = "snps,dw-apb-uart";
pinctrl-0 = <&uart3_pins>;
pinctrl-names = "default";
reg = <0x12300 0x100>;
reg-shift = <2>;
interrupts = <44>;
@ -204,3 +215,54 @@
};
};
};
&pinctrl {
ge0_gmii_pins: ge0-gmii-pins {
marvell,pins =
"mpp0", "mpp1", "mpp2", "mpp3",
"mpp4", "mpp5", "mpp6", "mpp7",
"mpp8", "mpp9", "mpp10", "mpp11",
"mpp12", "mpp13", "mpp14", "mpp15",
"mpp16", "mpp17", "mpp18", "mpp19",
"mpp20", "mpp21", "mpp22", "mpp23";
marvell,function = "ge0";
};
ge0_rgmii_pins: ge0-rgmii-pins {
marvell,pins =
"mpp0", "mpp1", "mpp2", "mpp3",
"mpp4", "mpp5", "mpp6", "mpp7",
"mpp8", "mpp9", "mpp10", "mpp11";
marvell,function = "ge0";
};
ge1_rgmii_pins: ge1-rgmii-pins {
marvell,pins =
"mpp12", "mpp13", "mpp14", "mpp15",
"mpp16", "mpp17", "mpp18", "mpp19",
"mpp20", "mpp21", "mpp22", "mpp23";
marvell,function = "ge1";
};
sdio_pins: sdio-pins {
marvell,pins = "mpp30", "mpp31", "mpp32",
"mpp33", "mpp34", "mpp35";
marvell,function = "sd0";
};
spi0_pins: spi0-pins {
marvell,pins = "mpp36", "mpp37",
"mpp38", "mpp39";
marvell,function = "spi";
};
uart2_pins: uart2-pins {
marvell,pins = "mpp42", "mpp43";
marvell,function = "uart2";
};
uart3_pins: uart3-pins {
marvell,pins = "mpp44", "mpp45";
marvell,function = "uart3";
};
};

19
arch/arm/boot/dts/at91sam9263.dtsi
View file

@ -677,6 +677,14 @@
};
};
can {
pinctrl_can_rx_tx: can_rx_tx {
atmel,pins =
<AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* CANRX, conflicts with IRQ0 */
AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* CANTX, conflicts with PCK0 */
};
};
pioA: gpio@fffff200 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff200 0x200>;
@ -905,6 +913,17 @@
clock-names = "pwm_clk";
status = "disabled";
};
can: can@fffac000 {
compatible = "atmel,at91sam9263-can";
reg = <0xfffac000 0x300>;
interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can_rx_tx>;
clocks = <&can_clk>;
clock-names = "can_clk";
status = "disabled";
};
};
fb0: fb@0x00700000 {

1
arch/arm/boot/dts/at91sam9x25.dtsi
View file

@ -10,6 +10,7 @@
#include "at91sam9x5_usart3.dtsi"
#include "at91sam9x5_macb0.dtsi"
#include "at91sam9x5_macb1.dtsi"
#include "at91sam9x5_can.dtsi"
/ {
model = "Atmel AT91SAM9X25 SoC";

1
arch/arm/boot/dts/at91sam9x35.dtsi
View file

@ -8,6 +8,7 @@
#include "at91sam9x5.dtsi"
#include "at91sam9x5_macb0.dtsi"
#include "at91sam9x5_can.dtsi"
/ {
model = "Atmel AT91SAM9X35 SoC";

12
arch/arm/boot/dts/at91sam9x5.dtsi
View file

@ -860,6 +860,9 @@
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_dbgu>;
dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(8)>,
<&dma1 1 (AT91_DMA_CFG_PER_ID(9) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
dma-names = "tx", "rx";
clocks = <&mck>;
clock-names = "usart";
status = "disabled";
@ -871,6 +874,9 @@
interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart0>;
dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(3)>,
<&dma0 1 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
dma-names = "tx", "rx";
clocks = <&usart0_clk>;
clock-names = "usart";
status = "disabled";
@ -882,6 +888,9 @@
interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart1>;
dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(5)>,
<&dma0 1 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
dma-names = "tx", "rx";
clocks = <&usart1_clk>;
clock-names = "usart";
status = "disabled";
@ -893,6 +902,9 @@
interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart2>;
dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(12)>,
<&dma1 1 (AT91_DMA_CFG_PER_ID(13) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
dma-names = "tx", "rx";
clocks = <&usart2_clk>;
clock-names = "usart";
status = "disabled";

42
arch/arm/boot/dts/at91sam9x5_can.dtsi
View file

@ -1,5 +1,5 @@
/*
* at91sam9x5_macb0.dtsi - Device Tree Include file for AT91SAM9x5 SoC with 1
* at91sam9x5_can.dtsi - Device Tree Include file for AT91SAM9x5 SoC with 1
* Ethernet interface.
*
* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
@ -26,6 +26,46 @@
};
};
};
can0: can@f8000000 {
compatible = "atmel,at91sam9x5-can";
reg = <0xf8000000 0x300>;
interrupts = <29 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can0_rx_tx>;
clocks = <&can0_clk>;
clock-names = "can_clk";
status = "disabled";
};
can1: can@f8004000 {
compatible = "atmel,at91sam9x5-can";
reg = <0xf8004000 0x300>;
interrupts = <30 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can1_rx_tx>;
clocks = <&can1_clk>;
clock-names = "can_clk";
status = "disabled";
};
pinctrl@fffff400 {
can0 {
pinctrl_can0_rx_tx: can0_rx_tx {
atmel,pins =
<AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* CANRX0, conflicts with DRXD */
AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* CANTX0, conflicts with DTXD */
};
};
can1 {
pinctrl_can1_rx_tx: can1_rx_tx {
atmel,pins =
<AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE /* CANRX1, conflicts with RXD1 */
AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* CANTX1, conflicts with TXD1 */
};
};
};
};
};
};

3
arch/arm/boot/dts/at91sam9x5_usart3.dtsi
View file

@ -57,6 +57,9 @@
interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart3>;
dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(14)>,
<&dma1 1 (AT91_DMA_CFG_PER_ID(15) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
dma-names = "tx", "rx";
clocks = <&usart3_clk>;
clock-names = "usart";
status = "disabled";

15
arch/arm/boot/dts/atlas6.dtsi
View file

@ -131,6 +131,7 @@
reg = <0x90020000 0x10000>;
interrupts = <31>;
clocks = <&clks 35>;
resets = <&rstc 6>;
};
};
@ -312,6 +313,7 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clks 19>;
resets = <&rstc 26>;
status = "disabled";
};
@ -327,6 +329,7 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clks 20>;
resets = <&rstc 27>;
status = "disabled";
};
@ -522,6 +525,18 @@
sirf,function = "sdmmc5";
};
};
i2s_mclk_pins_a: i2s_mclk@0 {
i2s_mclk {
sirf,pins = "i2smclkgrp";
sirf,function = "i2s_mclk";
};
};
i2s_ext_clk_input_pins_a: i2s_ext_clk_input@0 {
i2s_ext_clk_input {
sirf,pins = "i2s_ext_clk_inputgrp";
sirf,function = "i2s_ext_clk_input";
};
};
i2s_pins_a: i2s@0 {
i2s {
sirf,pins = "i2sgrp";

91
arch/arm/boot/dts/bcm-cygnus-clock.dtsi Normal file
View file

@ -0,0 +1,91 @@
/*
* BSD LICENSE
*
* Copyright(c) 2014 Broadcom Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Broadcom Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
clocks {
#address-cells = <1>;
#size-cells = <1>;
ranges;
osc: oscillator {
compatible = "fixed-clock";
#clock-cells = <1>;
clock-frequency = <25000000>;
};
apb_clk: apb_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <1000000000>;
};
periph_clk: periph_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <500000000>;
};
sdio_clk: lcpll_ch2 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <200000000>;
};
axi81_clk: axi81_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <100000000>;
};
keypad_clk: keypad_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <31806>;
};
adc_clk: adc_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <1562500>;
};
pwm_clk: pwm_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <1000000>;
};
lcd_clk: mipipll_ch1 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <100000000>;
};
};

140
arch/arm/boot/dts/bcm-cygnus.dtsi Normal file
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@ -0,0 +1,140 @@
/*
* BSD LICENSE
*
* Copyright(c) 2014 Broadcom Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Broadcom Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include "skeleton.dtsi"
/ {
compatible = "brcm,cygnus";
model = "Broadcom Cygnus SoC";
interrupt-parent = <&gic>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a9";
next-level-cache = <&L2>;
reg = <0x0>;
};
};
/include/ "bcm-cygnus-clock.dtsi"
amba {
#address-cells = <1>;
#size-cells = <1>;
compatible = "arm,amba-bus", "simple-bus";
interrupt-parent = <&gic>;
ranges;
wdt@18009000 {
compatible = "arm,sp805" , "arm,primecell";
reg = <0x18009000 0x1000>;
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&axi81_clk>;
clock-names = "apb_pclk";
};
};
uart0: serial@18020000 {
compatible = "snps,dw-apb-uart";
reg = <0x18020000 0x100>;
reg-shift = <2>;
reg-io-width = <4>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&axi81_clk>;
clock-frequency = <100000000>;
status = "disabled";
};
uart1: serial@18021000 {
compatible = "snps,dw-apb-uart";
reg = <0x18021000 0x100>;
reg-shift = <2>;
reg-io-width = <4>;
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&axi81_clk>;
clock-frequency = <100000000>;
status = "disabled";
};
uart2: serial@18022000 {
compatible = "snps,dw-apb-uart";
reg = <0x18020000 0x100>;
reg-shift = <2>;
reg-io-width = <4>;
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&axi81_clk>;
clock-frequency = <100000000>;
status = "disabled";
};
uart3: serial@18023000 {
compatible = "snps,dw-apb-uart";
reg = <0x18023000 0x100>;
reg-shift = <2>;
reg-io-width = <4>;
interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&axi81_clk>;
clock-frequency = <100000000>;
status = "disabled";
};
gic: interrupt-controller@19021000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
#address-cells = <0>;
interrupt-controller;
reg = <0x19021000 0x1000>,
<0x19020100 0x100>;
};
L2: l2-cache {
compatible = "arm,pl310-cache";
reg = <0x19022000 0x1000>;
cache-unified;
cache-level = <2>;
};
timer@19020200 {
compatible = "arm,cortex-a9-global-timer";
reg = <0x19020200 0x100>;
interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&periph_clk>;
};
};

30
arch/arm/boot/dts/bcm2835-rpi-b-plus.dts Normal file
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@ -0,0 +1,30 @@
/dts-v1/;
/include/ "bcm2835-rpi.dtsi"
/ {
compatible = "raspberrypi,model-b-plus", "brcm,bcm2835";
model = "Raspberry Pi Model B+";
leds {
act {
gpios = <&gpio 47 0>;
};
pwr {
label = "PWR";
gpios = <&gpio 35 0>;
default-state = "keep";
linux,default-trigger = "default-on";
};
};
};
&gpio {
pinctrl-0 = <&gpioout &alt0 &i2s_alt0 &alt3>;
/* I2S interface */
i2s_alt0: i2s_alt0 {
brcm,pins = <18 19 20 21>;
brcm,function = <4>; /* alt0 */
};
};

46
arch/arm/boot/dts/bcm2835-rpi-b.dts
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@ -1,63 +1,23 @@
/dts-v1/;
/include/ "bcm2835.dtsi"
/include/ "bcm2835-rpi.dtsi"
/ {
compatible = "raspberrypi,model-b", "brcm,bcm2835";
model = "Raspberry Pi Model B";
memory {
reg = <0 0x10000000>;
};
leds {
compatible = "gpio-leds";
act {
label = "ACT";
gpios = <&gpio 16 1>;
default-state = "keep";
linux,default-trigger = "heartbeat";
};
};
};
&gpio {
pinctrl-names = "default";
pinctrl-0 = <&gpioout &alt0 &alt2 &alt3>;
gpioout: gpioout {
brcm,pins = <6>;
brcm,function = <1>; /* GPIO out */
};
alt0: alt0 {
brcm,pins = <0 1 2 3 4 5 7 8 9 10 11 14 15 40 45>;
brcm,function = <4>; /* alt0 */
};
alt3: alt3 {
brcm,pins = <48 49 50 51 52 53>;
brcm,function = <7>; /* alt3 */
};
pinctrl-0 = <&gpioout &alt0 &i2s_alt2 &alt3>;
/* I2S interface */
alt2: alt2 {
i2s_alt2: i2s_alt2 {
brcm,pins = <28 29 30 31>;
brcm,function = <6>; /* alt2 */
};
};
&i2c0 {
status = "okay";
clock-frequency = <100000>;
};
&i2c1 {
status = "okay";
clock-frequency = <100000>;
};
&sdhci {
status = "okay";
bus-width = <4>;
};

51
arch/arm/boot/dts/bcm2835-rpi.dtsi Normal file
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@ -0,0 +1,51 @@
/include/ "bcm2835.dtsi"
/ {
memory {
reg = <0 0x10000000>;
};
leds {
compatible = "gpio-leds";
act {
label = "ACT";
default-state = "keep";
linux,default-trigger = "heartbeat";
};
};
};
&gpio {
pinctrl-names = "default";
gpioout: gpioout {
brcm,pins = <6>;
brcm,function = <1>; /* GPIO out */
};
alt0: alt0 {
brcm,pins = <0 1 2 3 4 5 7 8 9 10 11 14 15 40 45>;
brcm,function = <4>; /* alt0 */
};
alt3: alt3 {
brcm,pins = <48 49 50 51 52 53>;
brcm,function = <7>; /* alt3 */
};
};
&i2c0 {
status = "okay";
clock-frequency = <100000>;
};
&i2c1 {
status = "okay";
clock-frequency = <100000>;
};
&sdhci {
status = "okay";
bus-width = <4>;
};

64
arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts Normal file
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@ -0,0 +1,64 @@
/*
* Broadcom BCM470X / BCM5301X ARM platform code.
* DTS for Buffalo WZR-1750DHP
*
* Copyright (C) 2014 Rafał Miłecki <zajec5@gmail.com>
*
* Licensed under the GNU/GPL. See COPYING for details.
*/
/dts-v1/;
#include "bcm4708.dtsi"
/ {
compatible = "buffalo,wzr-1750dhp", "brcm,bcm4708";
model = "Buffalo WZR-1750DHP (BCM4708)";
chosen {
bootargs = "console=ttyS0,115200";
};
memory {
reg = <0x00000000 0x08000000>;
};
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <200>;
restart {
label = "Reset";
linux,code = <KEY_RESTART>;
gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>;
};
aoss {
label = "AOSS";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&chipcommon 12 GPIO_ACTIVE_LOW>;
};
/* Commit mode set by switch? */
mode {
label = "Mode";
linux,code = <KEY_SETUP>;
gpios = <&chipcommon 13 GPIO_ACTIVE_LOW>;
};
/* Switch: AP mode */
sw_ap {
label = "AP";
linux,code = <BTN_0>;
gpios = <&chipcommon 14 GPIO_ACTIVE_LOW>;
};
eject {
label = "USB eject";
linux,code = <KEY_EJECTCD>;
gpios = <&chipcommon 15 GPIO_ACTIVE_LOW>;
};
};
};

59
arch/arm/boot/dts/bcm4708-netgear-r6250.dts
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@ -32,4 +32,63 @@
status = "okay";
};
};
leds {
compatible = "gpio-leds";
logo {
label = "bcm53xx:white:logo";
gpios = <&chipcommon 1 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-on";
};
power0 {
label = "bcm53xx:green:power";
gpios = <&chipcommon 2 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
power1 {
label = "bcm53xx:amber:power";
gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-on";
};
usb {
label = "bcm53xx:blue:usb";
gpios = <&chipcommon 8 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
wireless {
label = "bcm53xx:blue:wireless";
gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
};
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <200>;
wps {
label = "WPS";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&chipcommon 4 GPIO_ACTIVE_LOW>;
};
rfkill {
label = "WiFi";
linux,code = <KEY_RFKILL>;
gpios = <&chipcommon 5 GPIO_ACTIVE_LOW>;
};
restart {
label = "Reset";
linux,code = <KEY_RESTART>;
gpios = <&chipcommon 6 GPIO_ACTIVE_LOW>;
};
};
};

84
arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts Normal file
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@ -0,0 +1,84 @@
/*
* Broadcom BCM470X / BCM5301X ARM platform code.
* DTS for Netgear R6300 V2
*
* Copyright (C) 2014 Rafał Miłecki <zajec5@gmail.com>
*
* Licensed under the GNU/GPL. See COPYING for details.
*/
/dts-v1/;
#include "bcm4708.dtsi"
/ {
compatible = "netgear,r6300v2", "brcm,bcm4708";
model = "Netgear R6300 V2 (BCM4708)";
chosen {
bootargs = "console=ttyS0,115200";
};
memory {
reg = <0x00000000 0x08000000>;
};
leds {
compatible = "gpio-leds";
logo {
label = "bcm53xx:white:logo";
gpios = <&chipcommon 1 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-on";
};
power0 {
label = "bcm53xx:green:power";
gpios = <&chipcommon 2 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
power1 {
label = "bcm53xx:amber:power";
gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-on";
};
usb {
label = "bcm53xx:blue:usb";
gpios = <&chipcommon 8 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
wireless {
label = "bcm53xx:blue:wireless";
gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
};
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <200>;
wps {
label = "WPS";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&chipcommon 4 GPIO_ACTIVE_LOW>;
};
rfkill {
label = "WiFi";
linux,code = <KEY_RFKILL>;
gpios = <&chipcommon 5 GPIO_ACTIVE_LOW>;
};
restart {
label = "Reset";
linux,code = <KEY_RESTART>;
gpios = <&chipcommon 6 GPIO_ACTIVE_LOW>;
};
};
};

78
arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts Normal file
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@ -0,0 +1,78 @@
/*
* Broadcom BCM470X / BCM5301X ARM platform code.
* DTS for Asus RT-N18U
*
* Copyright (C) 2014 Rafał Miłecki <zajec5@gmail.com>
*
* Licensed under the GNU/GPL. See COPYING for details.
*/
/dts-v1/;
#include "bcm47081.dtsi"
/ {
compatible = "asus,rt-n18u", "brcm,bcm47081", "brcm,bcm4708";
model = "Asus RT-N18U (BCM47081)";
chosen {
bootargs = "console=ttyS0,115200";
};
memory {
reg = <0x00000000 0x08000000>;
};
leds {
compatible = "gpio-leds";
power {
label = "bcm53xx:blue:power";
gpios = <&chipcommon 0 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-on";
};
usb2 {
label = "bcm53xx:blue:usb2";
gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
wan {
label = "bcm53xx:blue:wan";
gpios = <&chipcommon 6 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-on";
};
lan {
label = "bcm53xx:blue:lan";
gpios = <&chipcommon 9 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-on";
};
usb3 {
label = "bcm53xx:blue:usb3";
gpios = <&chipcommon 14 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
};
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <200>;
restart {
label = "Reset";
linux,code = <KEY_RESTART>;
gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>;
};
wps {
label = "WPS";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>;
};
};
};

57
arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts Normal file
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@ -0,0 +1,57 @@
/*
* Broadcom BCM470X / BCM5301X ARM platform code.
* DTS for Buffalo WZR-600DHP2
*
* Copyright (C) 2014 Rafał Miłecki <zajec5@gmail.com>
*
* Licensed under the GNU/GPL. See COPYING for details.
*/
/dts-v1/;
#include "bcm47081.dtsi"
/ {
compatible = "buffalo,wzr-600dhp2", "brcm,bcm47081", "brcm,bcm4708";
model = "Buffalo WZR-600DHP2 (BCM47081)";
chosen {
bootargs = "console=ttyS0,115200";
};
memory {
reg = <0x00000000 0x08000000>;
};
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <200>;
aoss {
label = "AOSS";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&chipcommon 9 GPIO_ACTIVE_LOW>;
};
restart {
label = "Reset";
linux,code = <KEY_RESTART>;
gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>;
};
/* Switch device mode? */
mode {
label = "Mode";
linux,code = <KEY_SETUP>;
gpios = <&chipcommon 14 GPIO_ACTIVE_LOW>;
};
eject {
label = "USB eject";
linux,code = <KEY_EJECTCD>;
gpios = <&chipcommon 15 GPIO_ACTIVE_LOW>;
};
};
};

26
arch/arm/boot/dts/bcm47081.dtsi Normal file
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@ -0,0 +1,26 @@
/*
* Broadcom BCM470X / BCM5301X ARM platform code.
* DTS for BCM47081 SoC.
*
* Copyright © 2014 Rafał Miłecki <zajec5@gmail.com>
*
* Licensed under the GNU/GPL. See COPYING for details.
*/
#include "bcm5301x.dtsi"
/ {
compatible = "brcm,bcm47081";
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a9";
next-level-cache = <&L2>;
reg = <0x0>;
};
};
};

51
arch/arm/boot/dts/bcm5301x.dtsi
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@ -8,6 +8,8 @@
* Licensed under the GNU/GPL. See COPYING for details.
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "skeleton.dtsi"
@ -92,4 +94,53 @@
clock-frequency = <400000000>;
};
};
axi@18000000 {
compatible = "brcm,bus-axi";
reg = <0x18000000 0x1000>;
ranges = <0x00000000 0x18000000 0x00100000>;
#address-cells = <1>;
#size-cells = <1>;
#interrupt-cells = <1>;
interrupt-map-mask = <0x000fffff 0xffff>;
interrupt-map =
/* ChipCommon */
<0x00000000 0 &gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
/* USB 2.0 Controller */
<0x00021000 0 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>,
/* USB 3.0 Controller */
<0x00023000 0 &gic GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
/* Ethernet Controller 0 */
<0x00024000 0 &gic GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
/* Ethernet Controller 1 */
<0x00025000 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
/* Ethernet Controller 2 */
<0x00026000 0 &gic GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
/* Ethernet Controller 3 */
<0x00027000 0 &gic GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>,
/* NAND Controller */
<0x00028000 0 &gic GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
<0x00028000 1 &gic GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
<0x00028000 2 &gic GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
<0x00028000 3 &gic GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
<0x00028000 4 &gic GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
<0x00028000 5 &gic GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
<0x00028000 6 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
<0x00028000 7 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
chipcommon: chipcommon@0 {
reg = <0x00000000 0x1000>;
gpio-controller;
#gpio-cells = <2>;
};
};
};

53
arch/arm/boot/dts/bcm911360_entphn.dts Normal file
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@ -0,0 +1,53 @@
/*
* BSD LICENSE
*
* Copyright(c) 2014 Broadcom Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Broadcom Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/dts-v1/;
#include "bcm-cygnus.dtsi"
/ {
model = "Cygnus Enterprise Phone (BCM911360_ENTPHN)";
compatible = "brcm,bcm11360", "brcm,cygnus";
aliases {
serial0 = &uart3;
};
chosen {
stdout-path = &uart3;
bootargs = "console=ttyS0,115200";
};
uart3: serial@18023000 {
status = "okay";
};
};

53
arch/arm/boot/dts/bcm911360k.dts Normal file
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@ -0,0 +1,53 @@
/*
* BSD LICENSE
*
* Copyright(c) 2014 Broadcom Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Broadcom Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/dts-v1/;
#include "bcm-cygnus.dtsi"
/ {
model = "Cygnus SVK (BCM911360K)";
compatible = "brcm,bcm11360", "brcm,cygnus";
aliases {
serial0 = &uart3;
};
chosen {
stdout-path = &uart3;
bootargs = "console=ttyS0,115200";
};
uart3: serial@18023000 {
status = "okay";
};
};

53
arch/arm/boot/dts/bcm958300k.dts Normal file
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@ -0,0 +1,53 @@
/*
* BSD LICENSE
*
* Copyright(c) 2014 Broadcom Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Broadcom Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/dts-v1/;
#include "bcm-cygnus.dtsi"
/ {
model = "Cygnus SVK (BCM958300K)";
compatible = "brcm,bcm58300", "brcm,cygnus";
aliases {
serial0 = &uart3;
};
chosen {
stdout-path = &uart3;
bootargs = "console=ttyS0,115200";
};
uart3: serial@18023000 {
status = "okay";
};
};

16
arch/arm/boot/dts/berlin2-sony-nsz-gs7.dts
View file

@ -26,4 +26,20 @@
};
};
&ahci { status = "okay"; };
&eth1 { status = "okay"; };
/* Unpopulated SATA plug on solder side */
&sata0 { status = "okay"; };
&sata_phy { status = "okay"; };
/* Samsung M8G2FA 8GB eMMC */
&sdhci2 {
non-removable;
bus-width = <8>;
status = "okay";
};
&uart0 { status = "okay"; };

110
arch/arm/boot/dts/berlin2.dtsi
View file

@ -53,6 +53,35 @@
ranges = <0 0xf7000000 0x1000000>;
sdhci0: sdhci@ab0000 {
compatible = "mrvl,pxav3-mmc";
reg = <0xab0000 0x200>;
clocks = <&chip CLKID_SDIO0XIN>, <&chip CLKID_SDIO0>;
clock-names = "io", "core";
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
sdhci1: sdhci@ab0800 {
compatible = "mrvl,pxav3-mmc";
reg = <0xab0800 0x200>;
clocks = <&chip CLKID_SDIO1XIN>, <&chip CLKID_SDIO1>;
clock-names = "io", "core";
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
sdhci2: sdhci@ab1000 {
compatible = "mrvl,pxav3-mmc";
reg = <0xab1000 0x200>;
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&chip CLKID_NFC_ECC>, <&chip CLKID_NFC>;
clock-names = "io", "core";
pinctrl-0 = <&emmc_pmux>;
pinctrl-names = "default";
status = "disabled";
};
l2: l2-cache-controller@ac0000 {
compatible = "marvell,tauros3-cache", "arm,pl310-cache";
reg = <0xac0000 0x1000>;
@ -79,11 +108,47 @@
clocks = <&chip CLKID_TWD>;
};
eth1: ethernet@b90000 {
compatible = "marvell,pxa168-eth";
reg = <0xb90000 0x10000>;
clocks = <&chip CLKID_GETH1>;
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
/* set by bootloader */
local-mac-address = [00 00 00 00 00 00];
#address-cells = <1>;
#size-cells = <0>;
phy-connection-type = "mii";
phy-handle = <&ethphy1>;
status = "disabled";
ethphy1: ethernet-phy@0 {
reg = <0>;
};
};
cpu-ctrl@dd0000 {
compatible = "marvell,berlin-cpu-ctrl";
reg = <0xdd0000 0x10000>;
};
eth0: ethernet@e50000 {
compatible = "marvell,pxa168-eth";
reg = <0xe50000 0x10000>;
clocks = <&chip CLKID_GETH0>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
/* set by bootloader */
local-mac-address = [00 00 00 00 00 00];
#address-cells = <1>;
#size-cells = <0>;
phy-connection-type = "mii";
phy-handle = <&ethphy0>;
status = "disabled";
ethphy0: ethernet-phy@0 {
reg = <0>;
};
};
apb@e80000 {
compatible = "simple-bus";
#address-cells = <1>;
@ -246,12 +311,57 @@
};
};
ahci: sata@e90000 {
compatible = "marvell,berlin2-ahci", "generic-ahci";
reg = <0xe90000 0x1000>;
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&chip CLKID_SATA>;
#address-cells = <1>;
#size-cells = <0>;
sata0: sata-port@0 {
reg = <0>;
phys = <&sata_phy 0>;
status = "disabled";
};
sata1: sata-port@1 {
reg = <1>;
phys = <&sata_phy 1>;
status = "disabled";
};
};
sata_phy: phy@e900a0 {
compatible = "marvell,berlin2-sata-phy";
reg = <0xe900a0 0x200>;
clocks = <&chip CLKID_SATA>;
#address-cells = <1>;
#size-cells = <0>;
#phy-cells = <1>;
status = "disabled";
sata-phy@0 {
reg = <0>;
};
sata-phy@1 {
reg = <1>;
};
};
chip: chip-control@ea0000 {
compatible = "marvell,berlin2-chip-ctrl";
#clock-cells = <1>;
#reset-cells = <2>;
reg = <0xea0000 0x400>;
clocks = <&refclk>;
clock-names = "refclk";
emmc_pmux: emmc-pmux {
groups = "G26";
function = "emmc";
};
};
apb@fc0000 {

30
arch/arm/boot/dts/berlin2cd-google-chromecast.dts
View file

@ -11,6 +11,7 @@
/dts-v1/;
#include "berlin2cd.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Google Chromecast";
@ -24,6 +25,35 @@
device_type = "memory";
reg = <0x00000000 0x20000000>; /* 512 MB */
};
leds {
compatible = "gpio-leds";
white {
label = "white";
gpios = <&portc 1 GPIO_ACTIVE_HIGH>;
default-state = "keep";
};
red {
label = "red";
gpios = <&portc 2 GPIO_ACTIVE_HIGH>;
default-state = "keep";
};
};
};
/*
* AzureWave AW-NH387 (Marvell 88W8787)
* 802.11b/g/n + Bluetooth 2.1
*/
&sdhci0 {
non-removable;
status = "okay";
};
&uart0 { status = "okay"; };
&usb_phy1 { status = "okay"; };
&usb1 { status = "okay"; };

82
arch/arm/boot/dts/berlin2cd.dtsi
View file

@ -45,6 +45,15 @@
ranges = <0 0xf7000000 0x1000000>;
sdhci0: sdhci@ab0000 {
compatible = "mrvl,pxav3-mmc";
reg = <0xab0000 0x200>;
clocks = <&chip CLKID_SDIO0XIN>, <&chip CLKID_SDIO0>;
clock-names = "io", "core";
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
l2: l2-cache-controller@ac0000 {
compatible = "arm,pl310-cache";
reg = <0xac0000 0x1000>;
@ -66,6 +75,58 @@
clocks = <&chip CLKID_TWD>;
};
usb_phy0: usb-phy@b74000 {
compatible = "marvell,berlin2cd-usb-phy";
reg = <0xb74000 0x128>;
#phy-cells = <0>;
resets = <&chip 0x178 23>;
status = "disabled";
};
usb_phy1: usb-phy@b78000 {
compatible = "marvell,berlin2cd-usb-phy";
reg = <0xb78000 0x128>;
#phy-cells = <0>;
resets = <&chip 0x178 24>;
status = "disabled";
};
eth1: ethernet@b90000 {
compatible = "marvell,pxa168-eth";
reg = <0xb90000 0x10000>;
clocks = <&chip CLKID_GETH1>;
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
/* set by bootloader */
local-mac-address = [00 00 00 00 00 00];
#address-cells = <1>;
#size-cells = <0>;
phy-connection-type = "mii";
phy-handle = <&ethphy1>;
status = "disabled";
ethphy1: ethernet-phy@0 {
reg = <0>;
};
};
eth0: ethernet@e50000 {
compatible = "marvell,pxa168-eth";
reg = <0xe50000 0x10000>;
clocks = <&chip CLKID_GETH0>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
/* set by bootloader */
local-mac-address = [00 00 00 00 00 00];
#address-cells = <1>;
#size-cells = <0>;
phy-connection-type = "mii";
phy-handle = <&ethphy0>;
status = "disabled";
ethphy0: ethernet-phy@0 {
reg = <0>;
};
};
apb@e80000 {
compatible = "simple-bus";
#address-cells = <1>;
@ -231,6 +292,7 @@
chip: chip-control@ea0000 {
compatible = "marvell,berlin2cd-chip-ctrl";
#clock-cells = <1>;
#reset-cells = <2>;
reg = <0xea0000 0x400>;
clocks = <&refclk>;
clock-names = "refclk";
@ -241,6 +303,26 @@
};
};
usb0: usb@ed0000 {
compatible = "chipidea,usb2";
reg = <0xed0000 0x200>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&chip CLKID_USB0>;
phys = <&usb_phy0>;
phy-names = "usb-phy";
status = "disabled";
};
usb1: usb@ee0000 {
compatible = "chipidea,usb2";
reg = <0xee0000 0x200>;
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&chip CLKID_USB1>;
phys = <&usb_phy1>;
phy-names = "usb-phy";
status = "disabled";
};
apb@fc0000 {
compatible = "simple-bus";
#address-cells = <1>;

61
arch/arm/boot/dts/berlin2q-marvell-dmp.dts
View file

@ -7,6 +7,8 @@
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include "berlin2q.dtsi"
/ {
@ -21,6 +23,39 @@
choosen {
bootargs = "console=ttyS0,115200 earlyprintk";
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
reg_usb0_vbus: regulator@0 {
compatible = "regulator-fixed";
regulator-name = "usb0_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&portb 8 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_usb1_vbus: regulator@1 {
compatible = "regulator-fixed";
regulator-name = "usb1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&portb 10 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_usb2_vbus: regulator@2 {
compatible = "regulator-fixed";
regulator-name = "usb2_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&portb 12 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
};
&sdhci1 {
@ -46,6 +81,32 @@
status = "okay";
};
&usb_phy0 {
status = "okay";
};
&usb_phy2 {
status = "okay";
};
&usb0 {
vbus-supply = <&reg_usb0_vbus>;
status = "okay";
};
&usb2 {
vbus-supply = <&reg_usb2_vbus>;
status = "okay";
};
&eth0 {
status = "okay";
};
&sata0 {
status = "okay";
};
&sata_phy {
status = "okay";
};

96
arch/arm/boot/dts/berlin2q.dtsi
View file

@ -114,6 +114,40 @@
#interrupt-cells = <3>;
};
usb_phy2: phy@a2f400 {
compatible = "marvell,berlin2-usb-phy";
reg = <0xa2f400 0x128>;
#phy-cells = <0>;
resets = <&chip 0x104 14>;
status = "disabled";
};
usb2: usb@a30000 {
compatible = "chipidea,usb2";
reg = <0xa30000 0x10000>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&chip CLKID_USB2>;
phys = <&usb_phy2>;
phy-names = "usb-phy";
status = "disabled";
};
usb_phy0: phy@b74000 {
compatible = "marvell,berlin2-usb-phy";
reg = <0xb74000 0x128>;
#phy-cells = <0>;
resets = <&chip 0x104 12>;
status = "disabled";
};
usb_phy1: phy@b78000 {
compatible = "marvell,berlin2-usb-phy";
reg = <0xb78000 0x128>;
#phy-cells = <0>;
resets = <&chip 0x104 13>;
status = "disabled";
};
eth0: ethernet@b90000 {
compatible = "marvell,pxa168-eth";
reg = <0xb90000 0x10000>;
@ -123,6 +157,7 @@
local-mac-address = [00 00 00 00 00 00];
#address-cells = <1>;
#size-cells = <0>;
phy-connection-type = "mii";
phy-handle = <&ethphy0>;
status = "disabled";
@ -255,7 +290,6 @@
reg = <0x2c14 0x14>;
clocks = <&chip CLKID_CFG>;
clock-names = "timer";
status = "disabled";
};
timer2: timer@2c28 {
@ -349,6 +383,7 @@
chip: chip-control@ea0000 {
compatible = "marvell,berlin2q-chip-ctrl";
#clock-cells = <1>;
#reset-cells = <2>;
reg = <0xea0000 0x400>, <0xdd0170 0x10>;
clocks = <&refclk>;
clock-names = "refclk";
@ -364,6 +399,65 @@
};
};
ahci: sata@e90000 {
compatible = "marvell,berlin2q-ahci", "generic-ahci";
reg = <0xe90000 0x1000>;
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&chip CLKID_SATA>;
#address-cells = <1>;
#size-cells = <0>;
sata0: sata-port@0 {
reg = <0>;
phys = <&sata_phy 0>;
status = "disabled";
};
sata1: sata-port@1 {
reg = <1>;
phys = <&sata_phy 1>;
status = "disabled";
};
};
sata_phy: phy@e900a0 {
compatible = "marvell,berlin2q-sata-phy";
reg = <0xe900a0 0x200>;
clocks = <&chip CLKID_SATA>;
#address-cells = <1>;
#size-cells = <0>;
#phy-cells = <1>;
status = "disabled";
sata-phy@0 {
reg = <0>;
};
sata-phy@1 {
reg = <1>;
};
};
usb0: usb@ed0000 {
compatible = "chipidea,usb2";
reg = <0xed0000 0x10000>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&chip CLKID_USB0>;
phys = <&usb_phy0>;
phy-names = "usb-phy";
status = "disabled";
};
usb1: usb@ee0000 {
compatible = "chipidea,usb2";
reg = <0xee0000 0x10000>;
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&chip CLKID_USB1>;
phys = <&usb_phy1>;
phy-names = "usb-phy";
status = "disabled";
};
apb@fc0000 {
compatible = "simple-bus";
#address-cells = <1>;

133
arch/arm/boot/dts/dra7-evm.dts
View file

@ -171,6 +171,101 @@
0xd0 (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle */
>;
};
cpsw_default: cpsw_default {
pinctrl-single,pins = <
/* Slave 1 */
0x250 (PIN_OUTPUT | MUX_MODE0) /* rgmii0_txc.rgmii0_txc */
0x254 (PIN_OUTPUT | MUX_MODE0) /* rgmii0_txctl.rgmii0_txctl */
0x258 (PIN_OUTPUT | MUX_MODE0) /* rgmii0_td3.rgmii0_txd3 */
0x25c (PIN_OUTPUT | MUX_MODE0) /* rgmii0_txd2.rgmii0_txd2 */
0x260 (PIN_OUTPUT | MUX_MODE0) /* rgmii0_txd1.rgmii0_txd1 */
0x264 (PIN_OUTPUT | MUX_MODE0) /* rgmii0_txd0.rgmii0_txd0 */
0x268 (PIN_INPUT | MUX_MODE0) /* rgmii0_rxc.rgmii0_rxc */
0x26c (PIN_INPUT | MUX_MODE0) /* rgmii0_rxctl.rgmii0_rxctl */
0x270 (PIN_INPUT | MUX_MODE0) /* rgmii0_rxd3.rgmii0_rxd3 */
0x274 (PIN_INPUT | MUX_MODE0) /* rgmii0_rxd2.rgmii0_rxd2 */
0x278 (PIN_INPUT | MUX_MODE0) /* rgmii0_rxd1.rgmii0_rxd1 */
0x27c (PIN_INPUT | MUX_MODE0) /* rgmii0_rxd0.rgmii0_rxd0 */
/* Slave 2 */
0x198 (PIN_OUTPUT | MUX_MODE3) /* vin2a_d12.rgmii1_txc */
0x19c (PIN_OUTPUT | MUX_MODE3) /* vin2a_d13.rgmii1_tctl */
0x1a0 (PIN_OUTPUT | MUX_MODE3) /* vin2a_d14.rgmii1_td3 */
0x1a4 (PIN_OUTPUT | MUX_MODE3) /* vin2a_d15.rgmii1_td2 */
0x1a8 (PIN_OUTPUT | MUX_MODE3) /* vin2a_d16.rgmii1_td1 */
0x1ac (PIN_OUTPUT | MUX_MODE3) /* vin2a_d17.rgmii1_td0 */
0x1b0 (PIN_INPUT | MUX_MODE3) /* vin2a_d18.rgmii1_rclk */
0x1b4 (PIN_INPUT | MUX_MODE3) /* vin2a_d19.rgmii1_rctl */
0x1b8 (PIN_INPUT | MUX_MODE3) /* vin2a_d20.rgmii1_rd3 */
0x1bc (PIN_INPUT | MUX_MODE3) /* vin2a_d21.rgmii1_rd2 */
0x1c0 (PIN_INPUT | MUX_MODE3) /* vin2a_d22.rgmii1_rd1 */
0x1c4 (PIN_INPUT | MUX_MODE3) /* vin2a_d23.rgmii1_rd0 */
>;
};
cpsw_sleep: cpsw_sleep {
pinctrl-single,pins = <
/* Slave 1 */
0x250 (MUX_MODE15)
0x254 (MUX_MODE15)
0x258 (MUX_MODE15)
0x25c (MUX_MODE15)
0x260 (MUX_MODE15)
0x264 (MUX_MODE15)
0x268 (MUX_MODE15)
0x26c (MUX_MODE15)
0x270 (MUX_MODE15)
0x274 (MUX_MODE15)
0x278 (MUX_MODE15)
0x27c (MUX_MODE15)
/* Slave 2 */
0x198 (MUX_MODE15)
0x19c (MUX_MODE15)
0x1a0 (MUX_MODE15)
0x1a4 (MUX_MODE15)
0x1a8 (MUX_MODE15)
0x1ac (MUX_MODE15)
0x1b0 (MUX_MODE15)
0x1b4 (MUX_MODE15)
0x1b8 (MUX_MODE15)
0x1bc (MUX_MODE15)
0x1c0 (MUX_MODE15)
0x1c4 (MUX_MODE15)
>;
};
davinci_mdio_default: davinci_mdio_default {
pinctrl-single,pins = <
0x23c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_d.mdio_d */
0x240 (PIN_INPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
>;
};
davinci_mdio_sleep: davinci_mdio_sleep {
pinctrl-single,pins = <
0x23c (MUX_MODE15)
0x240 (MUX_MODE15)
>;
};
dcan1_pins_default: dcan1_pins_default {
pinctrl-single,pins = <
0x3d0 (PIN_OUTPUT | MUX_MODE0) /* dcan1_tx */
0x3d4 (MUX_MODE15) /* dcan1_rx.off */
0x418 (PULL_DIS | MUX_MODE1) /* wakeup0.dcan1_rx */
>;
};
dcan1_pins_sleep: dcan1_pins_sleep {
pinctrl-single,pins = <
0x3d0 (MUX_MODE15) /* dcan1_tx.off */
0x3d4 (MUX_MODE15) /* dcan1_rx.off */
0x418 (MUX_MODE15) /* wakeup0.off */
>;
};
};
&i2c1 {
@ -201,6 +296,7 @@
regulator-name = "smps45";
regulator-min-microvolt = < 850000>;
regulator-max-microvolt = <1150000>;
regulator-always-on;
regulator-boot-on;
};
@ -209,6 +305,7 @@
regulator-name = "smps6";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <12500000>;
regulator-always-on;
regulator-boot-on;
};
@ -226,6 +323,7 @@
regulator-name = "smps8";
regulator-min-microvolt = < 850000>;
regulator-max-microvolt = <1250000>;
regulator-always-on;
regulator-boot-on;
};
@ -252,6 +350,7 @@
regulator-name = "ldo2";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};
@ -269,6 +368,7 @@
regulator-name = "ldo9";
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
regulator-always-on;
regulator-boot-on;
};
@ -528,3 +628,36 @@
ti,no-reset-on-init;
ti,no-idle-on-init;
};
&mac {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&cpsw_default>;
pinctrl-1 = <&cpsw_sleep>;
dual_emac;
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <2>;
phy-mode = "rgmii";
dual_emac_res_vlan = <1>;
};
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <3>;
phy-mode = "rgmii";
dual_emac_res_vlan = <2>;
};
&davinci_mdio {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
};
&dcan1 {
status = "ok";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&dcan1_pins_default>;
pinctrl-1 = <&dcan1_pins_sleep>;
};

202
arch/arm/boot/dts/dra7.dtsi
View file

@ -34,6 +34,14 @@
serial3 = &uart4;
serial4 = &uart5;
serial5 = &uart6;
serial6 = &uart7;
serial7 = &uart8;
serial8 = &uart9;
serial9 = &uart10;
ethernet0 = &cpsw_emac0;
ethernet1 = &cpsw_emac1;
d_can0 = &dcan1;
d_can1 = &dcan2;
};
timer {
@ -201,6 +209,11 @@
ti,hwmods = "counter_32k";
};
dra7_ctrl_core: ctrl_core@4a002000 {
compatible = "syscon";
reg = <0x4a002000 0x6d0>;
};
dra7_ctrl_general: tisyscon@4a002e00 {
compatible = "syscon";
reg = <0x4a002e00 0x7c>;
@ -335,6 +348,8 @@
ti,hwmods = "uart1";
clock-frequency = <48000000>;
status = "disabled";
dmas = <&sdma 49>, <&sdma 50>;
dma-names = "tx", "rx";
};
uart2: serial@4806c000 {
@ -344,6 +359,8 @@
ti,hwmods = "uart2";
clock-frequency = <48000000>;
status = "disabled";
dmas = <&sdma 51>, <&sdma 52>;
dma-names = "tx", "rx";
};
uart3: serial@48020000 {
@ -353,6 +370,8 @@
ti,hwmods = "uart3";
clock-frequency = <48000000>;
status = "disabled";
dmas = <&sdma 53>, <&sdma 54>;
dma-names = "tx", "rx";
};
uart4: serial@4806e000 {
@ -362,6 +381,8 @@
ti,hwmods = "uart4";
clock-frequency = <48000000>;
status = "disabled";
dmas = <&sdma 55>, <&sdma 56>;
dma-names = "tx", "rx";
};
uart5: serial@48066000 {
@ -371,6 +392,8 @@
ti,hwmods = "uart5";
clock-frequency = <48000000>;
status = "disabled";
dmas = <&sdma 63>, <&sdma 64>;
dma-names = "tx", "rx";
};
uart6: serial@48068000 {
@ -380,6 +403,8 @@
ti,hwmods = "uart6";
clock-frequency = <48000000>;
status = "disabled";
dmas = <&sdma 79>, <&sdma 80>;
dma-names = "tx", "rx";
};
uart7: serial@48420000 {
@ -421,7 +446,11 @@
mailbox1: mailbox@4a0f4000 {
compatible = "ti,omap4-mailbox";
reg = <0x4a0f4000 0x200>;
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mailbox1";
#mbox-cells = <1>;
ti,mbox-num-users = <3>;
ti,mbox-num-fifos = <8>;
status = "disabled";
@ -430,7 +459,12 @@
mailbox2: mailbox@4883a000 {
compatible = "ti,omap4-mailbox";
reg = <0x4883a000 0x200>;
interrupts = <GIC_SPI 237 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mailbox2";
#mbox-cells = <1>;
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <12>;
status = "disabled";
@ -439,7 +473,12 @@
mailbox3: mailbox@4883c000 {
compatible = "ti,omap4-mailbox";
reg = <0x4883c000 0x200>;
interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mailbox3";
#mbox-cells = <1>;
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <12>;
status = "disabled";
@ -448,7 +487,12 @@
mailbox4: mailbox@4883e000 {
compatible = "ti,omap4-mailbox";
reg = <0x4883e000 0x200>;
interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mailbox4";
#mbox-cells = <1>;
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <12>;
status = "disabled";
@ -457,7 +501,12 @@
mailbox5: mailbox@48840000 {
compatible = "ti,omap4-mailbox";
reg = <0x48840000 0x200>;
interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mailbox5";
#mbox-cells = <1>;
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <12>;
status = "disabled";
@ -466,7 +515,12 @@
mailbox6: mailbox@48842000 {
compatible = "ti,omap4-mailbox";
reg = <0x48842000 0x200>;
interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mailbox6";
#mbox-cells = <1>;
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <12>;
status = "disabled";
@ -475,7 +529,12 @@
mailbox7: mailbox@48844000 {
compatible = "ti,omap4-mailbox";
reg = <0x48844000 0x200>;
interrupts = <GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mailbox7";
#mbox-cells = <1>;
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <12>;
status = "disabled";
@ -484,7 +543,12 @@
mailbox8: mailbox@48846000 {
compatible = "ti,omap4-mailbox";
reg = <0x48846000 0x200>;
interrupts = <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mailbox8";
#mbox-cells = <1>;
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <12>;
status = "disabled";
@ -493,7 +557,12 @@
mailbox9: mailbox@4885e000 {
compatible = "ti,omap4-mailbox";
reg = <0x4885e000 0x200>;
interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mailbox9";
#mbox-cells = <1>;
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <12>;
status = "disabled";
@ -502,7 +571,12 @@
mailbox10: mailbox@48860000 {
compatible = "ti,omap4-mailbox";
reg = <0x48860000 0x200>;
interrupts = <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mailbox10";
#mbox-cells = <1>;
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <12>;
status = "disabled";
@ -511,7 +585,12 @@
mailbox11: mailbox@48862000 {
compatible = "ti,omap4-mailbox";
reg = <0x48862000 0x200>;
interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mailbox11";
#mbox-cells = <1>;
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <12>;
status = "disabled";
@ -520,7 +599,12 @@
mailbox12: mailbox@48864000 {
compatible = "ti,omap4-mailbox";
reg = <0x48864000 0x200>;
interrupts = <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mailbox12";
#mbox-cells = <1>;
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <12>;
status = "disabled";
@ -529,7 +613,12 @@
mailbox13: mailbox@48802000 {
compatible = "ti,omap4-mailbox";
reg = <0x48802000 0x200>;
interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mailbox13";
#mbox-cells = <1>;
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <12>;
status = "disabled";
@ -1075,6 +1164,15 @@
status = "disabled";
};
rtc@48838000 {
compatible = "ti,am3352-rtc";
reg = <0x48838000 0x100>;
interrupts = <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "rtcss";
clocks = <&sys_32k_ck>;
};
omap_control_usb2phy1: control-phy@4a002300 {
compatible = "ti,control-phy-usb2";
reg = <0x4a002300 0x4>;
@ -1141,7 +1239,7 @@
};
};
omap_dwc3_1@48880000 {
omap_dwc3_1: omap_dwc3_1@48880000 {
compatible = "ti,dwc3";
ti,hwmods = "usb_otg_ss1";
reg = <0x48880000 0x10000>;
@ -1162,7 +1260,7 @@
};
};
omap_dwc3_2@488c0000 {
omap_dwc3_2: omap_dwc3_2@488c0000 {
compatible = "ti,dwc3";
ti,hwmods = "usb_otg_ss2";
reg = <0x488c0000 0x10000>;
@ -1184,7 +1282,7 @@
};
/* IRQ for DWC3_3 and DWC3_4 need IRQ crossbar */
omap_dwc3_3@48900000 {
omap_dwc3_3: omap_dwc3_3@48900000 {
compatible = "ti,dwc3";
ti,hwmods = "usb_otg_ss3";
reg = <0x48900000 0x10000>;
@ -1204,26 +1302,6 @@
};
};
omap_dwc3_4@48940000 {
compatible = "ti,dwc3";
ti,hwmods = "usb_otg_ss4";
reg = <0x48940000 0x10000>;
interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <1>;
utmi-mode = <2>;
ranges;
status = "disabled";
usb4: usb@48950000 {
compatible = "snps,dwc3";
reg = <0x48950000 0x17000>;
interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
tx-fifo-resize;
maximum-speed = "high-speed";
dr_mode = "otg";
};
};
elm: elm@48078000 {
compatible = "ti,am3352-elm";
reg = <0x48078000 0xfc0>; /* device IO registers */
@ -1265,6 +1343,84 @@
ti,irqs-skip = <10 133 139 140>;
ti,irqs-safe-map = <0>;
};
mac: ethernet@4a100000 {
compatible = "ti,cpsw";
ti,hwmods = "gmac";
clocks = <&dpll_gmac_ck>, <&gmac_gmii_ref_clk_div>;
clock-names = "fck", "cpts";
cpdma_channels = <8>;
ale_entries = <1024>;
bd_ram_size = <0x2000>;
no_bd_ram = <0>;
rx_descs = <64>;
mac_control = <0x20>;
slaves = <2>;
active_slave = <0>;
cpts_clock_mult = <0x80000000>;
cpts_clock_shift = <29>;
reg = <0x48484000 0x1000
0x48485200 0x2E00>;
#address-cells = <1>;
#size-cells = <1>;
/*
* rx_thresh_pend
* rx_pend
* tx_pend
* misc_pend
*/
interrupts = <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>;
ranges;
status = "disabled";
davinci_mdio: mdio@48485000 {
compatible = "ti,davinci_mdio";
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "davinci_mdio";
bus_freq = <1000000>;
reg = <0x48485000 0x100>;
};
cpsw_emac0: slave@48480200 {
/* Filled in by U-Boot */
mac-address = [ 00 00 00 00 00 00 ];
};
cpsw_emac1: slave@48480300 {
/* Filled in by U-Boot */
mac-address = [ 00 00 00 00 00 00 ];
};
phy_sel: cpsw-phy-sel@4a002554 {
compatible = "ti,dra7xx-cpsw-phy-sel";
reg= <0x4a002554 0x4>;
reg-names = "gmii-sel";
};
};
dcan1: can@481cc000 {
compatible = "ti,dra7-d_can";
ti,hwmods = "dcan1";
reg = <0x4ae3c000 0x2000>;
syscon-raminit = <&dra7_ctrl_core 0x558 0>;
interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&dcan1_sys_clk_mux>;
status = "disabled";
};
dcan2: can@481d0000 {
compatible = "ti,dra7-d_can";
ti,hwmods = "dcan2";
reg = <0x48480000 0x2000>;
syscon-raminit = <&dra7_ctrl_core 0x558 1>;
interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&sys_clkin1>;
status = "disabled";
};
};
};

319
arch/arm/boot/dts/dra72-evm.dts
View file

@ -17,6 +17,13 @@
device_type = "memory";
reg = <0x80000000 0x40000000>; /* 1024 MB */
};
evm_3v3: fixedregulator-evm_3v3 {
compatible = "regulator-fixed";
regulator-name = "evm_3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
};
&dra7_pmx_core {
@ -26,6 +33,94 @@
0x404 (PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */
>;
};
nand_default: nand_default {
pinctrl-single,pins = <
0x0 (PIN_INPUT | MUX_MODE0) /* gpmc_ad0 */
0x4 (PIN_INPUT | MUX_MODE0) /* gpmc_ad1 */
0x8 (PIN_INPUT | MUX_MODE0) /* gpmc_ad2 */
0xc (PIN_INPUT | MUX_MODE0) /* gpmc_ad3 */
0x10 (PIN_INPUT | MUX_MODE0) /* gpmc_ad4 */
0x14 (PIN_INPUT | MUX_MODE0) /* gpmc_ad5 */
0x18 (PIN_INPUT | MUX_MODE0) /* gpmc_ad6 */
0x1c (PIN_INPUT | MUX_MODE0) /* gpmc_ad7 */
0x20 (PIN_INPUT | MUX_MODE0) /* gpmc_ad8 */
0x24 (PIN_INPUT | MUX_MODE0) /* gpmc_ad9 */
0x28 (PIN_INPUT | MUX_MODE0) /* gpmc_ad10 */
0x2c (PIN_INPUT | MUX_MODE0) /* gpmc_ad11 */
0x30 (PIN_INPUT | MUX_MODE0) /* gpmc_ad12 */
0x34 (PIN_INPUT | MUX_MODE0) /* gpmc_ad13 */
0x38 (PIN_INPUT | MUX_MODE0) /* gpmc_ad14 */
0x3c (PIN_INPUT | MUX_MODE0) /* gpmc_ad15 */
0xb4 (PIN_OUTPUT | MUX_MODE0) /* gpmc_cs0 */
0xc4 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale */
0xcc (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen */
0xc8 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren */
0xd0 (PIN_OUTPUT | MUX_MODE0) /* gpmc_ben0 */
0xd8 (PIN_INPUT | MUX_MODE0) /* gpmc_wait0 */
>;
};
usb1_pins: pinmux_usb1_pins {
pinctrl-single,pins = <
0x280 (PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */
>;
};
usb2_pins: pinmux_usb2_pins {
pinctrl-single,pins = <
0x284 (PIN_INPUT_SLEW | MUX_MODE0) /* usb2_drvvbus */
>;
};
tps65917_pins_default: tps65917_pins_default {
pinctrl-single,pins = <
0x424 (PIN_INPUT_PULLUP | MUX_MODE1) /* wakeup3.sys_nirq1 */
>;
};
mmc1_pins_default: mmc1_pins_default {
pinctrl-single,pins = <
0x36c (PIN_INPUT | MUX_MODE14) /* mmc1sdcd.gpio219 */
0x354 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
0x358 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
0x35c (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
0x360 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
0x364 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
0x368 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
>;
};
mmc2_pins_default: mmc2_pins_default {
pinctrl-single,pins = <
0x9c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
0xb0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
0xa0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
0xa4 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
0xa8 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
0xac (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
0x8c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
0x90 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
0x94 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
0x98 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
>;
};
dcan1_pins_default: dcan1_pins_default {
pinctrl-single,pins = <
0x3d0 (PIN_OUTPUT | MUX_MODE0) /* dcan1_tx */
0x3d4 (MUX_MODE15) /* dcan1_rx.off */
0x418 (PULL_DIS | MUX_MODE1) /* wakeup0.dcan1_rx */
>;
};
dcan1_pins_sleep: dcan1_pins_sleep {
pinctrl-single,pins = <
0x3d0 (MUX_MODE15) /* dcan1_tx.off */
0x3d4 (MUX_MODE15) /* dcan1_rx.off */
0x418 (MUX_MODE15) /* wakeup0.off */
>;
};
};
&i2c1 {
@ -38,6 +133,9 @@
compatible = "ti,tps65917";
reg = <0x58>;
pinctrl-names = "default";
pinctrl-0 = <&tps65917_pins_default>;
interrupts = <GIC_SPI 2 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */
interrupt-parent = <&gic>;
interrupt-controller;
@ -136,9 +234,230 @@
};
};
};
tps65917_power_button {
compatible = "ti,palmas-pwrbutton";
interrupt-parent = <&tps65917>;
interrupts = <1 IRQ_TYPE_NONE>;
wakeup-source;
ti,palmas-long-press-seconds = <6>;
};
};
};
&uart1 {
status = "okay";
};
&elm {
status = "okay";
};
&gpmc {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&nand_default>;
ranges = <0 0 0 0x01000000>; /* minimum GPMC partition = 16MB */
nand@0,0 {
/* To use NAND, DIP switch SW5 must be set like so:
* SW5.1 (NAND_SELn) = ON (LOW)
* SW5.9 (GPMC_WPN) = OFF (HIGH)
*/
reg = <0 0 4>; /* device IO registers */
ti,nand-ecc-opt = "bch8";
ti,elm-id = <&elm>;
nand-bus-width = <16>;
gpmc,device-width = <2>;
gpmc,sync-clk-ps = <0>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <80>;
gpmc,cs-wr-off-ns = <80>;
gpmc,adv-on-ns = <0>;
gpmc,adv-rd-off-ns = <60>;
gpmc,adv-wr-off-ns = <60>;
gpmc,we-on-ns = <10>;
gpmc,we-off-ns = <50>;
gpmc,oe-on-ns = <4>;
gpmc,oe-off-ns = <40>;
gpmc,access-ns = <40>;
gpmc,wr-access-ns = <80>;
gpmc,rd-cycle-ns = <80>;
gpmc,wr-cycle-ns = <80>;
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
gpmc,wait-monitoring-ns = <0>;
gpmc,wr-data-mux-bus-ns = <0>;
/* MTD partition table */
/* All SPL-* partitions are sized to minimal length
* which can be independently programmable. For
* NAND flash this is equal to size of erase-block */
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "NAND.SPL";
reg = <0x00000000 0x000020000>;
};
partition@1 {
label = "NAND.SPL.backup1";
reg = <0x00020000 0x00020000>;
};
partition@2 {
label = "NAND.SPL.backup2";
reg = <0x00040000 0x00020000>;
};
partition@3 {
label = "NAND.SPL.backup3";
reg = <0x00060000 0x00020000>;
};
partition@4 {
label = "NAND.u-boot-spl-os";
reg = <0x00080000 0x00040000>;
};
partition@5 {
label = "NAND.u-boot";
reg = <0x000c0000 0x00100000>;
};
partition@6 {
label = "NAND.u-boot-env";
reg = <0x001c0000 0x00020000>;
};
partition@7 {
label = "NAND.u-boot-env.backup1";
reg = <0x001e0000 0x00020000>;
};
partition@8 {
label = "NAND.kernel";
reg = <0x00200000 0x00800000>;
};
partition@9 {
label = "NAND.file-system";
reg = <0x00a00000 0x0f600000>;
};
};
};
&usb2_phy1 {
phy-supply = <&ldo4_reg>;
};
&usb2_phy2 {
phy-supply = <&ldo4_reg>;
};
&usb1 {
dr_mode = "peripheral";
pinctrl-names = "default";
pinctrl-0 = <&usb1_pins>;
};
&usb2 {
dr_mode = "host";
pinctrl-names = "default";
pinctrl-0 = <&usb2_pins>;
};
&mmc1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins_default>;
vmmc-supply = <&ldo1_reg>;
bus-width = <4>;
/*
* SDCD signal is not being used here - using the fact that GPIO mode
* is a viable alternative
*/
cd-gpios = <&gpio6 27 0>;
};
&mmc2 {
/* SW5-3 in ON position */
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mmc2_pins_default>;
vmmc-supply = <&evm_3v3>;
bus-width = <8>;
ti,non-removable;
};
&dra7_pmx_core {
cpsw_default: cpsw_default {
pinctrl-single,pins = <
/* Slave 2 */
0x198 (PIN_OUTPUT | MUX_MODE3) /* vin2a_d12.rgmii1_txc */
0x19c (PIN_OUTPUT | MUX_MODE3) /* vin2a_d13.rgmii1_tctl */
0x1a0 (PIN_OUTPUT | MUX_MODE3) /* vin2a_d14.rgmii1_td3 */
0x1a4 (PIN_OUTPUT | MUX_MODE3) /* vin2a_d15.rgmii1_td2 */
0x1a8 (PIN_OUTPUT | MUX_MODE3) /* vin2a_d16.rgmii1_td1 */
0x1ac (PIN_OUTPUT | MUX_MODE3) /* vin2a_d17.rgmii1_td0 */
0x1b0 (PIN_INPUT | MUX_MODE3) /* vin2a_d18.rgmii1_rclk */
0x1b4 (PIN_INPUT | MUX_MODE3) /* vin2a_d19.rgmii1_rctl */
0x1b8 (PIN_INPUT | MUX_MODE3) /* vin2a_d20.rgmii1_rd3 */
0x1bc (PIN_INPUT | MUX_MODE3) /* vin2a_d21.rgmii1_rd2 */
0x1c0 (PIN_INPUT | MUX_MODE3) /* vin2a_d22.rgmii1_rd1 */
0x1c4 (PIN_INPUT | MUX_MODE3) /* vin2a_d23.rgmii1_rd0 */
>;
};
cpsw_sleep: cpsw_sleep {
pinctrl-single,pins = <
/* Slave 2 */
0x198 (MUX_MODE15)
0x19c (MUX_MODE15)
0x1a0 (MUX_MODE15)
0x1a4 (MUX_MODE15)
0x1a8 (MUX_MODE15)
0x1ac (MUX_MODE15)
0x1b0 (MUX_MODE15)
0x1b4 (MUX_MODE15)
0x1b8 (MUX_MODE15)
0x1bc (MUX_MODE15)
0x1c0 (MUX_MODE15)
0x1c4 (MUX_MODE15)
>;
};
davinci_mdio_default: davinci_mdio_default {
pinctrl-single,pins = <
/* MDIO */
0x23c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_d.mdio_d */
0x240 (PIN_INPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
>;
};
davinci_mdio_sleep: davinci_mdio_sleep {
pinctrl-single,pins = <
0x23c (MUX_MODE15)
0x240 (MUX_MODE15)
>;
};
};
&mac {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&cpsw_default>;
pinctrl-1 = <&cpsw_sleep>;
};
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <3>;
phy-mode = "rgmii";
};
&davinci_mdio {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
active_slave = <1>;
};
&dcan1 {
status = "ok";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&dcan1_pins_default>;
pinctrl-1 = <&dcan1_pins_sleep>;
};

22
arch/arm/boot/dts/dra74x.dtsi
View file

@ -44,4 +44,26 @@
interrupts = <GIC_SPI DIRECT_IRQ(131) IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI DIRECT_IRQ(132) IRQ_TYPE_LEVEL_HIGH>;
};
ocp {
omap_dwc3_4: omap_dwc3_4@48940000 {
compatible = "ti,dwc3";
ti,hwmods = "usb_otg_ss4";
reg = <0x48940000 0x10000>;
interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <1>;
utmi-mode = <2>;
ranges;
status = "disabled";
usb4: usb@48950000 {
compatible = "snps,dwc3";
reg = <0x48950000 0x17000>;
interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
tx-fifo-resize;
maximum-speed = "high-speed";
dr_mode = "otg";
};
};
};
};

579
arch/arm/boot/dts/exynos3250-monk.dts Normal file
View file

@ -0,0 +1,579 @@
/*
* Samsung's Exynos3250 based Monk board device tree source
*
* Copyright (c) 2014 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* Device tree source file for Samsung's Monk board which is based on
* Samsung Exynos3250 SoC.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include "exynos3250.dtsi"
#include <dt-bindings/input/input.h>
/ {
model = "Samsung Monk board";
compatible = "samsung,monk", "samsung,exynos3250", "samsung,exynos3";
aliases {
i2c7 = &i2c_max77836;
};
memory {
reg = <0x40000000 0x1ff00000>;
};
firmware@0205F000 {
compatible = "samsung,secure-firmware";
reg = <0x0205F000 0x1000>;
};
gpio_keys {
compatible = "gpio-keys";
power_key {
interrupt-parent = <&gpx2>;
interrupts = <7 0>;
gpios = <&gpx2 7 1>;
linux,code = <KEY_POWER>;
label = "power key";
debounce-interval = <10>;
gpio-key,wakeup;
};
};
vemmc_reg: voltage-regulator-0 {
compatible = "regulator-fixed";
regulator-name = "V_EMMC_2.8V-fixed";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
gpio = <&gpk0 2 0>;
enable-active-high;
};
i2c_max77836: i2c-gpio-0 {
compatible = "i2c-gpio";
gpios = <&gpd0 2 0>, <&gpd0 3 0>;
#address-cells = <1>;
#size-cells = <0>;
max77836: subpmic@25 {
compatible = "maxim,max77836";
interrupt-parent = <&gpx1>;
interrupts = <5 0>;
reg = <0x25>;
wakeup;
muic: max77836-muic {
compatible = "maxim,max77836-muic";
};
regulators {
compatible = "maxim,max77836-regulator";
safeout_reg: SAFEOUT {
regulator-name = "SAFEOUT";
};
charger_reg: CHARGER {
regulator-name = "CHARGER";
regulator-min-microamp = <45000>;
regulator-max-microamp = <475000>;
regulator-boot-on;
};
motor_reg: LDO1 {
regulator-name = "MOT_2.7V";
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <2700000>;
};
LDO2 {
regulator-name = "UNUSED_LDO2";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <3950000>;
};
};
charger {
compatible = "maxim,max77836-charger";
maxim,constant-uvolt = <4350000>;
maxim,fast-charge-uamp = <225000>;
maxim,eoc-uamp = <7500>;
maxim,ovp-uvolt = <6500000>;
};
};
};
};
&adc {
vdd-supply = <&ldo3_reg>;
status = "okay";
assigned-clocks = <&cmu CLK_SCLK_TSADC>;
assigned-clock-rates = <6000000>;
thermistor-ap {
compatible = "ntc,ncp15wb473";
pullup-uv = <1800000>;
pullup-ohm = <100000>;
pulldown-ohm = <100000>;
io-channels = <&adc 0>;
};
thermistor-battery {
compatible = "ntc,ncp15wb473";
pullup-uv = <1800000>;
pullup-ohm = <100000>;
pulldown-ohm = <100000>;
io-channels = <&adc 1>;
};
};
&i2c_0 {
#address-cells = <1>;
#size-cells = <0>;
samsung,i2c-sda-delay = <100>;
samsung,i2c-slave-addr = <0x10>;
samsung,i2c-max-bus-freq = <100000>;
status = "okay";
s2mps14_pmic@66 {
compatible = "samsung,s2mps14-pmic";
interrupt-parent = <&gpx0>;
interrupts = <7 0>;
reg = <0x66>;
wakeup;
s2mps14_osc: clocks {
compatible = "samsung,s2mps14-clk";
#clock-cells = <1>;
clock-output-names = "s2mps14_ap", "unused",
"s2mps14_bt";
};
regulators {
ldo1_reg: LDO1 {
regulator-name = "VAP_ALIVE_1.0V";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
};
ldo2_reg: LDO2 {
regulator-name = "VAP_M1_1.2V";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
};
ldo3_reg: LDO3 {
regulator-name = "VCC_AP_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
ldo4_reg: LDO4 {
regulator-name = "VAP_AVDD_PLL1";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
ldo5_reg: LDO5 {
regulator-name = "VAP_PLL_ISO_1.0V";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
};
ldo6_reg: LDO6 {
regulator-name = "VAP_MIPI_1.0V";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
};
ldo7_reg: LDO7 {
regulator-name = "VAP_AVDD_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
ldo8_reg: LDO8 {
regulator-name = "VAP_USB_3.0V";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-always-on;
};
ldo9_reg: LDO9 {
regulator-name = "V_LPDDR_1.2V";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
};
ldo10_reg: LDO10 {
regulator-name = "UNUSED_LDO10";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
};
ldo11_reg: LDO11 {
regulator-name = "V_EMMC_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
samsung,ext-control-gpios = <&gpk0 2 0>;
};
ldo12_reg: LDO12 {
regulator-name = "V_EMMC_2.8V";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
samsung,ext-control-gpios = <&gpk0 2 0>;
};
ldo13_reg: LDO13 {
regulator-name = "VSENSOR_2.85V";
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <2850000>;
regulator-always-on;
};
ldo14_reg: LDO14 {
regulator-name = "UNUSED_LDO14";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
ldo15_reg: LDO15 {
regulator-name = "TSP_AVDD_3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
ldo16_reg: LDO16 {
regulator-name = "LCD_VDD_3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
ldo17_reg: LDO17 {
regulator-name = "UNUSED_LDO17";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
ldo18_reg: LDO18 {
regulator-name = "UNUSED_LDO18";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
ldo19_reg: LDO19 {
regulator-name = "TSP_VDD_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
ldo20_reg: LDO20 {
regulator-name = "LCD_VDD_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
ldo21_reg: LDO21 {
regulator-name = "UNUSED_LDO21";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
};
ldo22_reg: LDO22 {
regulator-name = "UNUSED_LDO22";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
};
ldo23_reg: LDO23 {
regulator-name = "UNUSED_LDO23";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
};
ldo24_reg: LDO24 {
regulator-name = "UNUSED_LDO24";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
ldo25_reg: LDO25 {
regulator-name = "UNUSED_LDO25";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
buck1_reg: BUCK1 {
regulator-name = "VAP_MIF_1.0V";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <900000>;
regulator-always-on;
};
buck2_reg: BUCK2 {
regulator-name = "VAP_ARM_1.0V";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1150000>;
regulator-always-on;
};
buck3_reg: BUCK3 {
regulator-name = "VAP_INT3D_1.0V";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
};
buck4_reg: BUCK4 {
regulator-name = "VCC_SUB_1.95V";
regulator-min-microvolt = <1950000>;
regulator-max-microvolt = <1950000>;
regulator-always-on;
};
buck5_reg: BUCK5 {
regulator-name = "VCC_SUB_1.35V";
regulator-min-microvolt = <1350000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
};
};
};
};
&i2c_1 {
#address-cells = <1>;
#size-cells = <0>;
samsung,i2c-sda-delay = <100>;
samsung,i2c-slave-addr = <0x10>;
samsung,i2c-max-bus-freq = <400000>;
status = "okay";
fuelgauge@36 {
compatible = "maxim,max77836-battery";
interrupt-parent = <&gpx1>;
interrupts = <2 8>;
reg = <0x36>;
};
};
&i2s2 {
status = "okay";
};
&mshc_0 {
#address-cells = <1>;
#size-cells = <0>;
num-slots = <1>;
broken-cd;
non-removable;
cap-mmc-highspeed;
desc-num = <4>;
mmc-hs200-1_8v;
card-detect-delay = <200>;
vmmc-supply = <&vemmc_reg>;
clock-frequency = <100000000>;
clock-freq-min-max = <400000 100000000>;
samsung,dw-mshc-ciu-div = <1>;
samsung,dw-mshc-sdr-timing = <0 1>;
samsung,dw-mshc-ddr-timing = <1 2>;
pinctrl-names = "default";
pinctrl-0 = <&sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8>;
bus-width = <8>;
status = "okay";
};
&serial_0 {
assigned-clocks = <&cmu CLK_SCLK_UART0>;
assigned-clock-rates = <100000000>;
status = "okay";
};
&serial_1 {
status = "okay";
};
&tmu {
vtmu-supply = <&ldo7_reg>;
status = "okay";
};
&rtc {
clocks = <&cmu CLK_RTC>, <&s2mps14_osc 0>;
clock-names = "rtc", "rtc_src";
status = "okay";
};
&xusbxti {
clock-frequency = <24000000>;
};
&pinctrl_0 {
pinctrl-names = "default";
pinctrl-0 = <&sleep0>;
sleep0: sleep-state {
PIN_SLP(gpa0-0, INPUT, DOWN);
PIN_SLP(gpa0-1, INPUT, DOWN);
PIN_SLP(gpa0-2, INPUT, DOWN);
PIN_SLP(gpa0-3, INPUT, DOWN);
PIN_SLP(gpa0-4, INPUT, DOWN);
PIN_SLP(gpa0-5, INPUT, DOWN);
PIN_SLP(gpa0-6, INPUT, DOWN);
PIN_SLP(gpa0-7, INPUT, DOWN);
PIN_SLP(gpa1-0, INPUT, DOWN);
PIN_SLP(gpa1-1, INPUT, DOWN);
PIN_SLP(gpa1-2, INPUT, DOWN);
PIN_SLP(gpa1-3, INPUT, DOWN);
PIN_SLP(gpa1-4, INPUT, DOWN);
PIN_SLP(gpa1-5, INPUT, DOWN);
PIN_SLP(gpb-0, PREV, NONE);
PIN_SLP(gpb-1, PREV, NONE);
PIN_SLP(gpb-2, PREV, NONE);
PIN_SLP(gpb-3, PREV, NONE);
PIN_SLP(gpb-4, INPUT, DOWN);
PIN_SLP(gpb-5, INPUT, DOWN);
PIN_SLP(gpb-6, INPUT, DOWN);
PIN_SLP(gpb-7, INPUT, DOWN);
PIN_SLP(gpc0-0, INPUT, DOWN);
PIN_SLP(gpc0-1, INPUT, DOWN);
PIN_SLP(gpc0-2, INPUT, DOWN);
PIN_SLP(gpc0-3, INPUT, DOWN);
PIN_SLP(gpc0-4, INPUT, DOWN);
PIN_SLP(gpc1-0, INPUT, DOWN);
PIN_SLP(gpc1-1, INPUT, DOWN);
PIN_SLP(gpc1-2, INPUT, DOWN);
PIN_SLP(gpc1-3, INPUT, DOWN);
PIN_SLP(gpc1-4, INPUT, DOWN);
PIN_SLP(gpd0-0, INPUT, DOWN);
PIN_SLP(gpd0-1, INPUT, DOWN);
PIN_SLP(gpd0-2, INPUT, NONE);
PIN_SLP(gpd0-3, INPUT, NONE);
PIN_SLP(gpd1-0, INPUT, NONE);
PIN_SLP(gpd1-1, INPUT, NONE);
PIN_SLP(gpd1-2, INPUT, NONE);
PIN_SLP(gpd1-3, INPUT, NONE);
};
};
&pinctrl_1 {
pinctrl-names = "default";
pinctrl-0 = <&sleep1>;
sleep1: sleep-state {
PIN_SLP(gpe0-0, PREV, NONE);
PIN_SLP(gpe0-1, PREV, NONE);
PIN_SLP(gpe0-2, INPUT, DOWN);
PIN_SLP(gpe0-3, INPUT, DOWN);
PIN_SLP(gpe0-4, PREV, NONE);
PIN_SLP(gpe0-5, INPUT, DOWN);
PIN_SLP(gpe0-6, INPUT, DOWN);
PIN_SLP(gpe0-7, INPUT, DOWN);
PIN_SLP(gpe1-0, INPUT, DOWN);
PIN_SLP(gpe1-1, PREV, NONE);
PIN_SLP(gpe1-2, INPUT, DOWN);
PIN_SLP(gpe1-3, INPUT, DOWN);
PIN_SLP(gpe1-4, INPUT, DOWN);
PIN_SLP(gpe1-5, INPUT, DOWN);
PIN_SLP(gpe1-6, INPUT, DOWN);
PIN_SLP(gpe1-7, INPUT, NONE);
PIN_SLP(gpe2-0, INPUT, NONE);
PIN_SLP(gpe2-1, INPUT, NONE);
PIN_SLP(gpe2-2, INPUT, NONE);
PIN_SLP(gpk0-0, INPUT, DOWN);
PIN_SLP(gpk0-1, INPUT, DOWN);
PIN_SLP(gpk0-2, OUT0, NONE);
PIN_SLP(gpk0-3, INPUT, DOWN);
PIN_SLP(gpk0-4, INPUT, DOWN);
PIN_SLP(gpk0-5, INPUT, DOWN);
PIN_SLP(gpk0-6, INPUT, DOWN);
PIN_SLP(gpk0-7, INPUT, DOWN);
PIN_SLP(gpk1-0, PREV, NONE);
PIN_SLP(gpk1-1, PREV, NONE);
PIN_SLP(gpk1-2, INPUT, DOWN);
PIN_SLP(gpk1-3, PREV, NONE);
PIN_SLP(gpk1-4, PREV, NONE);
PIN_SLP(gpk1-5, PREV, NONE);
PIN_SLP(gpk1-6, PREV, NONE);
PIN_SLP(gpk2-0, INPUT, DOWN);
PIN_SLP(gpk2-1, INPUT, DOWN);
PIN_SLP(gpk2-2, INPUT, DOWN);
PIN_SLP(gpk2-3, INPUT, DOWN);
PIN_SLP(gpk2-4, INPUT, DOWN);
PIN_SLP(gpk2-5, INPUT, DOWN);
PIN_SLP(gpk2-6, INPUT, DOWN);
PIN_SLP(gpl0-0, INPUT, DOWN);
PIN_SLP(gpl0-1, INPUT, DOWN);
PIN_SLP(gpl0-2, INPUT, DOWN);
PIN_SLP(gpl0-3, INPUT, DOWN);
PIN_SLP(gpm0-0, INPUT, DOWN);
PIN_SLP(gpm0-1, INPUT, DOWN);
PIN_SLP(gpm0-2, INPUT, DOWN);
PIN_SLP(gpm0-3, INPUT, DOWN);
PIN_SLP(gpm0-4, INPUT, DOWN);
PIN_SLP(gpm0-5, INPUT, DOWN);
PIN_SLP(gpm0-6, INPUT, DOWN);
PIN_SLP(gpm0-7, INPUT, DOWN);
PIN_SLP(gpm1-0, INPUT, DOWN);
PIN_SLP(gpm1-1, INPUT, DOWN);
PIN_SLP(gpm1-2, INPUT, DOWN);
PIN_SLP(gpm1-3, INPUT, DOWN);
PIN_SLP(gpm1-4, INPUT, DOWN);
PIN_SLP(gpm1-5, INPUT, DOWN);
PIN_SLP(gpm1-6, INPUT, DOWN);
PIN_SLP(gpm2-0, INPUT, DOWN);
PIN_SLP(gpm2-1, INPUT, DOWN);
PIN_SLP(gpm2-2, INPUT, DOWN);
PIN_SLP(gpm2-3, INPUT, DOWN);
PIN_SLP(gpm2-4, INPUT, DOWN);
PIN_SLP(gpm3-0, INPUT, DOWN);
PIN_SLP(gpm3-1, INPUT, DOWN);
PIN_SLP(gpm3-2, INPUT, DOWN);
PIN_SLP(gpm3-3, INPUT, DOWN);
PIN_SLP(gpm3-4, INPUT, DOWN);
PIN_SLP(gpm3-5, INPUT, DOWN);
PIN_SLP(gpm3-6, INPUT, DOWN);
PIN_SLP(gpm3-7, INPUT, DOWN);
PIN_SLP(gpm4-0, INPUT, DOWN);
PIN_SLP(gpm4-1, INPUT, DOWN);
PIN_SLP(gpm4-2, INPUT, DOWN);
PIN_SLP(gpm4-3, INPUT, DOWN);
PIN_SLP(gpm4-4, INPUT, DOWN);
PIN_SLP(gpm4-5, INPUT, DOWN);
PIN_SLP(gpm4-6, INPUT, DOWN);
PIN_SLP(gpm4-7, INPUT, DOWN);
};
};

16
arch/arm/boot/dts/exynos3250-pinctrl.dtsi
View file

@ -12,6 +12,22 @@
* published by the Free Software Foundation.
*/
#define PIN_PULL_NONE 0
#define PIN_PULL_DOWN 1
#define PIN_PULL_UP 3
#define PIN_PDN_OUT0 0
#define PIN_PDN_OUT1 1
#define PIN_PDN_INPUT 2
#define PIN_PDN_PREV 3
#define PIN_SLP(_pin, _mode, _pull) \
_pin { \
samsung,pins = #_pin; \
samsung,pin-con-pdn = <PIN_PDN_ ##_mode>; \
samsung,pin-pud-pdn = <PIN_PULL_ ##_pull>; \
}
&pinctrl_0 {
gpa0: gpa0 {
gpio-controller;

682
arch/arm/boot/dts/exynos3250-rinato.dts Normal file
View file

@ -0,0 +1,682 @@
/*
* Samsung's Exynos3250 based Rinato board device tree source
*
* Copyright (c) 2014 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* Device tree source file for Samsung's Rinato board which is based on
* Samsung Exynos3250 SoC.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include "exynos3250.dtsi"
#include <dt-bindings/input/input.h>
/ {
model = "Samsung Rinato board";
compatible = "samsung,rinato", "samsung,exynos3250", "samsung,exynos3";
aliases {
i2c7 = &i2c_max77836;
};
memory {
reg = <0x40000000 0x1ff00000>;
};
firmware@0205F000 {
compatible = "samsung,secure-firmware";
reg = <0x0205F000 0x1000>;
};
gpio_keys {
compatible = "gpio-keys";
power_key {
interrupt-parent = <&gpx2>;
interrupts = <7 0>;
gpios = <&gpx2 7 1>;
linux,code = <KEY_POWER>;
label = "power key";
debounce-interval = <10>;
gpio-key,wakeup;
};
};
i2c_max77836: i2c-gpio-0 {
compatible = "i2c-gpio";
gpios = <&gpd0 2 0>, <&gpd0 3 0>;
#address-cells = <1>;
#size-cells = <0>;
max77836: subpmic@25 {
compatible = "maxim,max77836";
interrupt-parent = <&gpx1>;
interrupts = <5 0>;
reg = <0x25>;
wakeup;
muic: max77836-muic {
compatible = "maxim,max77836-muic";
};
regulators {
compatible = "maxim,max77836-regulator";
safeout_reg: SAFEOUT {
regulator-name = "SAFEOUT";
};
charger_reg: CHARGER {
regulator-name = "CHARGER";
regulator-min-microamp = <45000>;
regulator-max-microamp = <475000>;
regulator-boot-on;
};
motor_reg: LDO1 {
regulator-name = "MOT_2.7V";
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <2700000>;
};
LDO2 {
regulator-name = "UNUSED_LDO2";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <3950000>;
};
};
charger {
compatible = "maxim,max77836-charger";
maxim,constant-uvolt = <4350000>;
maxim,fast-charge-uamp = <225000>;
maxim,eoc-uamp = <7500>;
maxim,ovp-uvolt = <6500000>;
};
};
};
};
&adc {
vdd-supply = <&ldo3_reg>;
status = "okay";
assigned-clocks = <&cmu CLK_SCLK_TSADC>;
assigned-clock-rates = <6000000>;
thermistor-ap {
compatible = "ntc,ncp15wb473";
pullup-uv = <1800000>;
pullup-ohm = <100000>;
pulldown-ohm = <100000>;
io-channels = <&adc 0>;
};
thermistor-battery {
compatible = "ntc,ncp15wb473";
pullup-uv = <1800000>;
pullup-ohm = <100000>;
pulldown-ohm = <100000>;
io-channels = <&adc 1>;
};
};
&i2c_0 {
#address-cells = <1>;
#size-cells = <0>;
samsung,i2c-sda-delay = <100>;
samsung,i2c-slave-addr = <0x10>;
samsung,i2c-max-bus-freq = <100000>;
status = "okay";
s2mps14_pmic@66 {
compatible = "samsung,s2mps14-pmic";
interrupt-parent = <&gpx0>;
interrupts = <7 0>;
reg = <0x66>;
wakeup;
s2mps14_osc: clocks {
compatible = "samsung,s2mps14-clk";
#clock-cells = <1>;
clock-output-names = "s2mps14_ap", "unused",
"s2mps14_bt";
};
regulators {
ldo1_reg: LDO1 {
regulator-name = "VAP_ALIVE_1.0V";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
regulator-state-mem {
regulator-on-in-suspend;
};
};
ldo2_reg: LDO2 {
regulator-name = "VAP_M1_1.2V";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo3_reg: LDO3 {
regulator-name = "VCC_AP_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo4_reg: LDO4 {
regulator-name = "VAP_AVDD_PLL1";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo5_reg: LDO5 {
regulator-name = "VAP_PLL_ISO_1.0V";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo6_reg: LDO6 {
regulator-name = "VAP_VMIPI_1.0V";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo7_reg: LDO7 {
regulator-name = "VAP_AVDD_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo8_reg: LDO8 {
regulator-name = "VAP_USB_3.0V";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-always-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo9_reg: LDO9 {
regulator-name = "V_LPDDR_1.2V";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
regulator-state-mem {
regulator-on-in-suspend;
};
};
ldo10_reg: LDO10 {
regulator-name = "UNUSED_LDO10";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo11_reg: LDO11 {
regulator-name = "V_EMMC_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
samsung,ext-control-gpios = <&gpk0 2 0>;
};
ldo12_reg: LDO12 {
regulator-name = "V_EMMC_2.8V";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
samsung,ext-control-gpios = <&gpk0 2 0>;
};
ldo13_reg: LDO13 {
regulator-name = "CAM_AVDD_2.8V";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo14_reg: LDO14 {
regulator-name = "UNUSED_LDO14";
regulator-min-microvolt = <2700000>;
regulator-max-microvolt = <2700000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo15_reg: LDO15 {
regulator-name = "TSP_AVDD_3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo16_reg: LDO16 {
regulator-name = "LCD_VDD_3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo17_reg: LDO17 {
regulator-name = "V_IRLED_3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo18_reg: LDO18 {
regulator-name = "CAM_AF_2.8V";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo19_reg: LDO19 {
regulator-name = "TSP_VDD_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo20_reg: LDO20 {
regulator-name = "LCD_VDD_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo21_reg: LDO21 {
regulator-name = "CAM_IO_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo22_reg: LDO22 {
regulator-name = "CAM_DVDD_1.2V";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo23_reg: LDO23 {
regulator-name = "HRM_VCC_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
ldo24_reg: LDO24 {
regulator-name = "HRM_VCC_3.3V";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
ldo25_reg: LDO25 {
regulator-name = "UNUSED_LDO25";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
buck1_reg: BUCK1 {
regulator-name = "VAP_MIF_1.0V";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <900000>;
regulator-always-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
buck2_reg: BUCK2 {
regulator-name = "VAP_ARM_1.0V";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1150000>;
regulator-always-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
buck3_reg: BUCK3 {
regulator-name = "VAP_INT3D_1.0V";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
buck4_reg: BUCK4 {
regulator-name = "VCC_SUB_1.95V";
regulator-min-microvolt = <1950000>;
regulator-max-microvolt = <1950000>;
regulator-always-on;
regulator-state-mem {
regulator-on-in-suspend;
};
};
buck5_reg: BUCK5 {
regulator-name = "VCC_SUB_1.35V";
regulator-min-microvolt = <1350000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
regulator-state-mem {
regulator-on-in-suspend;
};
};
};
};
};
&i2c_1 {
#address-cells = <1>;
#size-cells = <0>;
samsung,i2c-sda-delay = <100>;
samsung,i2c-slave-addr = <0x10>;
samsung,i2c-max-bus-freq = <400000>;
status = "okay";
fuelgauge@36 {
compatible = "maxim,max77836-battery";
interrupt-parent = <&gpx1>;
interrupts = <2 8>;
reg = <0x36>;
};
};
&i2s2 {
status = "okay";
};
&mfc {
status = "okay";
};
&mshc_0 {
#address-cells = <1>;
#size-cells = <0>;
num-slots = <1>;
broken-cd;
non-removable;
cap-mmc-highspeed;
desc-num = <4>;
mmc-hs200-1_8v;
card-detect-delay = <200>;
vmmc-supply = <&ldo12_reg>;
clock-frequency = <100000000>;
clock-freq-min-max = <400000 100000000>;
samsung,dw-mshc-ciu-div = <1>;
samsung,dw-mshc-sdr-timing = <0 1>;
samsung,dw-mshc-ddr-timing = <1 2>;
pinctrl-names = "default";
pinctrl-0 = <&sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8>;
bus-width = <8>;
status = "okay";
};
&serial_0 {
assigned-clocks = <&cmu CLK_SCLK_UART0>;
assigned-clock-rates = <100000000>;
status = "okay";
};
&serial_1 {
status = "okay";
};
&tmu {
vtmu-supply = <&ldo7_reg>;
status = "okay";
};
&rtc {
clocks = <&cmu CLK_RTC>, <&s2mps14_osc 0>;
clock-names = "rtc", "rtc_src";
status = "okay";
};
&xusbxti {
clock-frequency = <24000000>;
};
&pinctrl_0 {
pinctrl-names = "default";
pinctrl-0 = <&sleep0>;
sleep0: sleep-state {
PIN_SLP(gpa0-0, INPUT, DOWN);
PIN_SLP(gpa0-1, INPUT, DOWN);
PIN_SLP(gpa0-2, INPUT, DOWN);
PIN_SLP(gpa0-3, INPUT, DOWN);
PIN_SLP(gpa0-4, INPUT, DOWN);
PIN_SLP(gpa0-5, INPUT, DOWN);
PIN_SLP(gpa0-6, INPUT, DOWN);
PIN_SLP(gpa0-7, INPUT, DOWN);
PIN_SLP(gpa1-0, INPUT, DOWN);
PIN_SLP(gpa1-1, INPUT, DOWN);
PIN_SLP(gpa1-2, INPUT, DOWN);
PIN_SLP(gpa1-3, INPUT, DOWN);
PIN_SLP(gpa1-4, INPUT, DOWN);
PIN_SLP(gpa1-5, INPUT, DOWN);
PIN_SLP(gpb-0, PREV, NONE);
PIN_SLP(gpb-1, PREV, NONE);
PIN_SLP(gpb-2, PREV, NONE);
PIN_SLP(gpb-3, PREV, NONE);
PIN_SLP(gpb-4, INPUT, DOWN);
PIN_SLP(gpb-5, INPUT, DOWN);
PIN_SLP(gpb-6, INPUT, DOWN);
PIN_SLP(gpb-7, INPUT, DOWN);
PIN_SLP(gpc0-0, INPUT, DOWN);
PIN_SLP(gpc0-1, INPUT, DOWN);
PIN_SLP(gpc0-2, INPUT, DOWN);
PIN_SLP(gpc0-3, INPUT, DOWN);
PIN_SLP(gpc0-4, INPUT, DOWN);
PIN_SLP(gpc1-0, INPUT, DOWN);
PIN_SLP(gpc1-1, INPUT, DOWN);
PIN_SLP(gpc1-2, INPUT, DOWN);
PIN_SLP(gpc1-3, INPUT, DOWN);
PIN_SLP(gpc1-4, INPUT, DOWN);
PIN_SLP(gpd0-0, INPUT, DOWN);
PIN_SLP(gpd0-1, INPUT, DOWN);
PIN_SLP(gpd0-2, INPUT, NONE);
PIN_SLP(gpd0-3, INPUT, NONE);
PIN_SLP(gpd1-0, INPUT, NONE);
PIN_SLP(gpd1-1, INPUT, NONE);
PIN_SLP(gpd1-2, INPUT, NONE);
PIN_SLP(gpd1-3, INPUT, NONE);
};
};
&pinctrl_1 {
pinctrl-names = "default";
pinctrl-0 = <&sleep1>;
sleep1: sleep-state {
PIN_SLP(gpe0-0, PREV, NONE);
PIN_SLP(gpe0-1, PREV, NONE);
PIN_SLP(gpe0-2, INPUT, DOWN);
PIN_SLP(gpe0-3, INPUT, UP);
PIN_SLP(gpe0-4, INPUT, DOWN);
PIN_SLP(gpe0-5, INPUT, DOWN);
PIN_SLP(gpe0-6, INPUT, DOWN);
PIN_SLP(gpe0-7, INPUT, DOWN);
PIN_SLP(gpe1-0, INPUT, DOWN);
PIN_SLP(gpe1-1, PREV, NONE);
PIN_SLP(gpe1-2, INPUT, DOWN);
PIN_SLP(gpe1-3, INPUT, DOWN);
PIN_SLP(gpe1-4, INPUT, DOWN);
PIN_SLP(gpe1-5, INPUT, DOWN);
PIN_SLP(gpe1-6, INPUT, DOWN);
PIN_SLP(gpe1-7, INPUT, NONE);
PIN_SLP(gpe2-0, INPUT, NONE);
PIN_SLP(gpe2-1, INPUT, NONE);
PIN_SLP(gpe2-2, INPUT, NONE);
PIN_SLP(gpk0-0, INPUT, DOWN);
PIN_SLP(gpk0-1, INPUT, DOWN);
PIN_SLP(gpk0-2, OUT0, NONE);
PIN_SLP(gpk0-3, INPUT, DOWN);
PIN_SLP(gpk0-4, INPUT, DOWN);
PIN_SLP(gpk0-5, INPUT, DOWN);
PIN_SLP(gpk0-6, INPUT, DOWN);
PIN_SLP(gpk0-7, INPUT, DOWN);
PIN_SLP(gpk1-0, INPUT, DOWN);
PIN_SLP(gpk1-1, INPUT, DOWN);
PIN_SLP(gpk1-2, INPUT, DOWN);
PIN_SLP(gpk1-3, INPUT, DOWN);
PIN_SLP(gpk1-4, INPUT, DOWN);
PIN_SLP(gpk1-5, INPUT, DOWN);
PIN_SLP(gpk1-6, INPUT, DOWN);
PIN_SLP(gpk2-0, INPUT, DOWN);
PIN_SLP(gpk2-1, INPUT, DOWN);
PIN_SLP(gpk2-2, INPUT, DOWN);
PIN_SLP(gpk2-3, INPUT, DOWN);
PIN_SLP(gpk2-4, INPUT, DOWN);
PIN_SLP(gpk2-5, INPUT, DOWN);
PIN_SLP(gpk2-6, INPUT, DOWN);
PIN_SLP(gpl0-0, INPUT, DOWN);
PIN_SLP(gpl0-1, INPUT, DOWN);
PIN_SLP(gpl0-2, INPUT, DOWN);
PIN_SLP(gpl0-3, INPUT, DOWN);
PIN_SLP(gpm0-0, INPUT, DOWN);
PIN_SLP(gpm0-1, INPUT, DOWN);
PIN_SLP(gpm0-2, INPUT, DOWN);
PIN_SLP(gpm0-3, INPUT, DOWN);
PIN_SLP(gpm0-4, INPUT, DOWN);
PIN_SLP(gpm0-5, INPUT, DOWN);
PIN_SLP(gpm0-6, INPUT, DOWN);
PIN_SLP(gpm0-7, INPUT, DOWN);
PIN_SLP(gpm1-0, INPUT, DOWN);
PIN_SLP(gpm1-1, INPUT, DOWN);
PIN_SLP(gpm1-2, INPUT, DOWN);
PIN_SLP(gpm1-3, INPUT, DOWN);
PIN_SLP(gpm1-4, INPUT, DOWN);
PIN_SLP(gpm1-5, INPUT, DOWN);
PIN_SLP(gpm1-6, INPUT, DOWN);
PIN_SLP(gpm2-0, INPUT, DOWN);
PIN_SLP(gpm2-1, INPUT, DOWN);
PIN_SLP(gpm2-2, INPUT, DOWN);
PIN_SLP(gpm2-3, INPUT, DOWN);
PIN_SLP(gpm2-4, INPUT, DOWN);
PIN_SLP(gpm3-0, INPUT, DOWN);
PIN_SLP(gpm3-1, INPUT, DOWN);
PIN_SLP(gpm3-2, INPUT, DOWN);
PIN_SLP(gpm3-3, INPUT, DOWN);
PIN_SLP(gpm3-4, INPUT, DOWN);
PIN_SLP(gpm3-5, INPUT, DOWN);
PIN_SLP(gpm3-6, INPUT, DOWN);
PIN_SLP(gpm3-7, INPUT, DOWN);
PIN_SLP(gpm4-0, INPUT, DOWN);
PIN_SLP(gpm4-1, INPUT, DOWN);
PIN_SLP(gpm4-2, INPUT, DOWN);
PIN_SLP(gpm4-3, INPUT, DOWN);
PIN_SLP(gpm4-4, INPUT, DOWN);
PIN_SLP(gpm4-5, INPUT, DOWN);
PIN_SLP(gpm4-6, INPUT, DOWN);
PIN_SLP(gpm4-7, INPUT, DOWN);
};
};

10
arch/arm/boot/dts/exynos3250.dtsi
View file

@ -320,6 +320,16 @@
status = "disabled";
};
mfc: codec@13400000 {
compatible = "samsung,mfc-v7";
reg = <0x13400000 0x10000>;
interrupts = <0 102 0>;
clock-names = "mfc", "sclk_mfc";
clocks = <&cmu CLK_MFC>, <&cmu CLK_SCLK_MFC>;
samsung,power-domain = <&pd_mfc>;
status = "disabled";
};
serial_0: serial@13800000 {
compatible = "samsung,exynos4210-uart";
reg = <0x13800000 0x100>;

4
arch/arm/boot/dts/exynos4.dtsi
View file

@ -392,8 +392,8 @@
reg = <0x13400000 0x10000>;
interrupts = <0 94 0>;
samsung,power-domain = <&pd_mfc>;
clocks = <&clock CLK_MFC>;
clock-names = "mfc";
clocks = <&clock CLK_MFC>, <&clock CLK_SCLK_MFC>;
clock-names = "mfc", "sclk_mfc";
status = "disabled";
};

16
arch/arm/boot/dts/exynos4210-trats.dts
View file

@ -431,18 +431,34 @@
fimc_0: fimc@11800000 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC0>,
<&clock CLK_SCLK_FIMC0>;
assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
assigned-clock-rates = <0>, <160000000>;
};
fimc_1: fimc@11810000 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC1>,
<&clock CLK_SCLK_FIMC1>;
assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
assigned-clock-rates = <0>, <160000000>;
};
fimc_2: fimc@11820000 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC2>,
<&clock CLK_SCLK_FIMC2>;
assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
assigned-clock-rates = <0>, <160000000>;
};
fimc_3: fimc@11830000 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC3>,
<&clock CLK_SCLK_FIMC3>;
assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
assigned-clock-rates = <0>, <160000000>;
};
};
};

16
arch/arm/boot/dts/exynos4210-universal_c210.dts
View file

@ -473,18 +473,34 @@
fimc_0: fimc@11800000 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC0>,
<&clock CLK_SCLK_FIMC0>;
assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
assigned-clock-rates = <0>, <160000000>;
};
fimc_1: fimc@11810000 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC1>,
<&clock CLK_SCLK_FIMC1>;
assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
assigned-clock-rates = <0>, <160000000>;
};
fimc_2: fimc@11820000 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC2>,
<&clock CLK_SCLK_FIMC2>;
assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
assigned-clock-rates = <0>, <160000000>;
};
fimc_3: fimc@11830000 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC3>,
<&clock CLK_SCLK_FIMC3>;
assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
assigned-clock-rates = <0>, <160000000>;
};
};
};

17
arch/arm/boot/dts/exynos4210.dtsi
View file

@ -31,6 +31,23 @@
pinctrl2 = &pinctrl_2;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@900 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0x900>;
};
cpu@901 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0x901>;
};
};
pmu_system_controller: system-controller@10020000 {
clock-names = "clkout0", "clkout1", "clkout2", "clkout3",
"clkout4", "clkout8", "clkout9";

17
arch/arm/boot/dts/exynos4212.dtsi
View file

@ -22,6 +22,23 @@
/ {
compatible = "samsung,exynos4212", "samsung,exynos4";
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@A00 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0xA00>;
};
cpu@A01 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0xA01>;
};
};
combiner: interrupt-controller@10440000 {
samsung,combiner-nr = <18>;
};

26
arch/arm/boot/dts/exynos4412-odroid-common.dtsi
View file

@ -45,6 +45,16 @@
compatible = "samsung,odroidx2-audio";
samsung,i2s-controller = <&i2s0>;
samsung,audio-codec = <&max98090>;
assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
<&clock_audss EXYNOS_MOUT_I2S>,
<&clock_audss EXYNOS_DOUT_SRP>,
<&clock_audss EXYNOS_DOUT_AUD_BUS>;
assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
<&clock_audss EXYNOS_MOUT_AUDSS>;
assigned-clock-rates = <0>,
<0>,
<192000000>,
<19200000>;
};
mmc@12550000 {
@ -82,18 +92,34 @@
fimc_0: fimc@11800000 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC0>,
<&clock CLK_SCLK_FIMC0>;
assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
assigned-clock-rates = <0>, <176000000>;
};
fimc_1: fimc@11810000 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC1>,
<&clock CLK_SCLK_FIMC1>;
assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
assigned-clock-rates = <0>, <176000000>;
};
fimc_2: fimc@11820000 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC2>,
<&clock CLK_SCLK_FIMC2>;
assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
assigned-clock-rates = <0>, <176000000>;
};
fimc_3: fimc@11830000 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC3>,
<&clock CLK_SCLK_FIMC3>;
assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
assigned-clock-rates = <0>, <176000000>;
};
};

412
arch/arm/boot/dts/exynos4412-trats2.dts
View file

@ -14,6 +14,7 @@
/dts-v1/;
#include "exynos4412.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Samsung Trats 2 based on Exynos4412";
@ -22,6 +23,7 @@
aliases {
i2c9 = &i2c_ak8975;
i2c10 = &i2c_cm36651;
i2c11 = &i2c_max77693;
};
memory {
@ -399,8 +401,6 @@
regulator-name = "VMEM_VDD_2.8V";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-always-on;
regulator-mem-off;
};
ldo23_reg: ldo23 {
@ -503,8 +503,6 @@
regulator-name = "VMEM_VDDF_3.0V";
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <2850000>;
regulator-always-on;
regulator-mem-off;
};
buck9_reg: buck9 {
@ -518,6 +516,42 @@
};
};
i2c_max77693: i2c-gpio-1 {
compatible = "i2c-gpio";
gpios = <&gpm2 0 GPIO_ACTIVE_HIGH>, <&gpm2 1 GPIO_ACTIVE_HIGH>;
i2c-gpio,delay-us = <2>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
max77693@66 {
compatible = "maxim,max77693";
interrupt-parent = <&gpx1>;
interrupts = <5 2>;
reg = <0x66>;
regulators {
esafeout1_reg: ESAFEOUT1@1 {
regulator-name = "ESAFEOUT1";
};
esafeout2_reg: ESAFEOUT2@2 {
regulator-name = "ESAFEOUT2";
};
charger_reg: CHARGER@0 {
regulator-name = "CHARGER";
regulator-min-microamp = <60000>;
regulator-max-microamp = <2580000>;
};
};
max77693_haptic {
compatible = "maxim,max77693-haptic";
haptic-supply = <&ldo26_reg>;
pwms = <&pwm 0 38022 0>;
};
};
};
mmc@12550000 {
num-slots = <1>;
broken-cd;
@ -535,6 +569,16 @@
cap-mmc-highspeed;
};
sdhci@12530000 {
bus-width = <4>;
cd-gpios = <&gpx3 4 0>;
cd-inverted;
pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4>;
pinctrl-names = "default";
vmmc-supply = <&ldo21_reg>;
status = "okay";
};
serial@13800000 {
status = "okay";
};
@ -551,6 +595,11 @@
status = "okay";
};
tmu@100C0000 {
vtmu-supply = <&ldo10_reg>;
status = "okay";
};
i2c_ak8975: i2c-gpio-0 {
compatible = "i2c-gpio";
gpios = <&gpy2 4 0>, <&gpy2 5 0>;
@ -598,6 +647,13 @@
};
};
pwm: pwm@139D0000 {
pinctrl-0 = <&pwm0_out>;
pinctrl-names = "default";
samsung,pwm-outputs = <0>;
status = "okay";
};
dsi_0: dsi@11C80000 {
vddcore-supply = <&ldo8_reg>;
vddio-supply = <&ldo10_reg>;
@ -663,28 +719,51 @@
pinctrl-0 = <&cam_port_a_clk_active &cam_port_b_clk_active>;
pinctrl-names = "default";
status = "okay";
assigned-clocks = <&clock CLK_MOUT_CAM0>,
<&clock CLK_MOUT_CAM1>;
assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>,
<&clock CLK_MOUT_MPLL_USER_T>;
fimc_0: fimc@11800000 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC0>,
<&clock CLK_SCLK_FIMC0>;
assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
assigned-clock-rates = <0>, <176000000>;
};
fimc_1: fimc@11810000 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC1>,
<&clock CLK_SCLK_FIMC1>;
assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
assigned-clock-rates = <0>, <176000000>;
};
fimc_2: fimc@11820000 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC2>,
<&clock CLK_SCLK_FIMC2>;
assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
assigned-clock-rates = <0>, <176000000>;
};
fimc_3: fimc@11830000 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC3>,
<&clock CLK_SCLK_FIMC3>;
assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
assigned-clock-rates = <0>, <176000000>;
};
csis_0: csis@11880000 {
status = "okay";
vddcore-supply = <&ldo8_reg>;
vddio-supply = <&ldo10_reg>;
clock-frequency = <176000000>;
assigned-clocks = <&clock CLK_MOUT_CSIS0>,
<&clock CLK_SCLK_CSIS0>;
assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
assigned-clock-rates = <0>, <176000000>;
/* Camera C (3) MIPI CSI-2 (CSIS0) */
port@3 {
@ -698,10 +777,13 @@
};
csis_1: csis@11890000 {
status = "okay";
vddcore-supply = <&ldo8_reg>;
vddio-supply = <&ldo10_reg>;
clock-frequency = <160000000>;
status = "okay";
assigned-clocks = <&clock CLK_MOUT_CSIS1>,
<&clock CLK_SCLK_CSIS1>;
assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
assigned-clock-rates = <0>, <176000000>;
/* Camera D (4) MIPI CSI-2 (CSIS1) */
port@4 {
@ -782,3 +864,319 @@
io-channels = <&adc 2>; /* Battery temperature */
};
};
&pinctrl_0 {
pinctrl-names = "default";
pinctrl-0 = <&sleep0>;
sleep0: sleep-states {
PIN_SLP(gpa0-0, INPUT, NONE);
PIN_SLP(gpa0-1, OUT0, NONE);
PIN_SLP(gpa0-2, INPUT, NONE);
PIN_SLP(gpa0-3, INPUT, UP);
PIN_SLP(gpa0-4, INPUT, NONE);
PIN_SLP(gpa0-5, INPUT, DOWN);
PIN_SLP(gpa0-6, INPUT, DOWN);
PIN_SLP(gpa0-7, INPUT, UP);
PIN_SLP(gpa1-0, INPUT, DOWN);
PIN_SLP(gpa1-1, INPUT, DOWN);
PIN_SLP(gpa1-2, INPUT, DOWN);
PIN_SLP(gpa1-3, INPUT, DOWN);
PIN_SLP(gpa1-4, INPUT, DOWN);
PIN_SLP(gpa1-5, INPUT, DOWN);
PIN_SLP(gpb-0, INPUT, NONE);
PIN_SLP(gpb-1, INPUT, NONE);
PIN_SLP(gpb-2, INPUT, NONE);
PIN_SLP(gpb-3, INPUT, NONE);
PIN_SLP(gpb-4, INPUT, DOWN);
PIN_SLP(gpb-5, INPUT, UP);
PIN_SLP(gpb-6, INPUT, DOWN);
PIN_SLP(gpb-7, INPUT, DOWN);
PIN_SLP(gpc0-0, INPUT, DOWN);
PIN_SLP(gpc0-1, INPUT, DOWN);
PIN_SLP(gpc0-2, INPUT, DOWN);
PIN_SLP(gpc0-3, INPUT, DOWN);
PIN_SLP(gpc0-4, INPUT, DOWN);
PIN_SLP(gpc1-0, INPUT, NONE);
PIN_SLP(gpc1-1, PREV, NONE);
PIN_SLP(gpc1-2, INPUT, NONE);
PIN_SLP(gpc1-3, INPUT, NONE);
PIN_SLP(gpc1-4, INPUT, NONE);
PIN_SLP(gpd0-0, INPUT, DOWN);
PIN_SLP(gpd0-1, INPUT, DOWN);
PIN_SLP(gpd0-2, INPUT, NONE);
PIN_SLP(gpd0-3, INPUT, NONE);
PIN_SLP(gpd1-0, INPUT, DOWN);
PIN_SLP(gpd1-1, INPUT, DOWN);
PIN_SLP(gpd1-2, INPUT, NONE);
PIN_SLP(gpd1-3, INPUT, NONE);
PIN_SLP(gpf0-0, INPUT, NONE);
PIN_SLP(gpf0-1, INPUT, NONE);
PIN_SLP(gpf0-2, INPUT, DOWN);
PIN_SLP(gpf0-3, INPUT, DOWN);
PIN_SLP(gpf0-4, INPUT, NONE);
PIN_SLP(gpf0-5, INPUT, DOWN);
PIN_SLP(gpf0-6, INPUT, NONE);
PIN_SLP(gpf0-7, INPUT, DOWN);
PIN_SLP(gpf1-0, INPUT, DOWN);
PIN_SLP(gpf1-1, INPUT, DOWN);
PIN_SLP(gpf1-2, INPUT, DOWN);
PIN_SLP(gpf1-3, INPUT, DOWN);
PIN_SLP(gpf1-4, INPUT, NONE);
PIN_SLP(gpf1-5, INPUT, NONE);
PIN_SLP(gpf1-6, INPUT, DOWN);
PIN_SLP(gpf1-7, PREV, NONE);
PIN_SLP(gpf2-0, PREV, NONE);
PIN_SLP(gpf2-1, INPUT, DOWN);
PIN_SLP(gpf2-2, INPUT, DOWN);
PIN_SLP(gpf2-3, INPUT, DOWN);
PIN_SLP(gpf2-4, INPUT, DOWN);
PIN_SLP(gpf2-5, INPUT, DOWN);
PIN_SLP(gpf2-6, INPUT, NONE);
PIN_SLP(gpf2-7, INPUT, NONE);
PIN_SLP(gpf3-0, INPUT, NONE);
PIN_SLP(gpf3-1, PREV, NONE);
PIN_SLP(gpf3-2, PREV, NONE);
PIN_SLP(gpf3-3, PREV, NONE);
PIN_SLP(gpf3-4, OUT1, NONE);
PIN_SLP(gpf3-5, INPUT, DOWN);
PIN_SLP(gpj0-0, PREV, NONE);
PIN_SLP(gpj0-1, PREV, NONE);
PIN_SLP(gpj0-2, PREV, NONE);
PIN_SLP(gpj0-3, INPUT, DOWN);
PIN_SLP(gpj0-4, PREV, NONE);
PIN_SLP(gpj0-5, PREV, NONE);
PIN_SLP(gpj0-6, INPUT, DOWN);
PIN_SLP(gpj0-7, INPUT, DOWN);
PIN_SLP(gpj1-0, INPUT, DOWN);
PIN_SLP(gpj1-1, PREV, NONE);
PIN_SLP(gpj1-2, PREV, NONE);
PIN_SLP(gpj1-3, INPUT, DOWN);
PIN_SLP(gpj1-4, INPUT, DOWN);
};
};
&pinctrl_1 {
pinctrl-names = "default";
pinctrl-0 = <&sleep1>;
sleep1: sleep-states {
PIN_SLP(gpk0-0, PREV, NONE);
PIN_SLP(gpk0-1, PREV, NONE);
PIN_SLP(gpk0-2, OUT0, NONE);
PIN_SLP(gpk0-3, PREV, NONE);
PIN_SLP(gpk0-4, PREV, NONE);
PIN_SLP(gpk0-5, PREV, NONE);
PIN_SLP(gpk0-6, PREV, NONE);
PIN_SLP(gpk1-0, INPUT, DOWN);
PIN_SLP(gpk1-1, INPUT, DOWN);
PIN_SLP(gpk1-2, INPUT, DOWN);
PIN_SLP(gpk1-3, PREV, NONE);
PIN_SLP(gpk1-4, PREV, NONE);
PIN_SLP(gpk1-5, PREV, NONE);
PIN_SLP(gpk1-6, PREV, NONE);
PIN_SLP(gpk2-0, INPUT, DOWN);
PIN_SLP(gpk2-1, INPUT, DOWN);
PIN_SLP(gpk2-2, INPUT, DOWN);
PIN_SLP(gpk2-3, INPUT, DOWN);
PIN_SLP(gpk2-4, INPUT, DOWN);
PIN_SLP(gpk2-5, INPUT, DOWN);
PIN_SLP(gpk2-6, INPUT, DOWN);
PIN_SLP(gpk3-0, OUT0, NONE);
PIN_SLP(gpk3-1, INPUT, NONE);
PIN_SLP(gpk3-2, INPUT, DOWN);
PIN_SLP(gpk3-3, INPUT, NONE);
PIN_SLP(gpk3-4, INPUT, NONE);
PIN_SLP(gpk3-5, INPUT, NONE);
PIN_SLP(gpk3-6, INPUT, NONE);
PIN_SLP(gpl0-0, INPUT, DOWN);
PIN_SLP(gpl0-1, INPUT, DOWN);
PIN_SLP(gpl0-2, INPUT, DOWN);
PIN_SLP(gpl0-3, INPUT, DOWN);
PIN_SLP(gpl0-4, PREV, NONE);
PIN_SLP(gpl0-6, PREV, NONE);
PIN_SLP(gpl1-0, INPUT, DOWN);
PIN_SLP(gpl1-1, INPUT, DOWN);
PIN_SLP(gpl2-0, INPUT, DOWN);
PIN_SLP(gpl2-1, INPUT, DOWN);
PIN_SLP(gpl2-2, INPUT, DOWN);
PIN_SLP(gpl2-3, INPUT, DOWN);
PIN_SLP(gpl2-4, INPUT, DOWN);
PIN_SLP(gpl2-5, INPUT, DOWN);
PIN_SLP(gpl2-6, PREV, NONE);
PIN_SLP(gpl2-7, INPUT, DOWN);
PIN_SLP(gpm0-0, INPUT, DOWN);
PIN_SLP(gpm0-1, INPUT, DOWN);
PIN_SLP(gpm0-2, INPUT, DOWN);
PIN_SLP(gpm0-3, INPUT, DOWN);
PIN_SLP(gpm0-4, INPUT, DOWN);
PIN_SLP(gpm0-5, INPUT, DOWN);
PIN_SLP(gpm0-6, INPUT, DOWN);
PIN_SLP(gpm0-7, INPUT, DOWN);
PIN_SLP(gpm1-0, INPUT, DOWN);
PIN_SLP(gpm1-1, INPUT, DOWN);
PIN_SLP(gpm1-2, INPUT, NONE);
PIN_SLP(gpm1-3, INPUT, NONE);
PIN_SLP(gpm1-4, INPUT, NONE);
PIN_SLP(gpm1-5, INPUT, NONE);
PIN_SLP(gpm1-6, INPUT, DOWN);
PIN_SLP(gpm2-0, INPUT, NONE);
PIN_SLP(gpm2-1, INPUT, NONE);
PIN_SLP(gpm2-2, INPUT, DOWN);
PIN_SLP(gpm2-3, INPUT, DOWN);
PIN_SLP(gpm2-4, INPUT, DOWN);
PIN_SLP(gpm3-0, PREV, NONE);
PIN_SLP(gpm3-1, PREV, NONE);
PIN_SLP(gpm3-2, PREV, NONE);
PIN_SLP(gpm3-3, OUT1, NONE);
PIN_SLP(gpm3-4, INPUT, DOWN);
PIN_SLP(gpm3-5, INPUT, DOWN);
PIN_SLP(gpm3-6, INPUT, DOWN);
PIN_SLP(gpm3-7, INPUT, DOWN);
PIN_SLP(gpm4-0, INPUT, DOWN);
PIN_SLP(gpm4-1, INPUT, DOWN);
PIN_SLP(gpm4-2, INPUT, DOWN);
PIN_SLP(gpm4-3, INPUT, DOWN);
PIN_SLP(gpm4-4, INPUT, DOWN);
PIN_SLP(gpm4-5, INPUT, DOWN);
PIN_SLP(gpm4-6, INPUT, DOWN);
PIN_SLP(gpm4-7, INPUT, DOWN);
PIN_SLP(gpy0-0, INPUT, DOWN);
PIN_SLP(gpy0-1, INPUT, DOWN);
PIN_SLP(gpy0-2, INPUT, DOWN);
PIN_SLP(gpy0-3, INPUT, DOWN);
PIN_SLP(gpy0-4, INPUT, DOWN);
PIN_SLP(gpy0-5, INPUT, DOWN);
PIN_SLP(gpy1-0, INPUT, DOWN);
PIN_SLP(gpy1-1, INPUT, DOWN);
PIN_SLP(gpy1-2, INPUT, DOWN);
PIN_SLP(gpy1-3, INPUT, DOWN);
PIN_SLP(gpy2-0, PREV, NONE);
PIN_SLP(gpy2-1, INPUT, DOWN);
PIN_SLP(gpy2-2, INPUT, NONE);
PIN_SLP(gpy2-3, INPUT, NONE);
PIN_SLP(gpy2-4, INPUT, NONE);
PIN_SLP(gpy2-5, INPUT, NONE);
PIN_SLP(gpy3-0, INPUT, DOWN);
PIN_SLP(gpy3-1, INPUT, DOWN);
PIN_SLP(gpy3-2, INPUT, DOWN);
PIN_SLP(gpy3-3, INPUT, DOWN);
PIN_SLP(gpy3-4, INPUT, DOWN);
PIN_SLP(gpy3-5, INPUT, DOWN);
PIN_SLP(gpy3-6, INPUT, DOWN);
PIN_SLP(gpy3-7, INPUT, DOWN);
PIN_SLP(gpy4-0, INPUT, DOWN);
PIN_SLP(gpy4-1, INPUT, DOWN);
PIN_SLP(gpy4-2, INPUT, DOWN);
PIN_SLP(gpy4-3, INPUT, DOWN);
PIN_SLP(gpy4-4, INPUT, DOWN);
PIN_SLP(gpy4-5, INPUT, DOWN);
PIN_SLP(gpy4-6, INPUT, DOWN);
PIN_SLP(gpy4-7, INPUT, DOWN);
PIN_SLP(gpy5-0, INPUT, DOWN);
PIN_SLP(gpy5-1, INPUT, DOWN);
PIN_SLP(gpy5-2, INPUT, DOWN);
PIN_SLP(gpy5-3, INPUT, DOWN);
PIN_SLP(gpy5-4, INPUT, DOWN);
PIN_SLP(gpy5-5, INPUT, DOWN);
PIN_SLP(gpy5-6, INPUT, DOWN);
PIN_SLP(gpy5-7, INPUT, DOWN);
PIN_SLP(gpy6-0, INPUT, DOWN);
PIN_SLP(gpy6-1, INPUT, DOWN);
PIN_SLP(gpy6-2, INPUT, DOWN);
PIN_SLP(gpy6-3, INPUT, DOWN);
PIN_SLP(gpy6-4, INPUT, DOWN);
PIN_SLP(gpy6-5, INPUT, DOWN);
PIN_SLP(gpy6-6, INPUT, DOWN);
PIN_SLP(gpy6-7, INPUT, DOWN);
};
};
&pinctrl_2 {
pinctrl-names = "default";
pinctrl-0 = <&sleep2>;
sleep2: sleep-states {
PIN_SLP(gpz-0, INPUT, DOWN);
PIN_SLP(gpz-1, INPUT, DOWN);
PIN_SLP(gpz-2, INPUT, DOWN);
PIN_SLP(gpz-3, INPUT, DOWN);
PIN_SLP(gpz-4, INPUT, DOWN);
PIN_SLP(gpz-5, INPUT, DOWN);
PIN_SLP(gpz-6, INPUT, DOWN);
};
};
&pinctrl_3 {
pinctrl-names = "default";
pinctrl-0 = <&sleep3>;
sleep3: sleep-states {
PIN_SLP(gpv0-0, INPUT, DOWN);
PIN_SLP(gpv0-1, INPUT, DOWN);
PIN_SLP(gpv0-2, INPUT, DOWN);
PIN_SLP(gpv0-3, INPUT, DOWN);
PIN_SLP(gpv0-4, INPUT, DOWN);
PIN_SLP(gpv0-5, INPUT, DOWN);
PIN_SLP(gpv0-6, INPUT, DOWN);
PIN_SLP(gpv0-7, INPUT, DOWN);
PIN_SLP(gpv1-0, INPUT, DOWN);
PIN_SLP(gpv1-1, INPUT, DOWN);
PIN_SLP(gpv1-2, INPUT, DOWN);
PIN_SLP(gpv1-3, INPUT, DOWN);
PIN_SLP(gpv1-4, INPUT, DOWN);
PIN_SLP(gpv1-5, INPUT, DOWN);
PIN_SLP(gpv1-6, INPUT, DOWN);
PIN_SLP(gpv1-7, INPUT, DOWN);
PIN_SLP(gpv2-0, INPUT, DOWN);
PIN_SLP(gpv2-1, INPUT, DOWN);
PIN_SLP(gpv2-2, INPUT, DOWN);
PIN_SLP(gpv2-3, INPUT, DOWN);
PIN_SLP(gpv2-4, INPUT, DOWN);
PIN_SLP(gpv2-5, INPUT, DOWN);
PIN_SLP(gpv2-6, INPUT, DOWN);
PIN_SLP(gpv2-7, INPUT, DOWN);
PIN_SLP(gpv3-0, INPUT, DOWN);
PIN_SLP(gpv3-1, INPUT, DOWN);
PIN_SLP(gpv3-2, INPUT, DOWN);
PIN_SLP(gpv3-3, INPUT, DOWN);
PIN_SLP(gpv3-4, INPUT, DOWN);
PIN_SLP(gpv3-5, INPUT, DOWN);
PIN_SLP(gpv3-6, INPUT, DOWN);
PIN_SLP(gpv3-7, INPUT, DOWN);
PIN_SLP(gpv4-0, INPUT, DOWN);
};
};

29
arch/arm/boot/dts/exynos4412.dtsi
View file

@ -22,6 +22,35 @@
/ {
compatible = "samsung,exynos4412", "samsung,exynos4";
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@A00 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0xA00>;
};
cpu@A01 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0xA01>;
};
cpu@A02 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0xA02>;
};
cpu@A03 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0xA03>;
};
};
combiner: interrupt-controller@10440000 {
samsung,combiner-nr = <20>;
};

573
arch/arm/boot/dts/exynos4415-pinctrl.dtsi Normal file
View file

@ -0,0 +1,573 @@
/*
* Samsung's Exynos4415 SoCs pin-mux and pin-config device tree source
*
* Copyright (c) 2014 Samsung Electronics Co., Ltd.
*
* Samsung's Exynos4415 SoCs pin-mux and pin-config optiosn are listed as device
* tree nodes are listed in this file.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
&pinctrl_0 {
gpa0: gpa0 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpa1: gpa1 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpb: gpb {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpc0: gpc0 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpc1: gpc1 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpd0: gpd0 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpd1: gpd1 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpf0: gpf0 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpf1: gpf1 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpf2: gpf2 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
uart0_data: uart0-data {
samsung,pins = "gpa0-0", "gpa0-1";
samsung,pin-function = <0x2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
uart0_fctl: uart0-fctl {
samsung,pins = "gpa0-2", "gpa0-3";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
uart1_data: uart1-data {
samsung,pins = "gpa0-4", "gpa0-5";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
uart1_fctl: uart1-fctl {
samsung,pins = "gpa0-6", "gpa0-7";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
uart2_data: uart2-data {
samsung,pins = "gpa1-0", "gpa1-1";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
uart2_fctl: uart2-fctl {
samsung,pins = "gpa1-2", "gpa1-3";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
uart3_data: uart3-data {
samsung,pins = "gpa1-4", "gpa1-5";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
i2c2_bus: i2c2-bus {
samsung,pins = "gpa0-6", "gpa0-7";
samsung,pin-function = <3>;
samsung,pin-pud = <3>;
samsung,pin-drv = <0>;
};
i2c3_bus: i2c3-bus {
samsung,pins = "gpa1-2", "gpa1-3";
samsung,pin-function = <3>;
samsung,pin-pud = <3>;
samsung,pin-drv = <0>;
};
spi0_bus: spi0-bus {
samsung,pins = "gpb-0", "gpb-2", "gpb-3";
samsung,pin-function = <2>;
samsung,pin-pud = <3>;
samsung,pin-drv = <0>;
};
i2c4_bus: i2c4-bus {
samsung,pins = "gpb-0", "gpb-1";
samsung,pin-function = <3>;
samsung,pin-pud = <3>;
samsung,pin-drv = <0>;
};
spi1_bus: spi1-bus {
samsung,pins = "gpb-4", "gpb-6", "gpb-7";
samsung,pin-function = <2>;
samsung,pin-pud = <3>;
samsung,pin-drv = <0>;
};
i2c5_bus: i2c5-bus {
samsung,pins = "gpb-2", "gpb-3";
samsung,pin-function = <3>;
samsung,pin-pud = <3>;
samsung,pin-drv = <0>;
};
i2s1_bus: i2s1-bus {
samsung,pins = "gpc0-0", "gpc0-1", "gpc0-2", "gpc0-3",
"gpc0-4";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
i2s2_bus: i2s2-bus {
samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3",
"gpc1-4";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
pcm2_bus: pcm2-bus {
samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3",
"gpc1-4";
samsung,pin-function = <3>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
i2c6_bus: i2c6-bus {
samsung,pins = "gpc1-3", "gpc1-4";
samsung,pin-function = <4>;
samsung,pin-pud = <3>;
samsung,pin-drv = <0>;
};
spi2_bus: spi2-bus {
samsung,pins = "gpc1-1", "gpc1-3", "gpc1-4";
samsung,pin-function = <5>;
samsung,pin-pud = <3>;
samsung,pin-drv = <0>;
};
pwm0_out: pwm0-out {
samsung,pins = "gpd0-0";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
pwm1_out: pwm1-out {
samsung,pins = "gpd0-1";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
pwm2_out: pwm2-out {
samsung,pins = "gpd0-2";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
pwm3_out: pwm3-out {
samsung,pins = "gpd0-3";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
i2c7_bus: i2c7-bus {
samsung,pins = "gpd0-2", "gpd0-3";
samsung,pin-function = <3>;
samsung,pin-pud = <3>;
samsung,pin-drv = <0>;
};
i2c0_bus: i2c0-bus {
samsung,pins = "gpd1-0", "gpd1-1";
samsung,pin-function = <2>;
samsung,pin-pud = <3>;
samsung,pin-drv = <0>;
};
i2c1_bus: i2c1-bus {
samsung,pins = "gpd1-2", "gpd1-3";
samsung,pin-function = <2>;
samsung,pin-pud = <3>;
samsung,pin-drv = <0>;
};
};
&pinctrl_1 {
gpk0: gpk0 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpk1: gpk1 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpk2: gpk2 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpk3: gpk3 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpl0: gpl0 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpm0: gpm0 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpm1: gpm1 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpm2: gpm2 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpm3: gpm3 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpm4: gpm4 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpx0: gpx0 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
interrupt-parent = <&gic>;
interrupts = <0 32 0>, <0 33 0>, <0 34 0>, <0 35 0>,
<0 36 0>, <0 37 0>, <0 38 0>, <0 39 0>;
#interrupt-cells = <2>;
};
gpx1: gpx1 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
interrupt-parent = <&gic>;
interrupts = <0 40 0>, <0 41 0>, <0 42 0>, <0 43 0>,
<0 44 0>, <0 45 0>, <0 46 0>, <0 47 0>;
#interrupt-cells = <2>;
};
gpx2: gpx2 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpx3: gpx3 {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
sd0_clk: sd0-clk {
samsung,pins = "gpk0-0";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <3>;
};
sd0_cmd: sd0-cmd {
samsung,pins = "gpk0-1";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <3>;
};
sd0_cd: sd0-cd {
samsung,pins = "gpk0-2";
samsung,pin-function = <2>;
samsung,pin-pud = <3>;
samsung,pin-drv = <3>;
};
sd0_rdqs: sd0-rdqs {
samsung,pins = "gpk0-7";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <3>;
};
sd0_bus1: sd0-bus-width1 {
samsung,pins = "gpk0-3";
samsung,pin-function = <2>;
samsung,pin-pud = <3>;
samsung,pin-drv = <3>;
};
sd0_bus4: sd0-bus-width4 {
samsung,pins = "gpk0-4", "gpk0-5", "gpk0-6";
samsung,pin-function = <2>;
samsung,pin-pud = <3>;
samsung,pin-drv = <3>;
};
sd0_bus8: sd0-bus-width8 {
samsung,pins = "gpl0-0", "gpl0-1", "gpl0-2", "gpl0-3";
samsung,pin-function = <2>;
samsung,pin-pud = <3>;
samsung,pin-drv = <3>;
};
sd1_clk: sd1-clk {
samsung,pins = "gpk1-0";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <3>;
};
sd1_cmd: sd1-cmd {
samsung,pins = "gpk1-1";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <3>;
};
sd1_cd: sd1-cd {
samsung,pins = "gpk1-2";
samsung,pin-function = <2>;
samsung,pin-pud = <3>;
samsung,pin-drv = <3>;
};
sd1_bus1: sd1-bus-width1 {
samsung,pins = "gpk1-3";
samsung,pin-function = <2>;
samsung,pin-pud = <3>;
samsung,pin-drv = <3>;
};
sd1_bus4: sd1-bus-width4 {
samsung,pins = "gpk1-4", "gpk1-5", "gpk1-6";
samsung,pin-function = <2>;
samsung,pin-pud = <3>;
samsung,pin-drv = <3>;
};
sd2_clk: sd2-clk {
samsung,pins = "gpk2-0";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <4>;
};
sd2_cmd: sd2-cmd {
samsung,pins = "gpk2-1";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <4>;
};
sd2_cd: sd2-cd {
samsung,pins = "gpk2-2";
samsung,pin-function = <2>;
samsung,pin-pud = <3>;
samsung,pin-drv = <3>;
};
sd2_bus1: sd2-bus-width1 {
samsung,pins = "gpk2-3";
samsung,pin-function = <2>;
samsung,pin-pud = <3>;
samsung,pin-drv = <4>;
};
sd2_bus4: sd2-bus-width4 {
samsung,pins = "gpk2-4", "gpk2-5", "gpk2-6";
samsung,pin-function = <2>;
samsung,pin-pud = <3>;
samsung,pin-drv = <4>;
};
cam_port_b_io: cam-port-b-io {
samsung,pins = "gpm0-0", "gpm0-1", "gpm0-2", "gpm0-3",
"gpm0-4", "gpm0-5", "gpm0-6", "gpm0-7",
"gpm1-0", "gpm1-1", "gpm2-0", "gpm2-1";
samsung,pin-function = <3>;
samsung,pin-pud = <3>;
samsung,pin-drv = <0>;
};
cam_port_b_clk_active: cam-port-b-clk-active {
samsung,pins = "gpm2-2";
samsung,pin-function = <3>;
samsung,pin-pud = <0>;
samsung,pin-drv = <3>;
};
cam_port_b_clk_idle: cam-port-b-clk-idle {
samsung,pins = "gpm2-2";
samsung,pin-function = <0>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
fimc_is_i2c0: fimc-is-i2c0 {
samsung,pins = "gpm4-0", "gpm4-1";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
fimc_is_i2c1: fimc-is-i2c1 {
samsung,pins = "gpm4-2", "gpm4-3";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
fimc_is_uart: fimc-is-uart {
samsung,pins = "gpm3-5", "gpm3-7";
samsung,pin-function = <3>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
};
&pinctrl_2 {
gpz: gpz {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
i2s0_bus: i2s0-bus {
samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3",
"gpz-4", "gpz-5", "gpz-6";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
};

604
arch/arm/boot/dts/exynos4415.dtsi Normal file
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@ -0,0 +1,604 @@
/*
* Samsung's Exynos4415 SoC device tree source
*
* Copyright (c) 2014 Samsung Electronics Co., Ltd.
*
* Samsung's Exynos4415 SoC device nodes are listed in this file. Exynos4415
* based board files can include this file and provide values for board
* specific bindings.
*
* Note: This file does not include device nodes for all the controllers in
* Exynos4415 SoC. As device tree coverage for Exynos4415 increases, additional
* nodes can be added to this file.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include "skeleton.dtsi"
#include <dt-bindings/clock/exynos4415.h>
#include <dt-bindings/clock/exynos-audss-clk.h>
/ {
compatible = "samsung,exynos4415";
interrupt-parent = <&gic>;
aliases {
pinctrl0 = &pinctrl_0;
pinctrl1 = &pinctrl_1;
pinctrl2 = &pinctrl_2;
mshc0 = &mshc_0;
mshc1 = &mshc_1;
mshc2 = &mshc_2;
spi0 = &spi_0;
spi1 = &spi_1;
spi2 = &spi_2;
i2c0 = &i2c_0;
i2c1 = &i2c_1;
i2c2 = &i2c_2;
i2c3 = &i2c_3;
i2c4 = &i2c_4;
i2c5 = &i2c_5;
i2c6 = &i2c_6;
i2c7 = &i2c_7;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: cpu@a00 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0xa00>;
clock-frequency = <1600000000>;
};
cpu1: cpu@a01 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0xa01>;
clock-frequency = <1600000000>;
};
cpu2: cpu@a02 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0xa02>;
clock-frequency = <1600000000>;
};
cpu3: cpu@a03 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0xa03>;
clock-frequency = <1600000000>;
};
};
soc: soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
sysram@02020000 {
compatible = "mmio-sram";
reg = <0x02020000 0x50000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x02020000 0x50000>;
smp-sysram@0 {
compatible = "samsung,exynos4210-sysram";
reg = <0x0 0x1000>;
};
smp-sysram@4f000 {
compatible = "samsung,exynos4210-sysram-ns";
reg = <0x4f000 0x1000>;
};
};
pinctrl_2: pinctrl@03860000 {
compatible = "samsung,exynos4415-pinctrl";
reg = <0x03860000 0x1000>;
interrupts = <0 242 0>;
};
chipid@10000000 {
compatible = "samsung,exynos4210-chipid";
reg = <0x10000000 0x100>;
};
sysreg_system_controller: syscon@10010000 {
compatible = "samsung,exynos4-sysreg", "syscon";
reg = <0x10010000 0x400>;
};
pmu_system_controller: system-controller@10020000 {
compatible = "samsung,exynos4415-pmu", "syscon";
reg = <0x10020000 0x4000>;
};
mipi_phy: video-phy@10020710 {
compatible = "samsung,s5pv210-mipi-video-phy";
reg = <0x10020710 8>;
#phy-cells = <1>;
};
pd_cam: cam-power-domain@10024000 {
compatible = "samsung,exynos4210-pd";
reg = <0x10024000 0x20>;
};
pd_tv: tv-power-domain@10024020 {
compatible = "samsung,exynos4210-pd";
reg = <0x10024020 0x20>;
};
pd_mfc: mfc-power-domain@10024040 {
compatible = "samsung,exynos4210-pd";
reg = <0x10024040 0x20>;
};
pd_g3d: g3d-power-domain@10024060 {
compatible = "samsung,exynos4210-pd";
reg = <0x10024060 0x20>;
};
pd_lcd0: lcd0-power-domain@10024080 {
compatible = "samsung,exynos4210-pd";
reg = <0x10024080 0x20>;
};
pd_isp0: isp0-power-domain@100240A0 {
compatible = "samsung,exynos4210-pd";
reg = <0x100240A0 0x20>;
};
pd_isp1: isp1-power-domain@100240E0 {
compatible = "samsung,exynos4210-pd";
reg = <0x100240E0 0x20>;
};
cmu: clock-controller@10030000 {
compatible = "samsung,exynos4415-cmu";
reg = <0x10030000 0x18000>;
#clock-cells = <1>;
};
rtc: rtc@10070000 {
compatible = "samsung,exynos3250-rtc";
reg = <0x10070000 0x100>;
interrupts = <0 73 0>, <0 74 0>;
status = "disabled";
};
mct@10050000 {
compatible = "samsung,exynos4210-mct";
reg = <0x10050000 0x800>;
interrupts = <0 218 0>, <0 219 0>, <0 220 0>, <0 221 0>,
<0 223 0>, <0 226 0>, <0 227 0>, <0 228 0>;
clocks = <&cmu CLK_FIN_PLL>, <&cmu CLK_MCT>;
clock-names = "fin_pll", "mct";
};
gic: interrupt-controller@10481000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x10481000 0x1000>,
<0x10482000 0x1000>,
<0x10484000 0x2000>,
<0x10486000 0x2000>;
interrupts = <1 9 0xf04>;
};
l2c: l2-cache-controller@10502000 {
compatible = "arm,pl310-cache";
reg = <0x10502000 0x1000>;
cache-unified;
cache-level = <2>;
arm,tag-latency = <2 2 1>;
arm,data-latency = <3 2 1>;
arm,double-linefill = <1>;
arm,double-linefill-incr = <0>;
arm,double-linefill-wrap = <1>;
arm,prefetch-drop = <1>;
arm,prefetch-offset = <7>;
};
cmu_dmc: clock-controller@105C0000 {
compatible = "samsung,exynos4415-cmu-dmc";
reg = <0x105C0000 0x3000>;
#clock-cells = <1>;
};
pinctrl_1: pinctrl@11000000 {
compatible = "samsung,exynos4415-pinctrl";
reg = <0x11000000 0x1000>;
interrupts = <0 225 0>;
wakeup-interrupt-controller {
compatible = "samsung,exynos4210-wakeup-eint";
interrupt-parent = <&gic>;
interrupts = <0 48 0>;
};
};
pinctrl_0: pinctrl@11400000 {
compatible = "samsung,exynos4415-pinctrl";
reg = <0x11400000 0x1000>;
interrupts = <0 240 0>;
};
hsotg: hsotg@12480000 {
compatible = "samsung,s3c6400-hsotg";
reg = <0x12480000 0x20000>;
interrupts = <0 141 0>;
clocks = <&cmu CLK_USBDEVICE>;
clock-names = "otg";
phys = <&exynos_usbphy 0>;
phy-names = "usb2-phy";
status = "disabled";
};
mshc_0: mshc@12510000 {
compatible = "samsung,exynos5250-dw-mshc";
reg = <0x12510000 0x1000>;
interrupts = <0 142 0>;
clocks = <&cmu CLK_SDMMC0>, <&cmu CLK_SCLK_MMC0>;
clock-names = "biu", "ciu";
fifo-depth = <0x80>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
mshc_1: mshc@12520000 {
compatible = "samsung,exynos5250-dw-mshc";
reg = <0x12520000 0x1000>;
interrupts = <0 143 0>;
clocks = <&cmu CLK_SDMMC1>, <&cmu CLK_SCLK_MMC1>;
clock-names = "biu", "ciu";
fifo-depth = <0x80>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
mshc_2: mshc@12530000 {
compatible = "samsung,exynos5250-dw-mshc";
reg = <0x12530000 0x1000>;
interrupts = <0 144 0>;
clocks = <&cmu CLK_SDMMC2>, <&cmu CLK_SCLK_MMC2>;
clock-names = "biu", "ciu";
fifo-depth = <0x80>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
ehci: ehci@12580000 {
compatible = "samsung,exynos4210-ehci";
reg = <0x12580000 0x100>;
interrupts = <0 140 0>;
clocks = <&cmu CLK_USBHOST>;
clock-names = "usbhost";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
phys = <&exynos_usbphy 1>;
status = "disabled";
};
port@1 {
reg = <1>;
phys = <&exynos_usbphy 2>;
status = "disabled";
};
port@2 {
reg = <2>;
phys = <&exynos_usbphy 3>;
status = "disabled";
};
};
ohci: ohci@12590000 {
compatible = "samsung,exynos4210-ohci";
reg = <0x12590000 0x100>;
interrupts = <0 140 0>;
clocks = <&cmu CLK_USBHOST>;
clock-names = "usbhost";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
phys = <&exynos_usbphy 1>;
status = "disabled";
};
};
exynos_usbphy: exynos-usbphy@125B0000 {
compatible = "samsung,exynos4x12-usb2-phy";
reg = <0x125B0000 0x100>;
samsung,pmureg-phandle = <&pmu_system_controller>;
samsung,sysreg-phandle = <&sysreg_system_controller>;
clocks = <&cmu CLK_USBDEVICE>, <&xusbxti>;
clock-names = "phy", "ref";
#phy-cells = <1>;
status = "disabled";
};
amba {
compatible = "arm,amba-bus";
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&gic>;
ranges;
pdma0: pdma@12680000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x12680000 0x1000>;
interrupts = <0 138 0>;
clocks = <&cmu CLK_PDMA0>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
pdma1: pdma@12690000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x12690000 0x1000>;
interrupts = <0 139 0>;
clocks = <&cmu CLK_PDMA1>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
};
adc: adc@126C0000 {
compatible = "samsung,exynos3250-adc",
"samsung,exynos-adc-v2";
reg = <0x126C0000 0x100>, <0x10020718 0x4>;
interrupts = <0 137 0>;
clock-names = "adc", "sclk";
clocks = <&cmu CLK_TSADC>, <&cmu CLK_SCLK_TSADC>;
#io-channel-cells = <1>;
io-channel-ranges;
status = "disabled";
};
serial_0: serial@13800000 {
compatible = "samsung,exynos4210-uart";
reg = <0x13800000 0x100>;
interrupts = <0 109 0>;
clocks = <&cmu CLK_UART0>, <&cmu CLK_SCLK_UART0>;
clock-names = "uart", "clk_uart_baud0";
status = "disabled";
};
serial_1: serial@13810000 {
compatible = "samsung,exynos4210-uart";
reg = <0x13810000 0x100>;
interrupts = <0 110 0>;
clocks = <&cmu CLK_UART1>, <&cmu CLK_SCLK_UART1>;
clock-names = "uart", "clk_uart_baud0";
status = "disabled";
};
serial_2: serial@13820000 {
compatible = "samsung,exynos4210-uart";
reg = <0x13820000 0x100>;
interrupts = <0 111 0>;
clocks = <&cmu CLK_UART2>, <&cmu CLK_SCLK_UART2>;
clock-names = "uart", "clk_uart_baud0";
status = "disabled";
};
serial_3: serial@13830000 {
compatible = "samsung,exynos4210-uart";
reg = <0x13830000 0x100>;
interrupts = <0 112 0>;
clocks = <&cmu CLK_UART3>, <&cmu CLK_SCLK_UART3>;
clock-names = "uart", "clk_uart_baud0";
status = "disabled";
};
i2c_0: i2c@13860000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
reg = <0x13860000 0x100>;
interrupts = <0 113 0>;
clocks = <&cmu CLK_I2C0>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c0_bus>;
status = "disabled";
};
i2c_1: i2c@13870000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
reg = <0x13870000 0x100>;
interrupts = <0 114 0>;
clocks = <&cmu CLK_I2C1>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c1_bus>;
status = "disabled";
};
i2c_2: i2c@13880000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
reg = <0x13880000 0x100>;
interrupts = <0 115 0>;
clocks = <&cmu CLK_I2C2>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c2_bus>;
status = "disabled";
};
i2c_3: i2c@13890000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
reg = <0x13890000 0x100>;
interrupts = <0 116 0>;
clocks = <&cmu CLK_I2C3>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c3_bus>;
status = "disabled";
};
i2c_4: i2c@138A0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
reg = <0x138A0000 0x100>;
interrupts = <0 117 0>;
clocks = <&cmu CLK_I2C4>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c4_bus>;
status = "disabled";
};
i2c_5: i2c@138B0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
reg = <0x138B0000 0x100>;
interrupts = <0 118 0>;
clocks = <&cmu CLK_I2C5>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c5_bus>;
status = "disabled";
};
i2c_6: i2c@138C0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
reg = <0x138C0000 0x100>;
interrupts = <0 119 0>;
clocks = <&cmu CLK_I2C6>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c6_bus>;
status = "disabled";
};
i2c_7: i2c@138D0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
reg = <0x138D0000 0x100>;
interrupts = <0 120 0>;
clocks = <&cmu CLK_I2C7>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c7_bus>;
status = "disabled";
};
spi_0: spi@13920000 {
compatible = "samsung,exynos4210-spi";
reg = <0x13920000 0x100>;
interrupts = <0 121 0>;
dmas = <&pdma0 7>, <&pdma0 6>;
dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu CLK_SPI0>, <&cmu CLK_SCLK_SPI0>;
clock-names = "spi", "spi_busclk0";
samsung,spi-src-clk = <0>;
pinctrl-names = "default";
pinctrl-0 = <&spi0_bus>;
status = "disabled";
};
spi_1: spi@13930000 {
compatible = "samsung,exynos4210-spi";
reg = <0x13930000 0x100>;
interrupts = <0 122 0>;
dmas = <&pdma1 7>, <&pdma1 6>;
dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu CLK_SPI1>, <&cmu CLK_SCLK_SPI1>;
clock-names = "spi", "spi_busclk0";
samsung,spi-src-clk = <0>;
pinctrl-names = "default";
pinctrl-0 = <&spi1_bus>;
status = "disabled";
};
spi_2: spi@13940000 {
compatible = "samsung,exynos4210-spi";
reg = <0x13940000 0x100>;
interrupts = <0 123 0>;
dmas = <&pdma0 9>, <&pdma0 8>;
dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu CLK_SPI2>, <&cmu CLK_SCLK_SPI2>;
clock-names = "spi", "spi_busclk0";
samsung,spi-src-clk = <0>;
pinctrl-names = "default";
pinctrl-0 = <&spi2_bus>;
status = "disabled";
};
clock_audss: clock-controller@03810000 {
compatible = "samsung,exynos4210-audss-clock";
reg = <0x03810000 0x0C>;
#clock-cells = <1>;
};
i2s0: i2s@3830000 {
compatible = "samsung,s5pv210-i2s";
reg = <0x03830000 0x100>;
interrupts = <0 124 0>;
clocks = <&clock_audss EXYNOS_I2S_BUS>,
<&clock_audss EXYNOS_SCLK_I2S>;
clock-names = "iis", "i2s_opclk0";
dmas = <&pdma1 10>, <&pdma1 9>, <&pdma1 8>;
dma-names = "tx", "rx", "tx-sec";
pinctrl-names = "default";
pinctrl-0 = <&i2s0_bus>;
samsung,idma-addr = <0x03000000>;
status = "disabled";
};
pwm: pwm@139D0000 {
compatible = "samsung,exynos4210-pwm";
reg = <0x139D0000 0x1000>;
interrupts = <0 104 0>, <0 105 0>, <0 106 0>,
<0 107 0>, <0 108 0>;
#pwm-cells = <3>;
status = "disabled";
};
pmu {
compatible = "arm,cortex-a9-pmu";
interrupts = <0 18 0>, <0 19 0>, <0 20 0>, <0 21 0>;
};
};
};
#include "exynos4415-pinctrl.dtsi"

16
arch/arm/boot/dts/exynos4x12-pinctrl.dtsi
View file

@ -12,6 +12,22 @@
* published by the Free Software Foundation.
*/
#define PIN_PULL_NONE 0
#define PIN_PULL_DOWN 1
#define PIN_PULL_UP 3
#define PIN_PDN_OUT0 0
#define PIN_PDN_OUT1 1
#define PIN_PDN_INPUT 2
#define PIN_PDN_PREV 3
#define PIN_SLP(_pin, _mode, _pull) \
_pin { \
samsung,pins = #_pin; \
samsung,pin-con-pdn = <PIN_PDN_ ##_mode>; \
samsung,pin-pud-pdn = <PIN_PULL_ ##_pull>; \
}
/ {
pinctrl@11400000 {
gpa0: gpa0 {

10
arch/arm/boot/dts/exynos4x12.dtsi
View file

@ -271,4 +271,14 @@
compatible = "samsung,exynos4x12-usb2-phy";
samsung,sysreg-phandle = <&sys_reg>;
};
tmu@100C0000 {
compatible = "samsung,exynos4412-tmu";
interrupt-parent = <&combiner>;
interrupts = <2 4>;
reg = <0x100C0000 0x100>;
clocks = <&clock 383>;
clock-names = "tmu_apbif";
status = "disabled";
};
};

343
arch/arm/boot/dts/exynos5250-arndale.dts
View file

@ -7,12 +7,13 @@
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
*/
/dts-v1/;
#include "exynos5250.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/input/input.h>
#include "exynos5250.dtsi"
/ {
model = "Insignal Arndale evaluation board based on EXYNOS5250";
@ -26,20 +27,139 @@
bootargs = "console=ttySAC2,115200";
};
rtc@101E0000 {
gpio_keys {
compatible = "gpio-keys";
menu {
label = "SW-TACT2";
gpios = <&gpx1 4 GPIO_ACTIVE_LOW>;
linux,code = <KEY_MENU>;
gpio-key,wakeup;
};
home {
label = "SW-TACT3";
gpios = <&gpx1 5 GPIO_ACTIVE_LOW>;
linux,code = <KEY_HOME>;
gpio-key,wakeup;
};
up {
label = "SW-TACT4";
gpios = <&gpx1 6 GPIO_ACTIVE_LOW>;
linux,code = <KEY_UP>;
gpio-key,wakeup;
};
down {
label = "SW-TACT5";
gpios = <&gpx1 7 GPIO_ACTIVE_LOW>;
linux,code = <KEY_DOWN>;
gpio-key,wakeup;
};
back {
label = "SW-TACT6";
gpios = <&gpx2 0 GPIO_ACTIVE_LOW>;
linux,code = <KEY_BACK>;
gpio-key,wakeup;
};
wakeup {
label = "SW-TACT7";
gpios = <&gpx2 1 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WAKEUP>;
gpio-key,wakeup;
};
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
main_dc_reg: regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
regulator-name = "MAIN_DC";
};
mmc_reg: regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "VDD_33ON_2.8V";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
gpio = <&gpx1 1 GPIO_ACTIVE_LOW>;
enable-active-high;
};
reg_hdmi_en: regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
regulator-name = "hdmi-en";
};
};
fixed-rate-clocks {
xxti {
compatible = "samsung,clock-xxti";
clock-frequency = <24000000>;
};
};
// SMSC USB3503 connected in hardware only mode as a PHY
usb_hub: usb-hub {
compatible = "smsc,usb3503a";
reset-gpios = <&gpx3 5 GPIO_ACTIVE_LOW>;
connect-gpios = <&gpd1 7 GPIO_ACTIVE_LOW>;
};
};
&dp {
status = "okay";
};
samsung,color-space = <0>;
samsung,dynamic-range = <0>;
samsung,ycbcr-coeff = <0>;
samsung,color-depth = <1>;
samsung,link-rate = <0x0a>;
samsung,lane-count = <4>;
};
codec@11000000 {
samsung,mfc-r = <0x43000000 0x800000>;
samsung,mfc-l = <0x51000000 0x800000>;
};
&fimd {
status = "okay";
i2c@12C60000 {
display-timings {
native-mode = <&timing0>;
timing0: timing@0 {
/* 2560x1600 DP panel */
clock-frequency = <50000>;
hactive = <2560>;
vactive = <1600>;
hfront-porch = <48>;
hback-porch = <80>;
hsync-len = <32>;
vback-porch = <16>;
vfront-porch = <8>;
vsync-len = <6>;
};
};
};
&hdmi {
hpd-gpio = <&gpx3 7 GPIO_ACTIVE_LOW>;
vdd_osc-supply = <&ldo10_reg>;
vdd_pll-supply = <&ldo8_reg>;
vdd-supply = <&ldo8_reg>;
};
&i2c_0 {
status = "okay";
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <20000>;
samsung,i2c-slave-addr = <0x66>;
status = "okay";
s5m8767_pmic@66 {
compatible = "samsung,s5m8767-pmic";
@ -70,12 +190,13 @@
s5m8767,pmic-buck2-dvs-voltage = <1300000>;
s5m8767,pmic-buck3-dvs-voltage = <1100000>;
s5m8767,pmic-buck4-dvs-voltage = <1200000>;
s5m8767,pmic-buck-dvs-gpios = <&gpd1 0 0>,
<&gpd1 1 0>,
<&gpd1 2 0>;
s5m8767,pmic-buck-ds-gpios = <&gpx2 3 0>,
<&gpx2 4 0>,
<&gpx2 5 0>;
s5m8767,pmic-buck-dvs-gpios = <&gpd1 0 GPIO_ACTIVE_HIGH>,
<&gpd1 1 GPIO_ACTIVE_HIGH>,
<&gpd1 2 GPIO_ACTIVE_HIGH>;
s5m8767,pmic-buck-ds-gpios = <&gpx2 3 GPIO_ACTIVE_HIGH>,
<&gpx2 4 GPIO_ACTIVE_HIGH>,
<&gpx2 5 GPIO_ACTIVE_HIGH>;
regulators {
ldo1_reg: LDO1 {
regulator-name = "VDD_ALIVE_1.0V";
@ -327,9 +448,9 @@
};
};
};
};
};
i2c@12C80000 {
&i2c_2 {
status = "okay";
samsung,i2c-sda-delay = <100>;
@ -340,13 +461,12 @@
compatible = "samsung,exynos4210-hdmiddc";
reg = <0x50>;
};
};
};
i2c@12C90000 {
&i2c_3 {
status = "okay";
wm1811a@1a {
compatible = "wlf,wm1811";
reg = <0x1a>;
@ -359,12 +479,12 @@
SPKVDD1-supply = <&main_dc_reg>;
SPKVDD2-supply = <&main_dc_reg>;
wlf,ldo1ena = <&gpb0 0 0>;
wlf,ldo2ena = <&gpb0 1 0>;
};
wlf,ldo1ena = <&gpb0 0 GPIO_ACTIVE_HIGH>;
wlf,ldo2ena = <&gpb0 1 GPIO_ACTIVE_HIGH>;
};
};
i2c@12CE0000 {
&i2c_8 {
status = "okay";
samsung,i2c-sda-delay = <100>;
@ -375,9 +495,9 @@
compatible = "samsung,exynos4212-hdmiphy";
reg = <0x38>;
};
};
};
i2c@121D0000 {
&i2c_9 {
status = "okay";
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <40000>;
@ -387,18 +507,18 @@
compatible = "samsung,exynos-sataphy-i2c";
reg = <0x38>;
};
};
};
sata@122F0000 {
&i2s0 {
status = "okay";
};
};
sata-phy@12170000 {
status = "okay";
samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>;
};
&mfc {
samsung,mfc-r = <0x43000000 0x800000>;
samsung,mfc-l = <0x51000000 0x800000>;
};
mmc_0: mmc@12200000 {
&mmc_0 {
status = "okay";
num-slots = <1>;
broken-cd;
@ -411,9 +531,9 @@
pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;
bus-width = <8>;
cap-mmc-highspeed;
};
};
mmc_2: mmc@12220000 {
&mmc_2 {
status = "okay";
num-slots = <1>;
card-detect-delay = <200>;
@ -426,140 +546,17 @@
bus-width = <4>;
disable-wp;
cap-sd-highspeed;
};
i2s0: i2s@03830000 {
status = "okay";
};
gpio_keys {
compatible = "gpio-keys";
menu {
label = "SW-TACT2";
gpios = <&gpx1 4 1>;
linux,code = <KEY_MENU>;
gpio-key,wakeup;
};
home {
label = "SW-TACT3";
gpios = <&gpx1 5 1>;
linux,code = <KEY_HOME>;
gpio-key,wakeup;
};
up {
label = "SW-TACT4";
gpios = <&gpx1 6 1>;
linux,code = <KEY_UP>;
gpio-key,wakeup;
};
down {
label = "SW-TACT5";
gpios = <&gpx1 7 1>;
linux,code = <KEY_DOWN>;
gpio-key,wakeup;
};
back {
label = "SW-TACT6";
gpios = <&gpx2 0 1>;
linux,code = <KEY_BACK>;
gpio-key,wakeup;
};
wakeup {
label = "SW-TACT7";
gpios = <&gpx2 1 1>;
linux,code = <KEY_WAKEUP>;
gpio-key,wakeup;
};
};
hdmi {
hpd-gpio = <&gpx3 7 2>;
vdd_osc-supply = <&ldo10_reg>;
vdd_pll-supply = <&ldo8_reg>;
vdd-supply = <&ldo8_reg>;
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
main_dc_reg: regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
regulator-name = "MAIN_DC";
};
mmc_reg: regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "VDD_33ON_2.8V";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
gpio = <&gpx1 1 1>;
enable-active-high;
};
reg_hdmi_en: regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
regulator-name = "hdmi-en";
};
};
fixed-rate-clocks {
xxti {
compatible = "samsung,clock-xxti";
clock-frequency = <24000000>;
};
};
dp-controller@145B0000 {
samsung,color-space = <0>;
samsung,dynamic-range = <0>;
samsung,ycbcr-coeff = <0>;
samsung,color-depth = <1>;
samsung,link-rate = <0x0a>;
samsung,lane-count = <4>;
status = "okay";
};
fimd: fimd@14400000 {
status = "okay";
display-timings {
native-mode = <&timing0>;
timing0: timing@0 {
/* 2560x1600 DP panel */
clock-frequency = <50000>;
hactive = <2560>;
vactive = <1600>;
hfront-porch = <48>;
hback-porch = <80>;
hsync-len = <32>;
vback-porch = <16>;
vfront-porch = <8>;
vsync-len = <6>;
};
};
};
usb_hub_bus {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
// SMSC USB3503 connected in hardware only mode as a PHY
usb_hub: usb_hub {
compatible = "smsc,usb3503a";
reset-gpios = <&gpx3 5 1>;
connect-gpios = <&gpd1 7 1>;
};
};
};
&rtc {
status = "okay";
};
&sata {
status = "okay";
};
&sata_phy {
status = "okay";
samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>;
};

268
arch/arm/boot/dts/exynos5250-smdk5250.dts
View file

@ -7,9 +7,11 @@
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include "exynos5250.dtsi"
/ {
@ -27,14 +29,97 @@
bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC2,115200 init=/linuxrc";
};
rtc@101E0000 {
status = "okay";
vdd: fixed-regulator@0 {
compatible = "regulator-fixed";
regulator-name = "vdd-supply";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
i2c@12C60000 {
dbvdd: fixed-regulator@1 {
compatible = "regulator-fixed";
regulator-name = "dbvdd-supply";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
spkvdd: fixed-regulator@2 {
compatible = "regulator-fixed";
regulator-name = "spkvdd-supply";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
sound {
compatible = "samsung,smdk-wm8994";
samsung,i2s-controller = <&i2s0>;
samsung,audio-codec = <&wm8994>;
};
fixed-rate-clocks {
xxti {
compatible = "samsung,clock-xxti";
clock-frequency = <24000000>;
};
codec_mclk: codec-mclk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <16934000>;
};
};
};
&dp {
samsung,color-space = <0>;
samsung,dynamic-range = <0>;
samsung,ycbcr-coeff = <0>;
samsung,color-depth = <1>;
samsung,link-rate = <0x0a>;
samsung,lane-count = <4>;
pinctrl-names = "default";
pinctrl-0 = <&dp_hpd>;
status = "okay";
};
&ehci {
samsung,vbus-gpio = <&gpx2 6 GPIO_ACTIVE_HIGH>;
};
&fimd {
status = "okay";
display-timings {
native-mode = <&timing0>;
timing0: timing@0 {
/* 1280x800 */
clock-frequency = <50000>;
hactive = <1280>;
vactive = <800>;
hfront-porch = <4>;
hback-porch = <4>;
hsync-len = <4>;
vback-porch = <4>;
vfront-porch = <4>;
vsync-len = <4>;
};
};
};
&hdmi {
hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>;
};
&i2c_0 {
status = "okay";
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <20000>;
status = "okay";
eeprom@50 {
compatible = "samsung,s524ad0xd1";
@ -45,7 +130,7 @@
compatible = "maxim,max77686";
reg = <0x09>;
interrupt-parent = <&gpx3>;
interrupts = <2 0>;
interrupts = <2 IRQ_TYPE_NONE>;
voltage-regulators {
ldo1_reg: LDO1 {
@ -184,36 +269,12 @@
};
};
};
};
};
vdd: fixed-regulator@0 {
compatible = "regulator-fixed";
regulator-name = "vdd-supply";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
dbvdd: fixed-regulator@1 {
compatible = "regulator-fixed";
regulator-name = "dbvdd-supply";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
spkvdd: fixed-regulator@2 {
compatible = "regulator-fixed";
regulator-name = "spkvdd-supply";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
i2c@12C70000 {
&i2c_1 {
status = "okay";
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <20000>;
status = "okay";
eeprom@51 {
compatible = "samsung,s524ad0xd1";
@ -236,52 +297,52 @@
SPKVDD1-supply = <&spkvdd>;
SPKVDD2-supply = <&spkvdd>;
};
};
};
i2c@121D0000 {
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <40000>;
samsung,i2c-slave-addr = <0x38>;
&i2c_2 {
status = "okay";
sata_phy_i2c:sata-phy@38 {
compatible = "samsung,exynos-sataphy-i2c";
reg = <0x38>;
};
};
i2c@12C80000 {
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <66000>;
status = "okay";
hdmiddc@50 {
compatible = "samsung,exynos4210-hdmiddc";
reg = <0x50>;
};
};
};
i2c@12CE0000 {
&i2c_8 {
status = "okay";
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <66000>;
status = "okay";
hdmiphy@38 {
compatible = "samsung,exynos4212-hdmiphy";
reg = <0x38>;
};
};
};
sata@122F0000 {
&i2c_9 {
status = "okay";
};
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <40000>;
samsung,i2c-slave-addr = <0x38>;
sata-phy@12170000 {
sata_phy_i2c: sata-phy@38 {
compatible = "samsung,exynos-sataphy-i2c";
reg = <0x38>;
};
};
&i2s0 {
status = "okay";
samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>;
};
};
mmc@12200000 {
&mfc {
samsung,mfc-r = <0x43000000 0x800000>;
samsung,mfc-l = <0x51000000 0x800000>;
};
&mmc_0 {
status = "okay";
num-slots = <1>;
broken-cd;
@ -293,9 +354,9 @@
pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;
bus-width = <8>;
cap-mmc-highspeed;
};
};
mmc@12220000 {
&mmc_2 {
status = "okay";
num-slots = <1>;
card-detect-delay = <200>;
@ -307,11 +368,24 @@
bus-width = <4>;
disable-wp;
cap-sd-highspeed;
};
};
spi_1: spi@12d30000 {
cs-gpios = <&gpa2 5 0>;
&rtc {
status = "okay";
};
&sata {
status = "okay";
};
&sata_phy {
status = "okay";
samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>;
};
&spi_1 {
status = "okay";
cs-gpios = <&gpa2 5 GPIO_ACTIVE_HIGH>;
w25q80bw@0 {
#address-cells = <1>;
@ -335,74 +409,4 @@
reg = <0x40000 0xc0000>;
};
};
};
hdmi {
hpd-gpio = <&gpx3 7 0>;
};
codec@11000000 {
samsung,mfc-r = <0x43000000 0x800000>;
samsung,mfc-l = <0x51000000 0x800000>;
};
i2s0: i2s@03830000 {
status = "okay";
};
sound {
compatible = "samsung,smdk-wm8994";
samsung,i2s-controller = <&i2s0>;
samsung,audio-codec = <&wm8994>;
};
usb@12110000 {
samsung,vbus-gpio = <&gpx2 6 0>;
};
dp-controller@145B0000 {
samsung,color-space = <0>;
samsung,dynamic-range = <0>;
samsung,ycbcr-coeff = <0>;
samsung,color-depth = <1>;
samsung,link-rate = <0x0a>;
samsung,lane-count = <4>;
pinctrl-names = "default";
pinctrl-0 = <&dp_hpd>;
status = "okay";
};
fimd@14400000 {
status = "okay";
display-timings {
native-mode = <&timing0>;
timing0: timing@0 {
/* 1280x800 */
clock-frequency = <50000>;
hactive = <1280>;
vactive = <800>;
hfront-porch = <4>;
hback-porch = <4>;
hsync-len = <4>;
vback-porch = <4>;
vfront-porch = <4>;
vsync-len = <4>;
};
};
};
fixed-rate-clocks {
xxti {
compatible = "samsung,clock-xxti";
clock-frequency = <24000000>;
};
codec_mclk: codec-mclk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <16934000>;
};
};
};

246
arch/arm/boot/dts/exynos5250-snow.dts
View file

@ -6,10 +6,13 @@
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/maxim,max77686.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/input/input.h>
#include "exynos5250.dtsi"
/ {
@ -25,76 +28,7 @@
};
chosen {
};
rtc@101E0000 {
status = "okay";
};
pinctrl@11400000 {
ec_irq: ec-irq {
samsung,pins = "gpx1-6";
samsung,pin-function = <0>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
sd3_clk: sd3-clk {
samsung,pin-drv = <0>;
};
sd3_cmd: sd3-cmd {
samsung,pin-pud = <3>;
samsung,pin-drv = <0>;
};
sd3_bus4: sd3-bus-width4 {
samsung,pin-drv = <0>;
};
max98095_en: max98095-en {
samsung,pins = "gpx1-7";
samsung,pin-function = <0>;
samsung,pin-pud = <3>;
samsung,pin-drv = <0>;
};
tps65090_irq: tps65090-irq {
samsung,pins = "gpx2-6";
samsung,pin-function = <0>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
usb3_vbus_en: usb3-vbus-en {
samsung,pins = "gpx2-7";
samsung,pin-function = <1>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
hdmi_hpd_irq: hdmi-hpd-irq {
samsung,pins = "gpx3-7";
samsung,pin-function = <0>;
samsung,pin-pud = <1>;
samsung,pin-drv = <0>;
};
};
pinctrl@13400000 {
arb_their_claim: arb-their-claim {
samsung,pins = "gpe0-4";
samsung,pin-function = <0>;
samsung,pin-pud = <3>;
samsung,pin-drv = <0>;
};
arb_our_claim: arb-our-claim {
samsung,pins = "gpf0-3";
samsung,pin-function = <1>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
bootargs = "console=tty1";
};
gpio-keys {
@ -102,14 +36,14 @@
power {
label = "Power";
gpios = <&gpx1 3 1>;
linux,code = <116>; /* KEY_POWER */
gpios = <&gpx1 3 GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
gpio-key,wakeup;
};
lid-switch {
label = "Lid";
gpios = <&gpx3 5 1>;
gpios = <&gpx3 5 GPIO_ACTIVE_LOW>;
linux,input-type = <5>; /* EV_SW */
linux,code = <0>; /* SW_LID */
debounce-interval = <1>;
@ -130,8 +64,8 @@
i2c-parent = <&{/i2c@12CA0000}>;
our-claim-gpio = <&gpf0 3 1>;
their-claim-gpios = <&gpe0 4 1>;
our-claim-gpio = <&gpf0 3 GPIO_ACTIVE_LOW>;
their-claim-gpios = <&gpe0 4 GPIO_ACTIVE_LOW>;
slew-delay-us = <10>;
wait-retry-us = <3000>;
wait-free-us = <50000>;
@ -154,7 +88,7 @@
cros_ec: embedded-controller {
compatible = "google,cros-ec-i2c";
reg = <0x1e>;
interrupts = <6 0>;
interrupts = <6 IRQ_TYPE_NONE>;
interrupt-parent = <&gpx1>;
pinctrl-names = "default";
pinctrl-0 = <&ec_irq>;
@ -241,13 +175,6 @@
};
i2c@12CD0000 {
max98095: codec@11 {
compatible = "maxim,max98095";
reg = <0x11>;
pinctrl-0 = <&max98095_en>;
pinctrl-names = "default";
};
ptn3460: lvds-bridge@20 {
compatible = "nxp,ptn3460";
reg = <0x20>;
@ -258,10 +185,6 @@
};
};
i2s0: i2s@03830000 {
status = "okay";
};
sound {
compatible = "google,snow-audio-max98095";
@ -275,20 +198,12 @@
regulator-name = "P5.0V_USB3CON";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpx2 7 0>;
gpio = <&gpx2 7 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb3_vbus_en>;
enable-active-high;
};
phy@12100000 {
vbus-supply = <&usb3_vbus_reg>;
};
usb@12110000 {
samsung,vbus-gpio = <&gpx1 1 0>;
};
fixed-rate-clocks {
xxti {
compatible = "samsung,clock-xxti";
@ -296,18 +211,6 @@
};
};
hdmi {
hpd-gpio = <&gpx3 7 0>;
pinctrl-names = "default";
pinctrl-0 = <&hdmi_hpd_irq>;
phy = <&hdmiphy>;
ddc = <&i2c_2>;
hdmi-en-supply = <&tps65090_fet7>;
vdd-supply = <&ldo8_reg>;
vdd_osc-supply = <&ldo10_reg>;
vdd_pll-supply = <&ldo8_reg>;
};
backlight: backlight {
compatible = "pwm-backlight";
pwms = <&pwm 0 1000000 0>;
@ -319,18 +222,14 @@
pinctrl-names = "default";
};
fimd@14400000 {
status = "okay";
samsung,invert-vclk;
};
panel: panel {
compatible = "auo,b116xw03";
power-supply = <&fet6>;
backlight = <&backlight>;
};
};
dp-controller@145B0000 {
&dp {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&dp_hpd>;
@ -340,9 +239,29 @@
samsung,color-depth = <1>;
samsung,link-rate = <0x0a>;
samsung,lane-count = <2>;
samsung,hpd-gpio = <&gpx0 7 0>;
samsung,hpd-gpio = <&gpx0 7 GPIO_ACTIVE_HIGH>;
bridge = <&ptn3460>;
};
};
&ehci {
samsung,vbus-gpio = <&gpx1 1 GPIO_ACTIVE_HIGH>;
};
&fimd {
status = "okay";
samsung,invert-vclk;
};
&hdmi {
hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&hdmi_hpd_irq>;
phy = <&hdmiphy>;
ddc = <&i2c_2>;
hdmi-en-supply = <&tps65090_fet7>;
vdd-supply = <&ldo8_reg>;
vdd_osc-supply = <&ldo10_reg>;
vdd_pll-supply = <&ldo8_reg>;
};
&i2c_0 {
@ -350,10 +269,10 @@
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <378000>;
max77686@09 {
max77686: max77686@09 {
compatible = "maxim,max77686";
interrupt-parent = <&gpx3>;
interrupts = <2 0>;
interrupts = <2 IRQ_TYPE_NONE>;
pinctrl-names = "default";
pinctrl-0 = <&max77686_irq>;
wakeup-source;
@ -503,7 +422,7 @@
trackpad {
reg = <0x67>;
compatible = "cypress,cyapa";
interrupts = <2 0>;
interrupts = <2 IRQ_TYPE_NONE>;
interrupt-parent = <&gpx1>;
wakeup-source;
};
@ -550,6 +469,13 @@
status = "okay";
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <66000>;
max98095: codec@11 {
compatible = "maxim,max98095";
reg = <0x11>;
pinctrl-0 = <&max98095_en>;
pinctrl-names = "default";
};
};
&i2c_8 {
@ -563,6 +489,10 @@
};
};
&i2s0 {
status = "okay";
};
&mmc_0 {
status = "okay";
num-slots = <1>;
@ -587,7 +517,7 @@
pinctrl-names = "default";
pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
bus-width = <4>;
wp-gpios = <&gpc2 1 0>;
wp-gpios = <&gpc2 1 GPIO_ACTIVE_HIGH>;
cap-sd-highspeed;
};
@ -610,12 +540,82 @@
};
&pinctrl_0 {
ec_irq: ec-irq {
samsung,pins = "gpx1-6";
samsung,pin-function = <0>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
max98095_en: max98095-en {
samsung,pins = "gpx1-7";
samsung,pin-function = <0>;
samsung,pin-pud = <3>;
samsung,pin-drv = <0>;
};
tps65090_irq: tps65090-irq {
samsung,pins = "gpx2-6";
samsung,pin-function = <0>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
usb3_vbus_en: usb3-vbus-en {
samsung,pins = "gpx2-7";
samsung,pin-function = <1>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
max77686_irq: max77686-irq {
samsung,pins = "gpx3-2";
samsung,pin-function = <0>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
hdmi_hpd_irq: hdmi-hpd-irq {
samsung,pins = "gpx3-7";
samsung,pin-function = <0>;
samsung,pin-pud = <1>;
samsung,pin-drv = <0>;
};
};
&pinctrl_1 {
arb_their_claim: arb-their-claim {
samsung,pins = "gpe0-4";
samsung,pin-function = <0>;
samsung,pin-pud = <3>;
samsung,pin-drv = <0>;
};
arb_our_claim: arb-our-claim {
samsung,pins = "gpf0-3";
samsung,pin-function = <1>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
};
&rtc {
status = "okay";
clocks = <&clock CLK_RTC>, <&max77686 MAX77686_CLK_AP>;
clock-names = "rtc", "rtc_src";
};
&sd3_bus4 {
samsung,pin-drv = <0>;
};
&sd3_clk {
samsung,pin-drv = <0>;
};
&sd3_cmd {
samsung,pin-pud = <3>;
samsung,pin-drv = <0>;
};
&spi_1 {
@ -628,4 +628,8 @@
dr_mode = "host";
};
&usbdrd_phy {
vbus-supply = <&usb3_vbus_reg>;
};
#include "cros-ec-keyboard.dtsi"

566
arch/arm/boot/dts/exynos5250-spring.dts Normal file
View file

@ -0,0 +1,566 @@
/*
* Google Spring board device tree source
*
* Copyright (c) 2013 Google, Inc
* Copyright (c) 2014 SUSE LINUX Products GmbH
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/input/input.h>
#include "exynos5250.dtsi"
/ {
model = "Google Spring";
compatible = "google,spring", "samsung,exynos5250", "samsung,exynos5";
memory {
reg = <0x40000000 0x80000000>;
};
chosen {
bootargs = "console=tty1";
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&power_key_irq>, <&lid_irq>;
power {
label = "Power";
gpios = <&gpx1 3 GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
gpio-key,wakeup;
};
lid-switch {
label = "Lid";
gpios = <&gpx3 5 GPIO_ACTIVE_LOW>;
linux,input-type = <5>; /* EV_SW */
linux,code = <0>; /* SW_LID */
debounce-interval = <1>;
gpio-key,wakeup;
};
};
usb-hub {
compatible = "smsc,usb3503a";
reset-gpios = <&gpe1 0 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&hsic_reset>;
};
fixed-rate-clocks {
xxti {
compatible = "samsung,clock-xxti";
clock-frequency = <24000000>;
};
};
};
&dp {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&dp_hpd_gpio>;
samsung,color-space = <0>;
samsung,dynamic-range = <0>;
samsung,ycbcr-coeff = <0>;
samsung,color-depth = <1>;
samsung,link-rate = <0x0a>;
samsung,lane-count = <1>;
samsung,hpd-gpio = <&gpc3 0 GPIO_ACTIVE_HIGH>;
};
&ehci {
samsung,vbus-gpio = <&gpx1 1 GPIO_ACTIVE_HIGH>;
};
&fimd {
status = "okay";
samsung,invert-vclk;
};
&hdmi {
hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&hdmi_hpd_irq>;
phy = <&hdmiphy>;
ddc = <&i2c_2>;
hdmi-en-supply = <&ldo8_reg>;
vdd-supply = <&ldo8_reg>;
vdd_osc-supply = <&ldo10_reg>;
vdd_pll-supply = <&ldo8_reg>;
};
&i2c_0 {
status = "okay";
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <378000>;
s5m8767-pmic@66 {
compatible = "samsung,s5m8767-pmic";
reg = <0x66>;
interrupt-parent = <&gpx3>;
interrupts = <2 IRQ_TYPE_NONE>;
pinctrl-names = "default";
pinctrl-0 = <&s5m8767_irq &s5m8767_dvs &s5m8767_ds>;
wakeup-source;
s5m8767,pmic-buck-dvs-gpios = <&gpd1 0 GPIO_ACTIVE_LOW>, /* DVS1 */
<&gpd1 1 GPIO_ACTIVE_LOW>, /* DVS2 */
<&gpd1 2 GPIO_ACTIVE_LOW>; /* DVS3 */
s5m8767,pmic-buck-ds-gpios = <&gpx2 3 GPIO_ACTIVE_LOW>, /* SET1 */
<&gpx2 4 GPIO_ACTIVE_LOW>, /* SET2 */
<&gpx2 5 GPIO_ACTIVE_LOW>; /* SET3 */
/*
* The following arrays of DVS voltages are not used, since we are
* not using GPIOs to control PMIC bucks, but they must be defined
* to please the driver.
*/
s5m8767,pmic-buck2-dvs-voltage = <1350000>, <1300000>,
<1250000>, <1200000>,
<1150000>, <1100000>,
<1000000>, <950000>;
s5m8767,pmic-buck3-dvs-voltage = <1100000>, <1100000>,
<1100000>, <1100000>,
<1000000>, <1000000>,
<1000000>, <1000000>;
s5m8767,pmic-buck4-dvs-voltage = <1200000>, <1200000>,
<1200000>, <1200000>,
<1200000>, <1200000>,
<1200000>, <1200000>;
clocks {
compatible = "samsung,s5m8767-clk";
#clock-cells = <1>;
clock-output-names = "en32khz_ap",
"en32khz_cp",
"en32khz_bt";
};
regulators {
ldo4_reg: LDO4 {
regulator-name = "P1.0V_LDO_OUT4";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
op_mode = <0>;
};
ldo5_reg: LDO5 {
regulator-name = "P1.0V_LDO_OUT5";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
op_mode = <0>;
};
ldo6_reg: LDO6 {
regulator-name = "vdd_mydp";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
op_mode = <3>;
};
ldo7_reg: LDO7 {
regulator-name = "P1.1V_LDO_OUT7";
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-always-on;
op_mode = <3>;
};
ldo8_reg: LDO8 {
regulator-name = "P1.0V_LDO_OUT8";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
op_mode = <3>;
};
ldo10_reg: LDO10 {
regulator-name = "P1.8V_LDO_OUT10";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
op_mode = <3>;
};
ldo11_reg: LDO11 {
regulator-name = "P1.8V_LDO_OUT11";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
op_mode = <0>;
};
ldo12_reg: LDO12 {
regulator-name = "P3.0V_LDO_OUT12";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-always-on;
op_mode = <3>;
};
ldo13_reg: LDO13 {
regulator-name = "P1.8V_LDO_OUT13";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
op_mode = <0>;
};
ldo14_reg: LDO14 {
regulator-name = "P1.8V_LDO_OUT14";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
op_mode = <3>;
};
ldo15_reg: LDO15 {
regulator-name = "P1.0V_LDO_OUT15";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
op_mode = <3>;
};
ldo16_reg: LDO16 {
regulator-name = "P1.8V_LDO_OUT16";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
op_mode = <3>;
};
ldo17_reg: LDO17 {
regulator-name = "P2.8V_LDO_OUT17";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-always-on;
op_mode = <0>;
};
ldo25_reg: LDO25 {
regulator-name = "vdd_bridge";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
op_mode = <1>;
};
buck1_reg: BUCK1 {
regulator-name = "vdd_mif";
regulator-min-microvolt = <950000>;
regulator-max-microvolt = <1300000>;
regulator-always-on;
regulator-boot-on;
op_mode = <3>;
};
buck2_reg: BUCK2 {
regulator-name = "vdd_arm";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
regulator-boot-on;
op_mode = <3>;
};
buck3_reg: BUCK3 {
regulator-name = "vdd_int";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
regulator-boot-on;
op_mode = <3>;
};
buck4_reg: BUCK4 {
regulator-name = "vdd_g3d";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1300000>;
regulator-boot-on;
op_mode = <3>;
};
buck5_reg: BUCK5 {
regulator-name = "P1.8V_BUCK_OUT5";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
op_mode = <1>;
};
buck6_reg: BUCK6 {
regulator-name = "P1.2V_BUCK_OUT6";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
regulator-boot-on;
op_mode = <0>;
};
buck9_reg: BUCK9 {
regulator-name = "vdd_ummc";
regulator-min-microvolt = <950000>;
regulator-max-microvolt = <3000000>;
regulator-always-on;
regulator-boot-on;
op_mode = <3>;
};
};
};
};
&i2c_1 {
status = "okay";
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <378000>;
trackpad@4b {
compatible = "atmel,maxtouch";
reg = <0x4b>;
interrupt-parent = <&gpx1>;
interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
pinctrl-names = "default";
pinctrl-0 = <&trackpad_irq>;
linux,gpio-keymap = <KEY_RESERVED
KEY_RESERVED
KEY_RESERVED
KEY_RESERVED
KEY_RESERVED
BTN_LEFT>;
wakeup-source;
};
};
/*
* Disabled pullups since external part has its own pullups and
* double-pulling gets us out of spec in some cases.
*/
&i2c2_bus {
samsung,pin-pud = <0>;
};
&i2c_2 {
status = "okay";
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <66000>;
hdmiddc@50 {
compatible = "samsung,exynos4210-hdmiddc";
reg = <0x50>;
};
};
&i2c_3 {
status = "okay";
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <66000>;
};
&i2c_4 {
status = "okay";
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <66000>;
cros_ec: embedded-controller {
compatible = "google,cros-ec-i2c";
reg = <0x1e>;
interrupts = <6 IRQ_TYPE_NONE>;
interrupt-parent = <&gpx1>;
wakeup-source;
pinctrl-names = "default";
pinctrl-0 = <&ec_irq>;
};
};
&i2c_5 {
status = "okay";
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <66000>;
};
&i2c_7 {
status = "okay";
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <66000>;
temperature-sensor@4c {
compatible = "gmt,g781";
reg = <0x4c>;
};
};
&i2c_8 {
status = "okay";
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <378000>;
hdmiphy: hdmiphy@38 {
compatible = "samsung,exynos4212-hdmiphy";
reg = <0x38>;
};
};
&i2s0 {
status = "okay";
};
&mfc {
samsung,mfc-r = <0x43000000 0x800000>;
samsung,mfc-l = <0x51000000 0x800000>;
};
&mmc_0 {
status = "okay";
num-slots = <1>;
supports-highspeed;
broken-cd;
card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <2 3>;
samsung,dw-mshc-ddr-timing = <1 2>;
pinctrl-names = "default";
pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_cd &sd0_bus4 &sd0_bus8>;
slot@0 {
reg = <0>;
bus-width = <8>;
};
};
/*
* On Spring we've got SIP WiFi and so can keep drive strengths low to
* reduce EMI.
*/
&mmc_1 {
status = "okay";
num-slots = <1>;
supports-highspeed;
broken-cd;
card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <2 3>;
samsung,dw-mshc-ddr-timing = <1 2>;
pinctrl-names = "default";
pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_cd &sd1_bus4>;
slot@0 {
reg = <0>;
bus-width = <4>;
};
};
&pinctrl_0 {
s5m8767_dvs: s5m8767-dvs {
samsung,pins = "gpd1-0", "gpd1-1", "gpd1-2";
samsung,pin-function = <0>;
samsung,pin-pud = <1>;
samsung,pin-drv = <0>;
};
dp_hpd_gpio: dp-hpd-gpio {
samsung,pins = "gpc3-0";
samsung,pin-function = <0>;
samsung,pin-pud = <3>;
samsung,pin-drv = <0>;
};
trackpad_irq: trackpad-irq {
samsung,pins = "gpx1-2";
samsung,pin-function = <0xf>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
power_key_irq: power-key-irq {
samsung,pins = "gpx1-3";
samsung,pin-function = <0>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
ec_irq: ec-irq {
samsung,pins = "gpx1-6";
samsung,pin-function = <0>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
s5m8767_ds: s5m8767-ds {
samsung,pins = "gpx2-3", "gpx2-4", "gpx2-5";
samsung,pin-function = <0>;
samsung,pin-pud = <1>;
samsung,pin-drv = <0>;
};
s5m8767_irq: s5m8767-irq {
samsung,pins = "gpx3-2";
samsung,pin-function = <0>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
lid_irq: lid-irq {
samsung,pins = "gpx3-5";
samsung,pin-function = <0>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
hdmi_hpd_irq: hdmi-hpd-irq {
samsung,pins = "gpx3-7";
samsung,pin-function = <0>;
samsung,pin-pud = <1>;
samsung,pin-drv = <0>;
};
};
&pinctrl_1 {
hsic_reset: hsic-reset {
samsung,pins = "gpe1-0";
samsung,pin-function = <1>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
};
&sd1_bus4 {
samsung,pin-drv = <0>;
};
&sd1_cd {
samsung,pin-drv = <0>;
};
&sd1_clk {
samsung,pin-drv = <0>;
};
&sd1_cmd {
samsung,pin-pud = <3>;
samsung,pin-drv = <0>;
};
&spi_1 {
status = "okay";
samsung,spi-src-clk = <0>;
num-cs = <1>;
};
#include "cros-ec-keyboard.dtsi"

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