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drm/amdgpu: count fences from all uvd instances in idle handler

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Current multi-UVD hardware uses a single clock and power source
so handle all instances in the idle handler.

Reviewed-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher 2018-05-17 12:33:34 -05:00
parent 652470ac55
commit 6f0fd91947
1 changed files with 5 additions and 1 deletions
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6
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
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@ -1146,7 +1146,11 @@ static void amdgpu_uvd_idle_work_handler(struct work_struct *work)
{ {
struct amdgpu_device *adev = struct amdgpu_device *adev =
container_of(work, struct amdgpu_device, uvd.inst->idle_work.work); container_of(work, struct amdgpu_device, uvd.inst->idle_work.work);
unsigned fences = amdgpu_fence_count_emitted(&adev->uvd.inst->ring); unsigned fences = 0, i;
for (i = 0; i < adev->uvd.num_uvd_inst; ++i) {
fences += amdgpu_fence_count_emitted(&adev->uvd.inst[i].ring);
}
if (fences == 0) { if (fences == 0) {
if (adev->pm.dpm_enabled) { if (adev->pm.dpm_enabled) {