ath9k: Fix AR9285 specific noise floor eeprom reads.
Fix AR9285 specific noise floor reads and initialize tx and rx chainmask during reset. This along with the following earlier patches of ath9k fixes an issue with association noticed in noisy environment. ath9k: Fix typo in chip version check ath9k: Remove unnecessary gpio configuration in ath9k_hw_reset() ath9k: Fix bug in NF calibration Signed-off-by: Senthil Balasubramanian <senthilkumar@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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2 changed files with 42 additions and 41 deletions
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@ -105,27 +105,29 @@ static void ath9k_hw_do_getnf(struct ath_hal *ah,
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"NF calibrated [ctl] [chain 0] is %d\n", nf);
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nfarray[0] = nf;
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if (AR_SREV_9280_10_OR_LATER(ah))
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nf = MS(REG_READ(ah, AR_PHY_CH1_CCA),
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AR9280_PHY_CH1_MINCCA_PWR);
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else
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nf = MS(REG_READ(ah, AR_PHY_CH1_CCA),
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AR_PHY_CH1_MINCCA_PWR);
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if (!AR_SREV_9285(ah)) {
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if (AR_SREV_9280_10_OR_LATER(ah))
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nf = MS(REG_READ(ah, AR_PHY_CH1_CCA),
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AR9280_PHY_CH1_MINCCA_PWR);
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else
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nf = MS(REG_READ(ah, AR_PHY_CH1_CCA),
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AR_PHY_CH1_MINCCA_PWR);
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if (nf & 0x100)
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nf = 0 - ((nf ^ 0x1ff) + 1);
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DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
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"NF calibrated [ctl] [chain 1] is %d\n", nf);
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nfarray[1] = nf;
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if (!AR_SREV_9280(ah)) {
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nf = MS(REG_READ(ah, AR_PHY_CH2_CCA),
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AR_PHY_CH2_MINCCA_PWR);
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if (nf & 0x100)
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nf = 0 - ((nf ^ 0x1ff) + 1);
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DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
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"NF calibrated [ctl] [chain 2] is %d\n", nf);
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nfarray[2] = nf;
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"NF calibrated [ctl] [chain 1] is %d\n", nf);
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nfarray[1] = nf;
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if (!AR_SREV_9280(ah)) {
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nf = MS(REG_READ(ah, AR_PHY_CH2_CCA),
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AR_PHY_CH2_MINCCA_PWR);
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if (nf & 0x100)
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nf = 0 - ((nf ^ 0x1ff) + 1);
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DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
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"NF calibrated [ctl] [chain 2] is %d\n", nf);
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nfarray[2] = nf;
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}
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}
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if (AR_SREV_9280_10_OR_LATER(ah))
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@ -141,27 +143,29 @@ static void ath9k_hw_do_getnf(struct ath_hal *ah,
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"NF calibrated [ext] [chain 0] is %d\n", nf);
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nfarray[3] = nf;
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if (AR_SREV_9280_10_OR_LATER(ah))
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nf = MS(REG_READ(ah, AR_PHY_CH1_EXT_CCA),
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AR9280_PHY_CH1_EXT_MINCCA_PWR);
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else
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nf = MS(REG_READ(ah, AR_PHY_CH1_EXT_CCA),
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AR_PHY_CH1_EXT_MINCCA_PWR);
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if (!AR_SREV_9285(ah)) {
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if (AR_SREV_9280_10_OR_LATER(ah))
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nf = MS(REG_READ(ah, AR_PHY_CH1_EXT_CCA),
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AR9280_PHY_CH1_EXT_MINCCA_PWR);
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else
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nf = MS(REG_READ(ah, AR_PHY_CH1_EXT_CCA),
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AR_PHY_CH1_EXT_MINCCA_PWR);
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if (nf & 0x100)
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nf = 0 - ((nf ^ 0x1ff) + 1);
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DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
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"NF calibrated [ext] [chain 1] is %d\n", nf);
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nfarray[4] = nf;
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if (!AR_SREV_9280(ah)) {
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nf = MS(REG_READ(ah, AR_PHY_CH2_EXT_CCA),
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AR_PHY_CH2_EXT_MINCCA_PWR);
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if (nf & 0x100)
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nf = 0 - ((nf ^ 0x1ff) + 1);
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DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
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"NF calibrated [ext] [chain 2] is %d\n", nf);
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nfarray[5] = nf;
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"NF calibrated [ext] [chain 1] is %d\n", nf);
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nfarray[4] = nf;
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if (!AR_SREV_9280(ah)) {
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nf = MS(REG_READ(ah, AR_PHY_CH2_EXT_CCA),
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AR_PHY_CH2_EXT_MINCCA_PWR);
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if (nf & 0x100)
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nf = 0 - ((nf ^ 0x1ff) + 1);
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DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
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"NF calibrated [ext] [chain 2] is %d\n", nf);
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nfarray[5] = nf;
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}
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}
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}
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@ -668,12 +672,6 @@ int16_t ath9k_hw_getnf(struct ath_hal *ah,
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int16_t nfarray[NUM_NF_READINGS] = { 0 };
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struct ath9k_nfcal_hist *h;
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struct ieee80211_channel *c = chan->chan;
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u8 chainmask;
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if (AR_SREV_9280(ah))
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chainmask = 0x1B;
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else
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chainmask = 0x3F;
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chan->channelFlags &= (~CHANNEL_CW_INT);
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if (REG_READ(ah, AR_PHY_AGC_CONTROL) & AR_PHY_AGC_CONTROL_NF) {
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@ -2165,7 +2165,10 @@ int ath9k_hw_reset(struct ath_hal *ah, struct ath9k_channel *chan,
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ahp->ah_txchainmask = sc->sc_tx_chainmask;
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ahp->ah_rxchainmask = sc->sc_rx_chainmask;
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if (AR_SREV_9280(ah)) {
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if (AR_SREV_9285(ah)) {
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ahp->ah_txchainmask &= 0x1;
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ahp->ah_rxchainmask &= 0x1;
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} else if (AR_SREV_9280(ah)) {
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ahp->ah_txchainmask &= 0x3;
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ahp->ah_rxchainmask &= 0x3;
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}
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