drm/amdgpu: disable MEC2 JT context init for Arcturus
We don't need to handle it like other asics. Signed-off-by: John Clements <john.clements@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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1 changed files with 11 additions and 5 deletions
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@ -1286,11 +1286,17 @@ static int gfx_v9_0_init_cp_compute_microcode(struct amdgpu_device *adev,
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cp_hdr = (const struct gfx_firmware_header_v1_0 *)info->fw->data;
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adev->firmware.fw_size +=
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ALIGN(le32_to_cpu(header->ucode_size_bytes) - le32_to_cpu(cp_hdr->jt_size) * 4, PAGE_SIZE);
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info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CP_MEC2_JT];
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info->ucode_id = AMDGPU_UCODE_ID_CP_MEC2_JT;
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info->fw = adev->gfx.mec2_fw;
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adev->firmware.fw_size +=
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ALIGN(le32_to_cpu(cp_hdr->jt_size) * 4, PAGE_SIZE);
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/* TODO: Determine if MEC2 JT FW loading can be removed
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for all GFX V9 asic and above */
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if (adev->asic_type != CHIP_ARCTURUS) {
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info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CP_MEC2_JT];
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info->ucode_id = AMDGPU_UCODE_ID_CP_MEC2_JT;
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info->fw = adev->gfx.mec2_fw;
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adev->firmware.fw_size +=
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ALIGN(le32_to_cpu(cp_hdr->jt_size) * 4,
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PAGE_SIZE);
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}
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}
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}
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