PCI: designware: Add irq_create_mapping()
Without irq_create_mapping(), the correct IRQ number cannot be provided. In this case, it makes problems such as NULL dereference. Thus, irq_create_mapping() should be added for MSI. Suggested-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Pratyush Anand <pratyush.anand@st.com> Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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73e408508b
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904d0e7889
2 changed files with 14 additions and 13 deletions
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@ -157,7 +157,7 @@ static struct irq_chip dw_msi_irq_chip = {
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void dw_handle_msi_irq(struct pcie_port *pp)
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void dw_handle_msi_irq(struct pcie_port *pp)
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{
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{
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unsigned long val;
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unsigned long val;
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int i, pos;
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int i, pos, irq;
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for (i = 0; i < MAX_MSI_CTRLS; i++) {
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for (i = 0; i < MAX_MSI_CTRLS; i++) {
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dw_pcie_rd_own_conf(pp, PCIE_MSI_INTR0_STATUS + i * 12, 4,
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dw_pcie_rd_own_conf(pp, PCIE_MSI_INTR0_STATUS + i * 12, 4,
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@ -165,8 +165,9 @@ void dw_handle_msi_irq(struct pcie_port *pp)
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if (val) {
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if (val) {
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pos = 0;
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pos = 0;
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while ((pos = find_next_bit(&val, 32, pos)) != 32) {
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while ((pos = find_next_bit(&val, 32, pos)) != 32) {
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generic_handle_irq(pp->msi_irq_start
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irq = irq_find_mapping(pp->irq_domain,
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+ (i * 32) + pos);
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i * 32 + pos);
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generic_handle_irq(irq);
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pos++;
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pos++;
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}
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}
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}
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}
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@ -237,9 +238,8 @@ static int assign_irq(int no_irqs, struct msi_desc *desc, int *pos)
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}
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}
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}
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}
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irq = (pp->msi_irq_start + pos0);
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irq = irq_find_mapping(pp->irq_domain, pos0);
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if (!irq)
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if ((irq + no_irqs) > (pp->msi_irq_start + MAX_MSI_IRQS-1))
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goto no_valid_irq;
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goto no_valid_irq;
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i = 0;
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i = 0;
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@ -270,6 +270,7 @@ static void clear_irq(unsigned int irq)
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struct irq_desc *desc;
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struct irq_desc *desc;
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struct msi_desc *msi;
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struct msi_desc *msi;
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struct pcie_port *pp;
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struct pcie_port *pp;
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struct irq_data *data = irq_get_irq_data(irq);
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/* get the port structure */
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/* get the port structure */
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desc = irq_to_desc(irq);
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desc = irq_to_desc(irq);
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@ -280,7 +281,7 @@ static void clear_irq(unsigned int irq)
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return;
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return;
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}
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}
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pos = irq - pp->msi_irq_start;
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pos = data->hwirq;
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irq_free_desc(irq);
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irq_free_desc(irq);
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@ -371,8 +372,7 @@ int __init dw_pcie_host_init(struct pcie_port *pp)
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struct of_pci_range range;
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struct of_pci_range range;
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struct of_pci_range_parser parser;
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struct of_pci_range_parser parser;
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u32 val;
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u32 val;
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int i;
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struct irq_domain *irq_domain;
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if (of_pci_range_parser_init(&parser, np)) {
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if (of_pci_range_parser_init(&parser, np)) {
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dev_err(pp->dev, "missing ranges property\n");
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dev_err(pp->dev, "missing ranges property\n");
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@ -441,15 +441,16 @@ int __init dw_pcie_host_init(struct pcie_port *pp)
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}
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}
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if (IS_ENABLED(CONFIG_PCI_MSI)) {
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if (IS_ENABLED(CONFIG_PCI_MSI)) {
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irq_domain = irq_domain_add_linear(pp->dev->of_node,
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pp->irq_domain = irq_domain_add_linear(pp->dev->of_node,
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MAX_MSI_IRQS, &msi_domain_ops,
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MAX_MSI_IRQS, &msi_domain_ops,
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&dw_pcie_msi_chip);
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&dw_pcie_msi_chip);
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if (!irq_domain) {
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if (!pp->irq_domain) {
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dev_err(pp->dev, "irq domain init failed\n");
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dev_err(pp->dev, "irq domain init failed\n");
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return -ENXIO;
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return -ENXIO;
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}
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}
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pp->msi_irq_start = irq_find_mapping(irq_domain, 0);
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for (i = 0; i < MAX_MSI_IRQS; i++)
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irq_create_mapping(pp->irq_domain, i);
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}
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}
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if (pp->ops->host_init)
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if (pp->ops->host_init)
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@ -50,7 +50,7 @@ struct pcie_port {
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u32 lanes;
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u32 lanes;
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struct pcie_host_ops *ops;
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struct pcie_host_ops *ops;
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int msi_irq;
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int msi_irq;
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int msi_irq_start;
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struct irq_domain *irq_domain;
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unsigned long msi_data;
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unsigned long msi_data;
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DECLARE_BITMAP(msi_irq_in_use, MAX_MSI_IRQS);
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DECLARE_BITMAP(msi_irq_in_use, MAX_MSI_IRQS);
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};
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};
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