[ARM] 3605/1: AT91RM9200 Power Management
Patch from Andrew Victor This patch adds the core Power Management support for the AT91RM9200 processor. It will support suspend-to-RAM and standby modes. The suspend-to-RAM functionality is not 100% complete. The code that needs to be execute from the internal SRAM to restore the system is outstanding. For now we just fall through to Standby mode. The AT91-specific at91_suspend_entering_slow_clock() function will eventually be replaced by clk_must_disable() once that functionality is added to mainline clock API. Patch from David Brownell. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Andrew Victor
Russell King
parent
6902f523a3
commit
907d6deb62
3 changed files with 237 additions and 0 deletions
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@ -16,3 +16,10 @@ extern struct sys_timer at91rm9200_timer;
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extern void __init at91rm9200_map_io(void);
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extern int __init at91_clock_init(unsigned long main_clock);
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struct device;
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extern void __init at91_clock_associate(const char *id, struct device *dev, const char *func);
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/* Power Management */
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extern void at91_irq_suspend(void);
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extern void at91_irq_resume(void);
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225
arch/arm/mach-at91rm9200/pm.c
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225
arch/arm/mach-at91rm9200/pm.c
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@ -0,0 +1,225 @@
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/*
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* arch/arm/mach-at91rm9200/pm.c
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* AT91 Power Management
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*
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* Copyright (C) 2005 David Brownell
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/pm.h>
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#include <linux/sched.h>
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#include <linux/proc_fs.h>
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#include <linux/pm.h>
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#include <linux/interrupt.h>
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#include <linux/sysfs.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/atomic.h>
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#include <asm/mach/time.h>
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#include <asm/mach/irq.h>
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#include <asm/mach-types.h>
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#include <asm/arch/gpio.h>
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#include "generic.h"
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static int at91_pm_valid_state(suspend_state_t state)
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{
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switch (state) {
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case PM_SUSPEND_ON:
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case PM_SUSPEND_STANDBY:
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case PM_SUSPEND_MEM:
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return 1;
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default:
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return 0;
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}
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}
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static suspend_state_t target_state;
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/*
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* Called after processes are frozen, but before we shutdown devices.
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*/
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static int at91_pm_prepare(suspend_state_t state)
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{
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target_state = state;
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return 0;
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}
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/*
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* Verify that all the clocks are correct before entering
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* slow-clock mode.
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*/
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static int at91_pm_verify_clocks(void)
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{
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unsigned long scsr;
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int i;
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scsr = at91_sys_read(AT91_PMC_SCSR);
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/* USB must not be using PLLB */
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if ((scsr & (AT91_PMC_UHP | AT91_PMC_UDP)) != 0) {
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pr_debug("AT91: PM - Suspend-to-RAM with USB still active\n");
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return 0;
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}
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#ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
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/* PCK0..PCK3 must be disabled, or configured to use clk32k */
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for (i = 0; i < 4; i++) {
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u32 css;
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if ((scsr & (AT91_PMC_PCK0 << i)) == 0)
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continue;
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css = at91_sys_read(AT91_PMC_PCKR(i)) & AT91_PMC_CSS;
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if (css != AT91_PMC_CSS_SLOW) {
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pr_debug("AT91: PM - Suspend-to-RAM with PCK%d src %d\n", i, css);
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return 0;
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}
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}
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#endif
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return 1;
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}
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/*
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* Call this from platform driver suspend() to see how deeply to suspend.
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* For example, some controllers (like OHCI) need one of the PLL clocks
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* in order to act as a wakeup source, and those are not available when
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* going into slow clock mode.
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*
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* REVISIT: generalize as clk_will_be_available(clk)? Other platforms have
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* the very same problem (but not using at91 main_clk), and it'd be better
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* to add one generic API rather than lots of platform-specific ones.
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*/
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int at91_suspend_entering_slow_clock(void)
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{
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return (target_state == PM_SUSPEND_MEM);
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}
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EXPORT_SYMBOL(at91_suspend_entering_slow_clock);
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static void (*slow_clock)(void);
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static int at91_pm_enter(suspend_state_t state)
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{
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at91_gpio_suspend();
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at91_irq_suspend();
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pr_debug("AT91: PM - wake mask %08x, pm state %d\n",
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/* remember all the always-wake irqs */
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(at91_sys_read(AT91_PMC_PCSR)
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| (1 << AT91_ID_FIQ)
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| (1 << AT91_ID_SYS)
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| (1 << AT91_ID_IRQ0)
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| (1 << AT91_ID_IRQ1)
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| (1 << AT91_ID_IRQ2)
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| (1 << AT91_ID_IRQ3)
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| (1 << AT91_ID_IRQ4)
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| (1 << AT91_ID_IRQ5)
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| (1 << AT91_ID_IRQ6))
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& at91_sys_read(AT91_AIC_IMR),
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state);
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switch (state) {
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/*
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* Suspend-to-RAM is like STANDBY plus slow clock mode, so
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* drivers must suspend more deeply: only the master clock
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* controller may be using the main oscillator.
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*/
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case PM_SUSPEND_MEM:
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/*
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* Ensure that clocks are in a valid state.
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*/
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if (!at91_pm_verify_clocks())
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goto error;
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/*
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* Enter slow clock mode by switching over to clk32k and
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* turning off the main oscillator; reverse on wakeup.
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*/
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if (slow_clock) {
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slow_clock();
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break;
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} else {
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/* DEVELOPMENT ONLY */
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pr_info("AT91: PM - no slow clock mode yet ...\n");
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/* FALLTHROUGH leaving master clock alone */
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}
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/*
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* STANDBY mode has *all* drivers suspended; ignores irqs not
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* marked as 'wakeup' event sources; and reduces DRAM power.
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* But otherwise it's identical to PM_SUSPEND_ON: cpu idle, and
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* nothing fancy done with main or cpu clocks.
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*/
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case PM_SUSPEND_STANDBY:
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/*
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* NOTE: the Wait-for-Interrupt instruction needs to be
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* in icache so the SDRAM stays in self-refresh mode until
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* the wakeup IRQ occurs.
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*/
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asm("b 1f; .align 5; 1:");
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asm("mcr p15, 0, r0, c7, c10, 4"); /* drain write buffer */
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at91_sys_write(AT91_SDRAMC_SRR, 1); /* self-refresh mode */
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/* fall though to next state */
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case PM_SUSPEND_ON:
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asm("mcr p15, 0, r0, c7, c0, 4"); /* wait for interrupt */
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break;
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default:
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pr_debug("AT91: PM - bogus suspend state %d\n", state);
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goto error;
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}
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pr_debug("AT91: PM - wakeup %08x\n",
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at91_sys_read(AT91_AIC_IPR) & at91_sys_read(AT91_AIC_IMR));
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error:
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target_state = PM_SUSPEND_ON;
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at91_irq_resume();
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at91_gpio_resume();
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return 0;
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}
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static struct pm_ops at91_pm_ops ={
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.pm_disk_mode = 0,
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.valid = at91_pm_valid_state,
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.prepare = at91_pm_prepare,
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.enter = at91_pm_enter,
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};
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static int __init at91_pm_init(void)
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{
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printk("AT91: Power Management\n");
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#ifdef CONFIG_AT91_PM_SLOW_CLOCK
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/* REVISIT allocations of SRAM should be dynamically managed.
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* FIQ handlers and other components will want SRAM/TCM too...
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*/
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slow_clock = (void *) (AT91_VA_BASE_SRAM + (3 * SZ_4K));
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memcpy(slow_clock, at91rm9200_slow_clock, at91rm9200_slow_clock_sz);
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#endif
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/* Disable SDRAM low-power mode. Cannot be used with self-refresh. */
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at91_sys_write(AT91_SDRAMC_LPR, 0);
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pm_set_ops(&at91_pm_ops);
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return 0;
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}
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arch_initcall(at91_pm_init);
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@ -13,6 +13,8 @@
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#ifndef __ASM_ARCH_AT91RM9200_GPIO_H
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#define __ASM_ARCH_AT91RM9200_GPIO_H
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#include <asm/irq.h>
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#define PIN_BASE NR_AIC_IRQS
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#define PQFP_GPIO_BANKS 3 /* PQFP package has 3 banks */
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@ -188,6 +190,9 @@ extern int at91_set_multi_drive(unsigned pin, int is_on);
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/* callable at any time */
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extern int at91_set_gpio_value(unsigned pin, int value);
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extern int at91_get_gpio_value(unsigned pin);
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extern void at91_gpio_suspend(void);
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extern void at91_gpio_resume(void);
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#endif
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#endif
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