m68knommu: make 5307 UART platform addressing consistent

If we make all UART addressing consistent across all ColdFire family members
then we will be able to remove the duplicated plaform data and use a single
setup for all.

So modify the ColdFire 5307 UART addressing so that:

. UARTs are numbered from 0 up
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
This commit is contained in:
Greg Ungerer 2011-12-24 00:36:03 +10:00
parent 20e681fdfa
commit 909159feb3
2 changed files with 12 additions and 10 deletions

View file

@ -117,11 +117,11 @@
* UART module. * UART module.
*/ */
#if defined(CONFIG_NETtel) || defined(CONFIG_SECUREEDGEMP3) #if defined(CONFIG_NETtel) || defined(CONFIG_SECUREEDGEMP3)
#define MCFUART_BASE1 0x200 /* Base address of UART1 */ #define MCFUART_BASE0 (MCF_MBAR + 0x200) /* Base address UART0 */
#define MCFUART_BASE2 0x1c0 /* Base address of UART2 */ #define MCFUART_BASE1 (MCF_MBAR + 0x1c0) /* Base address UART1 */
#else #else
#define MCFUART_BASE1 0x1c0 /* Base address of UART1 */ #define MCFUART_BASE0 (MCF_MBAR + 0x1c0) /* Base address UART0 */
#define MCFUART_BASE2 0x200 /* Base address of UART2 */ #define MCFUART_BASE1 (MCF_MBAR + 0x200) /* Base address UART1 */
#endif #endif
/* /*
@ -176,6 +176,8 @@
*/ */
#define MCF_IRQ_TIMER 30 /* Timer0, Level 6 */ #define MCF_IRQ_TIMER 30 /* Timer0, Level 6 */
#define MCF_IRQ_PROFILER 31 /* Timer1, Level 7 */ #define MCF_IRQ_PROFILER 31 /* Timer1, Level 7 */
#define MCF_IRQ_UART0 73 /* UART0 */
#define MCF_IRQ_UART1 74 /* UART1 */
/****************************************************************************/ /****************************************************************************/
#endif /* m5307sim_h */ #endif /* m5307sim_h */

View file

@ -31,12 +31,12 @@ unsigned char ledbank = 0xff;
static struct mcf_platform_uart m5307_uart_platform[] = { static struct mcf_platform_uart m5307_uart_platform[] = {
{ {
.mapbase = MCF_MBAR + MCFUART_BASE1, .mapbase = MCFUART_BASE0,
.irq = 73, .irq = MCF_IRQ_UART0,
}, },
{ {
.mapbase = MCF_MBAR + MCFUART_BASE2, .mapbase = MCFUART_BASE1,
.irq = 74, .irq = MCF_IRQ_UART1,
}, },
{ }, { },
}; };
@ -57,11 +57,11 @@ static void __init m5307_uart_init_line(int line, int irq)
{ {
if (line == 0) { if (line == 0) {
writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
writeb(irq, MCF_MBAR + MCFUART_BASE1 + MCFUART_UIVR); writeb(irq, MCFUART_BASE0 + MCFUART_UIVR);
mcf_mapirq2imr(irq, MCFINTC_UART0); mcf_mapirq2imr(irq, MCFINTC_UART0);
} else if (line == 1) { } else if (line == 1) {
writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
writeb(irq, MCF_MBAR + MCFUART_BASE2 + MCFUART_UIVR); writeb(irq, MCFUART_BASE1 + MCFUART_UIVR);
mcf_mapirq2imr(irq, MCFINTC_UART1); mcf_mapirq2imr(irq, MCFINTC_UART1);
} }
} }