PCI updates for v4.3:
Resource management - Revert pci_read_bridge_bases() unification (Bjorn Helgaas) - Clear IORESOURCE_UNSET when clipping a bridge window (Bjorn Helgaas) MSI - Fix MSI IRQ domains for VFs on virtual buses (Alex Williamson) Renesas R-Car host bridge driver - Add R8A7794 support (Sergei Shtylyov) Miscellaneous - Fix devfn for VPD access through function 0 (Alex Williamson) - Use function 0 VPD only for identical functions (Alex Williamson) -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJWBUq2AAoJEFmIoMA60/r8wbwP/0D/+fKEPYJlB6hx1wLHpVk3 K//vEwH0RgA3v2X53QUoHg94gTYhSZLKX0zdAFshbphE0HCZ6AO3UO+/ZJ3cui6J PYvKOnhby2ErNotZqrs3DQIM8rGgl0ZVgoFQrAWEvwiHRHI/r2ArK/oR4PiBjxJT StYuJoTkZIlJyHXza6tvHDcWi+Jc8t8r0HC4Vs32BlaVBQM0SH3CMxHfhJw/Q9xP WHFif1sH0N+p7WDyHH71C1T8POOgXY73BsD2AC0se3lRYZ9SVkOVy9ECGUucx8F6 LDAuFelwRvW2Dr9kh38+5f8Xp155E+eZ6zRWW9/JlrUKVEtHhOFhtrRfDNKHuDCt B9ETrxDiSUFAdQ2weye9BK6aXK0CHF6YP3PCbvK77qFUUsN8csFSKktanKrFAbML CdjkVkEoeLHw+aXzyDg0pSBRZMQ24dTQDh7YqOFZGuEjCLPXOEQ8nitf0IzBB0KI 4QetT/QK3bKkgtVKTwPP+s9f4g+fA/oiwJ21ZTV9hi/9upywTa/umCUvH9Fmb8Fp VZeTzugSht0+ioXpaF/6/KO0Ccp/t5uAHYeuBBMqiHX7ks8DdnfPCwbWNRKkg25O Qy7Y8VnnOtesRCAqBq5y/hHlLUluMkjYpEblYFiD6HBWcjUh6xE6LlIO4mwnjqWI zjB3w7+0GOrvS7dBSx0N =f4c3 -----END PGP SIGNATURE----- Merge tag 'pci-v4.3-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI fixes from Bjorn Helgaas: "These are fixes for things we merged for v4.3 (VPD, MSI, and bridge window management), and a new Renesas R8A7794 SoC device ID. Details: Resource management: - Revert pci_read_bridge_bases() unification (Bjorn Helgaas) - Clear IORESOURCE_UNSET when clipping a bridge window (Bjorn Helgaas) MSI: - Fix MSI IRQ domains for VFs on virtual buses (Alex Williamson) Renesas R-Car host bridge driver: - Add R8A7794 support (Sergei Shtylyov) Miscellaneous: - Fix devfn for VPD access through function 0 (Alex Williamson) - Use function 0 VPD only for identical functions (Alex Williamson)" * tag 'pci-v4.3-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: PCI: rcar: Add R8A7794 support PCI: Use function 0 VPD for identical functions, regular VPD for others PCI: Fix devfn for VPD access through function 0 PCI/MSI: Fix MSI IRQ domains for VFs on virtual buses PCI: Clear IORESOURCE_UNSET when clipping a bridge window PCI: Revert "PCI: Call pci_read_bridge_bases() from core instead of arch code"
This commit is contained in:
commit
966966a630
17 changed files with 80 additions and 43 deletions
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@ -7,7 +7,8 @@ OHCI and EHCI controllers.
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Required properties:
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- compatible: "renesas,pci-r8a7790" for the R8A7790 SoC;
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"renesas,pci-r8a7791" for the R8A7791 SoC.
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"renesas,pci-r8a7791" for the R8A7791 SoC;
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"renesas,pci-r8a7794" for the R8A7794 SoC.
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- reg: A list of physical regions to access the device: the first is
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the operational registers for the OHCI/EHCI controllers and the
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second is for the bridge configuration and control registers.
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@ -242,7 +242,12 @@ pci_restore_srm_config(void)
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void pcibios_fixup_bus(struct pci_bus *bus)
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{
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struct pci_dev *dev;
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struct pci_dev *dev = bus->self;
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if (pci_has_flag(PCI_PROBE_ONLY) && dev &&
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(dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) {
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pci_read_bridge_bases(bus);
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}
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list_for_each_entry(dev, &bus->devices, bus_list) {
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pdev_save_srm_config(dev);
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@ -294,6 +294,8 @@ void pcibios_fixup_bus(struct pci_bus *bus)
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printk("### PCIBIOS_FIXUP_BUS(%d)\n",bus->number);
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#endif
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pci_read_bridge_bases(bus);
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if (bus->number == 0) {
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struct pci_dev *dev;
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list_for_each_entry(dev, &bus->devices, bus_list) {
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@ -533,9 +533,10 @@ void pcibios_fixup_bus(struct pci_bus *b)
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{
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struct pci_dev *dev;
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if (b->self)
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if (b->self) {
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pci_read_bridge_bases(b);
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pcibios_fixup_bridge_resources(b->self);
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}
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list_for_each_entry(dev, &b->devices, bus_list)
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pcibios_fixup_device_resources(dev);
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platform_pci_fixup_bus(b);
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@ -863,7 +863,14 @@ void pcibios_setup_bus_devices(struct pci_bus *bus)
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void pcibios_fixup_bus(struct pci_bus *bus)
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{
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/* Fixup the bus */
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/* When called from the generic PCI probe, read PCI<->PCI bridge
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* bases. This is -not- called when generating the PCI tree from
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* the OF device-tree.
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*/
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if (bus->self != NULL)
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pci_read_bridge_bases(bus);
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/* Now fixup the bus bus */
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pcibios_setup_bus_self(bus);
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/* Now fixup devices on that bus */
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@ -311,6 +311,12 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
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void pcibios_fixup_bus(struct pci_bus *bus)
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{
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struct pci_dev *dev = bus->self;
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if (pci_has_flag(PCI_PROBE_ONLY) && dev &&
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(dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) {
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pci_read_bridge_bases(bus);
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}
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}
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EXPORT_SYMBOL(PCIBIOS_MIN_IO);
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@ -324,6 +324,7 @@ void pcibios_fixup_bus(struct pci_bus *bus)
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struct pci_dev *dev;
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if (bus->self) {
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pci_read_bridge_bases(bus);
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pcibios_fixup_bridge_resources(bus->self);
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}
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@ -1032,7 +1032,13 @@ void pcibios_set_master(struct pci_dev *dev)
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void pcibios_fixup_bus(struct pci_bus *bus)
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{
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/* Fixup the bus */
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/* When called from the generic PCI probe, read PCI<->PCI bridge
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* bases. This is -not- called when generating the PCI tree from
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* the OF device-tree.
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*/
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pci_read_bridge_bases(bus);
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/* Now fixup the bus bus */
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pcibios_setup_bus_self(bus);
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/* Now fixup devices on that bus */
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@ -166,6 +166,7 @@ void pcibios_fixup_bus(struct pci_bus *b)
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{
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struct pci_dev *dev;
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pci_read_bridge_bases(b);
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list_for_each_entry(dev, &b->devices, bus_list)
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pcibios_fixup_device_resources(dev);
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}
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@ -210,6 +210,10 @@ subsys_initcall(pcibios_init);
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void pcibios_fixup_bus(struct pci_bus *bus)
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{
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if (bus->parent) {
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/* This is a subordinate bridge */
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pci_read_bridge_bases(bus);
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}
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}
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void pcibios_set_master(struct pci_dev *dev)
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@ -560,6 +560,9 @@ dino_fixup_bus(struct pci_bus *bus)
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} else if (bus->parent) {
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int i;
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pci_read_bridge_bases(bus);
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for(i = PCI_BRIDGE_RESOURCES; i < PCI_NUM_RESOURCES; i++) {
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if((bus->self->resource[i].flags &
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(IORESOURCE_IO | IORESOURCE_MEM)) == 0)
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@ -693,6 +693,7 @@ lba_fixup_bus(struct pci_bus *bus)
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if (bus->parent) {
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int i;
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/* PCI-PCI Bridge */
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pci_read_bridge_bases(bus);
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for (i = PCI_BRIDGE_RESOURCES; i < PCI_NUM_RESOURCES; i++)
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pci_claim_bridge_resource(bus->self, i);
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} else {
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@ -442,7 +442,8 @@ static const struct pci_vpd_ops pci_vpd_pci22_ops = {
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static ssize_t pci_vpd_f0_read(struct pci_dev *dev, loff_t pos, size_t count,
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void *arg)
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{
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struct pci_dev *tdev = pci_get_slot(dev->bus, PCI_SLOT(dev->devfn));
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struct pci_dev *tdev = pci_get_slot(dev->bus,
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PCI_DEVFN(PCI_SLOT(dev->devfn), 0));
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ssize_t ret;
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if (!tdev)
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@ -456,7 +457,8 @@ static ssize_t pci_vpd_f0_read(struct pci_dev *dev, loff_t pos, size_t count,
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static ssize_t pci_vpd_f0_write(struct pci_dev *dev, loff_t pos, size_t count,
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const void *arg)
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{
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struct pci_dev *tdev = pci_get_slot(dev->bus, PCI_SLOT(dev->devfn));
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struct pci_dev *tdev = pci_get_slot(dev->bus,
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PCI_DEVFN(PCI_SLOT(dev->devfn), 0));
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ssize_t ret;
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if (!tdev)
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@ -473,22 +475,6 @@ static const struct pci_vpd_ops pci_vpd_f0_ops = {
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.release = pci_vpd_pci22_release,
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};
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static int pci_vpd_f0_dev_check(struct pci_dev *dev)
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{
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struct pci_dev *tdev = pci_get_slot(dev->bus, PCI_SLOT(dev->devfn));
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int ret = 0;
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if (!tdev)
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return -ENODEV;
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if (!tdev->vpd || !tdev->multifunction ||
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dev->class != tdev->class || dev->vendor != tdev->vendor ||
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dev->device != tdev->device)
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ret = -ENODEV;
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pci_dev_put(tdev);
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return ret;
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}
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int pci_vpd_pci22_init(struct pci_dev *dev)
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{
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struct pci_vpd_pci22 *vpd;
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cap = pci_find_capability(dev, PCI_CAP_ID_VPD);
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if (!cap)
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return -ENODEV;
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if (dev->dev_flags & PCI_DEV_FLAGS_VPD_REF_F0) {
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int ret = pci_vpd_f0_dev_check(dev);
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if (ret)
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return ret;
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}
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vpd = kzalloc(sizeof(*vpd), GFP_ATOMIC);
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if (!vpd)
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return -ENOMEM;
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@ -256,6 +256,8 @@ bool pci_bus_clip_resource(struct pci_dev *dev, int idx)
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res->start = start;
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res->end = end;
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res->flags &= ~IORESOURCE_UNSET;
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orig_res.flags &= ~IORESOURCE_UNSET;
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dev_printk(KERN_DEBUG, &dev->dev, "%pR clipped to %pR\n",
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&orig_res, res);
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@ -362,6 +362,7 @@ static int rcar_pci_probe(struct platform_device *pdev)
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static struct of_device_id rcar_pci_of_match[] = {
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{ .compatible = "renesas,pci-r8a7790", },
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{ .compatible = "renesas,pci-r8a7791", },
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{ .compatible = "renesas,pci-r8a7794", },
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{ },
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};
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@ -676,15 +676,20 @@ static struct irq_domain *pci_host_bridge_msi_domain(struct pci_bus *bus)
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static void pci_set_bus_msi_domain(struct pci_bus *bus)
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{
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struct irq_domain *d;
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struct pci_bus *b;
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/*
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* Either bus is the root, and we must obtain it from the
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* firmware, or we inherit it from the bridge device.
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* The bus can be a root bus, a subordinate bus, or a virtual bus
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* created by an SR-IOV device. Walk up to the first bridge device
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* found or derive the domain from the host bridge.
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*/
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if (pci_is_root_bus(bus))
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d = pci_host_bridge_msi_domain(bus);
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else
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d = dev_get_msi_domain(&bus->self->dev);
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for (b = bus, d = NULL; !d && !pci_is_root_bus(b); b = b->parent) {
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if (b->self)
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d = dev_get_msi_domain(&b->self->dev);
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}
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if (!d)
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d = pci_host_bridge_msi_domain(b);
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dev_set_msi_domain(&bus->dev, d);
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}
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@ -855,9 +860,6 @@ int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max, int pass)
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child->bridge_ctl = bctl;
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}
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/* Read and initialize bridge resources */
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pci_read_bridge_bases(child);
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cmax = pci_scan_child_bus(child);
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if (cmax > subordinate)
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dev_warn(&dev->dev, "bridge has subordinate %02x but max busn %02x\n",
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if (!is_cardbus) {
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child->bridge_ctl = bctl;
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/* Read and initialize bridge resources */
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pci_read_bridge_bases(child);
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max = pci_scan_child_bus(child);
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} else {
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/*
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@ -1907,11 +1907,27 @@ static void quirk_netmos(struct pci_dev *dev)
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DECLARE_PCI_FIXUP_CLASS_HEADER(PCI_VENDOR_ID_NETMOS, PCI_ANY_ID,
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PCI_CLASS_COMMUNICATION_SERIAL, 8, quirk_netmos);
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/*
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* Quirk non-zero PCI functions to route VPD access through function 0 for
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* devices that share VPD resources between functions. The functions are
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* expected to be identical devices.
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*/
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static void quirk_f0_vpd_link(struct pci_dev *dev)
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{
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if (!dev->multifunction || !PCI_FUNC(dev->devfn))
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struct pci_dev *f0;
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if (!PCI_FUNC(dev->devfn))
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return;
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dev->dev_flags |= PCI_DEV_FLAGS_VPD_REF_F0;
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f0 = pci_get_slot(dev->bus, PCI_DEVFN(PCI_SLOT(dev->devfn), 0));
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if (!f0)
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return;
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if (f0->vpd && dev->class == f0->class &&
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dev->vendor == f0->vendor && dev->device == f0->device)
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dev->dev_flags |= PCI_DEV_FLAGS_VPD_REF_F0;
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pci_dev_put(f0);
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}
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DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_INTEL, PCI_ANY_ID,
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PCI_CLASS_NETWORK_ETHERNET, 8, quirk_f0_vpd_link);
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