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powerpc/perf: increase the perf HW events to 6

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This change is required after the e6500 perf support has been added.
There are 6 counters in e6500 core instead of 4 in e500 core and
the MAX_HWEVENTS counter should be changed accordingly from 4 to 6.
Added also runtime check for counters overflow.

Signed-off-by: Catalin Udma <catalin.udma@freescale.com>
Signed-off-by: Lijun Pan <Lijun.Pan@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
This commit is contained in:
Catalin Udma 2013-06-05 15:22:08 -05:00 committed by Scott Wood
parent a9a5cda069
commit 96c3c9e78f
2 changed files with 7 additions and 1 deletions
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2
arch/powerpc/include/asm/perf_event_fsl_emb.h
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@ -13,7 +13,7 @@
#include <linux/types.h>
#include <asm/hw_irq.h>
#define MAX_HWEVENTS 4
#define MAX_HWEVENTS 6
/* event flags */
#define FSL_EMB_EVENT_VALID 1

6
arch/powerpc/perf/core-fsl-emb.c
View file

@ -462,6 +462,12 @@ static int fsl_emb_pmu_event_init(struct perf_event *event)
int num_restricted;
int i;
if (ppmu->n_counter > MAX_HWEVENTS) {
WARN(1, "No. of perf counters (%d) is higher than max array size(%d)\n",
ppmu->n_counter, MAX_HWEVENTS);
ppmu->n_counter = MAX_HWEVENTS;
}
switch (event->attr.type) {
case PERF_TYPE_HARDWARE:
ev = event->attr.config;