b43: Remove unused phy_a code
gcc-6 reports the following error with -Werror=unused-const-variable. drivers/net/wireless/broadcom/b43/phy_a.c:576:40: error: 'b43_phyops_a' defined but not used Per Michael Büsch: "All a-phy code is usused", so remove it all, and move the remaining Type-G initialization code into phy_g.c. Reported-by: Fengguang Wu <fengguang.wu@intel.com> [0-day test robot] Cc: Michael Büsch <m@bues.ch> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
This commit is contained in:
Guenter Roeck
Kalle Valo
parent
f9f905b00b
commit
9791333a84
5 changed files with 21 additions and 626 deletions
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@ -1,6 +1,6 @@
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b43-y += main.o
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b43-y += bus.o
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b43-$(CONFIG_B43_PHY_G) += phy_a.o phy_g.o tables.o lo.o wa.o
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b43-$(CONFIG_B43_PHY_G) += phy_g.o tables.o lo.o wa.o
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b43-$(CONFIG_B43_PHY_N) += tables_nphy.o
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b43-$(CONFIG_B43_PHY_N) += radio_2055.o
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b43-$(CONFIG_B43_PHY_N) += radio_2056.o
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@ -1,595 +0,0 @@
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/*
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Broadcom B43 wireless driver
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IEEE 802.11a PHY driver
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Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
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Copyright (c) 2005-2007 Stefano Brivio <stefano.brivio@polimi.it>
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Copyright (c) 2005-2008 Michael Buesch <m@bues.ch>
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Copyright (c) 2005, 2006 Danny van Dyk <kugelfang@gentoo.org>
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Copyright (c) 2005, 2006 Andreas Jaggi <andreas.jaggi@waterwave.ch>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; see the file COPYING. If not, write to
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the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
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Boston, MA 02110-1301, USA.
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*/
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#include <linux/slab.h>
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#include "b43.h"
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#include "phy_a.h"
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#include "phy_common.h"
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#include "wa.h"
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#include "tables.h"
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#include "main.h"
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/* Get the freq, as it has to be written to the device. */
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static inline u16 channel2freq_a(u8 channel)
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{
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B43_WARN_ON(channel > 200);
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return (5000 + 5 * channel);
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}
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static inline u16 freq_r3A_value(u16 frequency)
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{
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u16 value;
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if (frequency < 5091)
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value = 0x0040;
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else if (frequency < 5321)
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value = 0x0000;
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else if (frequency < 5806)
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value = 0x0080;
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else
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value = 0x0040;
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return value;
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}
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#if 0
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/* This function converts a TSSI value to dBm in Q5.2 */
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static s8 b43_aphy_estimate_power_out(struct b43_wldev *dev, s8 tssi)
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{
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struct b43_phy *phy = &dev->phy;
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struct b43_phy_a *aphy = phy->a;
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s8 dbm = 0;
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s32 tmp;
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tmp = (aphy->tgt_idle_tssi - aphy->cur_idle_tssi + tssi);
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tmp += 0x80;
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tmp = clamp_val(tmp, 0x00, 0xFF);
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dbm = aphy->tssi2dbm[tmp];
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//TODO: There's a FIXME on the specs
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return dbm;
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}
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#endif
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static void b43_radio_set_tx_iq(struct b43_wldev *dev)
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{
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static const u8 data_high[5] = { 0x00, 0x40, 0x80, 0x90, 0xD0 };
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static const u8 data_low[5] = { 0x00, 0x01, 0x05, 0x06, 0x0A };
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u16 tmp = b43_radio_read16(dev, 0x001E);
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int i, j;
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for (i = 0; i < 5; i++) {
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for (j = 0; j < 5; j++) {
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if (tmp == (data_high[i] << 4 | data_low[j])) {
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b43_phy_write(dev, 0x0069,
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(i - j) << 8 | 0x00C0);
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return;
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}
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}
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}
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}
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static void aphy_channel_switch(struct b43_wldev *dev, unsigned int channel)
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{
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u16 freq, r8, tmp;
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freq = channel2freq_a(channel);
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r8 = b43_radio_read16(dev, 0x0008);
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b43_write16(dev, 0x03F0, freq);
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b43_radio_write16(dev, 0x0008, r8);
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//TODO: write max channel TX power? to Radio 0x2D
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tmp = b43_radio_read16(dev, 0x002E);
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tmp &= 0x0080;
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//TODO: OR tmp with the Power out estimation for this channel?
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b43_radio_write16(dev, 0x002E, tmp);
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if (freq >= 4920 && freq <= 5500) {
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/*
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* r8 = (((freq * 15 * 0xE1FC780F) >> 32) / 29) & 0x0F;
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* = (freq * 0.025862069
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*/
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r8 = 3 * freq / 116; /* is equal to r8 = freq * 0.025862 */
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}
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b43_radio_write16(dev, 0x0007, (r8 << 4) | r8);
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b43_radio_write16(dev, 0x0020, (r8 << 4) | r8);
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b43_radio_write16(dev, 0x0021, (r8 << 4) | r8);
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b43_radio_maskset(dev, 0x0022, 0x000F, (r8 << 4));
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b43_radio_write16(dev, 0x002A, (r8 << 4));
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b43_radio_write16(dev, 0x002B, (r8 << 4));
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b43_radio_maskset(dev, 0x0008, 0x00F0, (r8 << 4));
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b43_radio_maskset(dev, 0x0029, 0xFF0F, 0x00B0);
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b43_radio_write16(dev, 0x0035, 0x00AA);
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b43_radio_write16(dev, 0x0036, 0x0085);
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b43_radio_maskset(dev, 0x003A, 0xFF20, freq_r3A_value(freq));
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b43_radio_mask(dev, 0x003D, 0x00FF);
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b43_radio_maskset(dev, 0x0081, 0xFF7F, 0x0080);
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b43_radio_mask(dev, 0x0035, 0xFFEF);
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b43_radio_maskset(dev, 0x0035, 0xFFEF, 0x0010);
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b43_radio_set_tx_iq(dev);
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//TODO: TSSI2dbm workaround
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//FIXME b43_phy_xmitpower(dev);
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}
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static void b43_radio_init2060(struct b43_wldev *dev)
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{
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b43_radio_write16(dev, 0x0004, 0x00C0);
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b43_radio_write16(dev, 0x0005, 0x0008);
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b43_radio_write16(dev, 0x0009, 0x0040);
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b43_radio_write16(dev, 0x0005, 0x00AA);
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b43_radio_write16(dev, 0x0032, 0x008F);
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b43_radio_write16(dev, 0x0006, 0x008F);
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b43_radio_write16(dev, 0x0034, 0x008F);
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b43_radio_write16(dev, 0x002C, 0x0007);
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b43_radio_write16(dev, 0x0082, 0x0080);
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b43_radio_write16(dev, 0x0080, 0x0000);
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b43_radio_write16(dev, 0x003F, 0x00DA);
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b43_radio_mask(dev, 0x0005, ~0x0008);
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b43_radio_mask(dev, 0x0081, ~0x0010);
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b43_radio_mask(dev, 0x0081, ~0x0020);
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b43_radio_mask(dev, 0x0081, ~0x0020);
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msleep(1); /* delay 400usec */
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b43_radio_maskset(dev, 0x0081, ~0x0020, 0x0010);
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msleep(1); /* delay 400usec */
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b43_radio_maskset(dev, 0x0005, ~0x0008, 0x0008);
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b43_radio_mask(dev, 0x0085, ~0x0010);
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b43_radio_mask(dev, 0x0005, ~0x0008);
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b43_radio_mask(dev, 0x0081, ~0x0040);
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b43_radio_maskset(dev, 0x0081, ~0x0040, 0x0040);
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b43_radio_write16(dev, 0x0005,
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(b43_radio_read16(dev, 0x0081) & ~0x0008) | 0x0008);
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b43_phy_write(dev, 0x0063, 0xDDC6);
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b43_phy_write(dev, 0x0069, 0x07BE);
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b43_phy_write(dev, 0x006A, 0x0000);
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aphy_channel_switch(dev, dev->phy.ops->get_default_chan(dev));
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msleep(1);
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}
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static void b43_phy_rssiagc(struct b43_wldev *dev, u8 enable)
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{
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int i;
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if (dev->phy.rev < 3) {
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if (enable)
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for (i = 0; i < B43_TAB_RSSIAGC1_SIZE; i++) {
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b43_ofdmtab_write16(dev,
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B43_OFDMTAB_LNAHPFGAIN1, i, 0xFFF8);
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b43_ofdmtab_write16(dev,
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B43_OFDMTAB_WRSSI, i, 0xFFF8);
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}
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else
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for (i = 0; i < B43_TAB_RSSIAGC1_SIZE; i++) {
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b43_ofdmtab_write16(dev,
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B43_OFDMTAB_LNAHPFGAIN1, i, b43_tab_rssiagc1[i]);
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b43_ofdmtab_write16(dev,
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B43_OFDMTAB_WRSSI, i, b43_tab_rssiagc1[i]);
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}
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} else {
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if (enable)
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for (i = 0; i < B43_TAB_RSSIAGC1_SIZE; i++)
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b43_ofdmtab_write16(dev,
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B43_OFDMTAB_WRSSI, i, 0x0820);
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else
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for (i = 0; i < B43_TAB_RSSIAGC2_SIZE; i++)
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b43_ofdmtab_write16(dev,
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B43_OFDMTAB_WRSSI, i, b43_tab_rssiagc2[i]);
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}
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}
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static void b43_phy_ww(struct b43_wldev *dev)
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{
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u16 b, curr_s, best_s = 0xFFFF;
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int i;
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b43_phy_mask(dev, B43_PHY_CRS0, ~B43_PHY_CRS0_EN);
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b43_phy_set(dev, B43_PHY_OFDM(0x1B), 0x1000);
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b43_phy_maskset(dev, B43_PHY_OFDM(0x82), 0xF0FF, 0x0300);
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b43_radio_set(dev, 0x0009, 0x0080);
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b43_radio_maskset(dev, 0x0012, 0xFFFC, 0x0002);
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b43_wa_initgains(dev);
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b43_phy_write(dev, B43_PHY_OFDM(0xBA), 0x3ED5);
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b = b43_phy_read(dev, B43_PHY_PWRDOWN);
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b43_phy_write(dev, B43_PHY_PWRDOWN, (b & 0xFFF8) | 0x0005);
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b43_radio_set(dev, 0x0004, 0x0004);
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for (i = 0x10; i <= 0x20; i++) {
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b43_radio_write16(dev, 0x0013, i);
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curr_s = b43_phy_read(dev, B43_PHY_OTABLEQ) & 0x00FF;
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if (!curr_s) {
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best_s = 0x0000;
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break;
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} else if (curr_s >= 0x0080)
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curr_s = 0x0100 - curr_s;
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if (curr_s < best_s)
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best_s = curr_s;
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}
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b43_phy_write(dev, B43_PHY_PWRDOWN, b);
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b43_radio_mask(dev, 0x0004, 0xFFFB);
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b43_radio_write16(dev, 0x0013, best_s);
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b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1_R1, 0, 0xFFEC);
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b43_phy_write(dev, B43_PHY_OFDM(0xB7), 0x1E80);
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b43_phy_write(dev, B43_PHY_OFDM(0xB6), 0x1C00);
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b43_phy_write(dev, B43_PHY_OFDM(0xB5), 0x0EC0);
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b43_phy_write(dev, B43_PHY_OFDM(0xB2), 0x00C0);
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b43_phy_write(dev, B43_PHY_OFDM(0xB9), 0x1FFF);
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b43_phy_maskset(dev, B43_PHY_OFDM(0xBB), 0xF000, 0x0053);
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b43_phy_maskset(dev, B43_PHY_OFDM61, 0xFE1F, 0x0120);
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b43_phy_maskset(dev, B43_PHY_OFDM(0x13), 0x0FFF, 0x3000);
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b43_phy_maskset(dev, B43_PHY_OFDM(0x14), 0x0FFF, 0x3000);
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b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 6, 0x0017);
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for (i = 0; i < 6; i++)
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b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, i, 0x000F);
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b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 0x0D, 0x000E);
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b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 0x0E, 0x0011);
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b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 0x0F, 0x0013);
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b43_phy_write(dev, B43_PHY_OFDM(0x33), 0x5030);
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b43_phy_set(dev, B43_PHY_CRS0, B43_PHY_CRS0_EN);
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}
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static void hardware_pctl_init_aphy(struct b43_wldev *dev)
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{
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//TODO
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}
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void b43_phy_inita(struct b43_wldev *dev)
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{
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struct b43_phy *phy = &dev->phy;
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/* This lowlevel A-PHY init is also called from G-PHY init.
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* So we must not access phy->a, if called from G-PHY code.
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*/
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B43_WARN_ON((phy->type != B43_PHYTYPE_A) &&
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(phy->type != B43_PHYTYPE_G));
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might_sleep();
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if (phy->rev >= 6) {
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if (phy->type == B43_PHYTYPE_A)
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b43_phy_mask(dev, B43_PHY_OFDM(0x1B), ~0x1000);
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if (b43_phy_read(dev, B43_PHY_ENCORE) & B43_PHY_ENCORE_EN)
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b43_phy_set(dev, B43_PHY_ENCORE, 0x0010);
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else
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b43_phy_mask(dev, B43_PHY_ENCORE, ~0x1010);
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}
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b43_wa_all(dev);
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if (phy->type == B43_PHYTYPE_A) {
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if (phy->gmode && (phy->rev < 3))
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b43_phy_set(dev, 0x0034, 0x0001);
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b43_phy_rssiagc(dev, 0);
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b43_phy_set(dev, B43_PHY_CRS0, B43_PHY_CRS0_EN);
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b43_radio_init2060(dev);
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if ((dev->dev->board_vendor == SSB_BOARDVENDOR_BCM) &&
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((dev->dev->board_type == SSB_BOARD_BU4306) ||
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(dev->dev->board_type == SSB_BOARD_BU4309))) {
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; //TODO: A PHY LO
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}
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if (phy->rev >= 3)
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b43_phy_ww(dev);
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hardware_pctl_init_aphy(dev);
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//TODO: radar detection
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}
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if ((phy->type == B43_PHYTYPE_G) &&
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(dev->dev->bus_sprom->boardflags_lo & B43_BFL_PACTRL)) {
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b43_phy_maskset(dev, B43_PHY_OFDM(0x6E), 0xE000, 0x3CF);
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}
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}
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/* Initialise the TSSI->dBm lookup table */
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static int b43_aphy_init_tssi2dbm_table(struct b43_wldev *dev)
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{
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struct b43_phy *phy = &dev->phy;
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struct b43_phy_a *aphy = phy->a;
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s16 pab0, pab1, pab2;
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pab0 = (s16) (dev->dev->bus_sprom->pa1b0);
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pab1 = (s16) (dev->dev->bus_sprom->pa1b1);
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pab2 = (s16) (dev->dev->bus_sprom->pa1b2);
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if (pab0 != 0 && pab1 != 0 && pab2 != 0 &&
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pab0 != -1 && pab1 != -1 && pab2 != -1) {
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/* The pabX values are set in SPROM. Use them. */
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if ((s8) dev->dev->bus_sprom->itssi_a != 0 &&
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(s8) dev->dev->bus_sprom->itssi_a != -1)
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aphy->tgt_idle_tssi =
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(s8) (dev->dev->bus_sprom->itssi_a);
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else
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aphy->tgt_idle_tssi = 62;
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aphy->tssi2dbm = b43_generate_dyn_tssi2dbm_tab(dev, pab0,
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pab1, pab2);
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if (!aphy->tssi2dbm)
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return -ENOMEM;
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} else {
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/* pabX values not set in SPROM,
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* but APHY needs a generated table. */
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aphy->tssi2dbm = NULL;
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b43err(dev->wl, "Could not generate tssi2dBm "
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"table (wrong SPROM info)!\n");
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return -ENODEV;
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}
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return 0;
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}
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static int b43_aphy_op_allocate(struct b43_wldev *dev)
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{
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struct b43_phy_a *aphy;
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int err;
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aphy = kzalloc(sizeof(*aphy), GFP_KERNEL);
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if (!aphy)
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return -ENOMEM;
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dev->phy.a = aphy;
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err = b43_aphy_init_tssi2dbm_table(dev);
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if (err)
|
||||
goto err_free_aphy;
|
||||
|
||||
return 0;
|
||||
|
||||
err_free_aphy:
|
||||
kfree(aphy);
|
||||
dev->phy.a = NULL;
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
static void b43_aphy_op_prepare_structs(struct b43_wldev *dev)
|
||||
{
|
||||
struct b43_phy *phy = &dev->phy;
|
||||
struct b43_phy_a *aphy = phy->a;
|
||||
const void *tssi2dbm;
|
||||
int tgt_idle_tssi;
|
||||
|
||||
/* tssi2dbm table is constant, so it is initialized at alloc time.
|
||||
* Save a copy of the pointer. */
|
||||
tssi2dbm = aphy->tssi2dbm;
|
||||
tgt_idle_tssi = aphy->tgt_idle_tssi;
|
||||
|
||||
/* Zero out the whole PHY structure. */
|
||||
memset(aphy, 0, sizeof(*aphy));
|
||||
|
||||
aphy->tssi2dbm = tssi2dbm;
|
||||
aphy->tgt_idle_tssi = tgt_idle_tssi;
|
||||
|
||||
//TODO init struct b43_phy_a
|
||||
|
||||
}
|
||||
|
||||
static void b43_aphy_op_free(struct b43_wldev *dev)
|
||||
{
|
||||
struct b43_phy *phy = &dev->phy;
|
||||
struct b43_phy_a *aphy = phy->a;
|
||||
|
||||
kfree(aphy->tssi2dbm);
|
||||
aphy->tssi2dbm = NULL;
|
||||
|
||||
kfree(aphy);
|
||||
dev->phy.a = NULL;
|
||||
}
|
||||
|
||||
static int b43_aphy_op_init(struct b43_wldev *dev)
|
||||
{
|
||||
b43_phy_inita(dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline u16 adjust_phyreg(struct b43_wldev *dev, u16 offset)
|
||||
{
|
||||
/* OFDM registers are base-registers for the A-PHY. */
|
||||
if ((offset & B43_PHYROUTE) == B43_PHYROUTE_OFDM_GPHY) {
|
||||
offset &= ~B43_PHYROUTE;
|
||||
offset |= B43_PHYROUTE_BASE;
|
||||
}
|
||||
|
||||
#if B43_DEBUG
|
||||
if ((offset & B43_PHYROUTE) == B43_PHYROUTE_EXT_GPHY) {
|
||||
/* Ext-G registers are only available on G-PHYs */
|
||||
b43err(dev->wl, "Invalid EXT-G PHY access at "
|
||||
"0x%04X on A-PHY\n", offset);
|
||||
dump_stack();
|
||||
}
|
||||
if ((offset & B43_PHYROUTE) == B43_PHYROUTE_N_BMODE) {
|
||||
/* N-BMODE registers are only available on N-PHYs */
|
||||
b43err(dev->wl, "Invalid N-BMODE PHY access at "
|
||||
"0x%04X on A-PHY\n", offset);
|
||||
dump_stack();
|
||||
}
|
||||
#endif /* B43_DEBUG */
|
||||
|
||||
return offset;
|
||||
}
|
||||
|
||||
static u16 b43_aphy_op_read(struct b43_wldev *dev, u16 reg)
|
||||
{
|
||||
reg = adjust_phyreg(dev, reg);
|
||||
b43_write16f(dev, B43_MMIO_PHY_CONTROL, reg);
|
||||
return b43_read16(dev, B43_MMIO_PHY_DATA);
|
||||
}
|
||||
|
||||
static void b43_aphy_op_write(struct b43_wldev *dev, u16 reg, u16 value)
|
||||
{
|
||||
reg = adjust_phyreg(dev, reg);
|
||||
b43_write16f(dev, B43_MMIO_PHY_CONTROL, reg);
|
||||
b43_write16(dev, B43_MMIO_PHY_DATA, value);
|
||||
}
|
||||
|
||||
static u16 b43_aphy_op_radio_read(struct b43_wldev *dev, u16 reg)
|
||||
{
|
||||
/* Register 1 is a 32-bit register. */
|
||||
B43_WARN_ON(reg == 1);
|
||||
/* A-PHY needs 0x40 for read access */
|
||||
reg |= 0x40;
|
||||
|
||||
b43_write16(dev, B43_MMIO_RADIO_CONTROL, reg);
|
||||
return b43_read16(dev, B43_MMIO_RADIO_DATA_LOW);
|
||||
}
|
||||
|
||||
static void b43_aphy_op_radio_write(struct b43_wldev *dev, u16 reg, u16 value)
|
||||
{
|
||||
/* Register 1 is a 32-bit register. */
|
||||
B43_WARN_ON(reg == 1);
|
||||
|
||||
b43_write16(dev, B43_MMIO_RADIO_CONTROL, reg);
|
||||
b43_write16(dev, B43_MMIO_RADIO_DATA_LOW, value);
|
||||
}
|
||||
|
||||
static bool b43_aphy_op_supports_hwpctl(struct b43_wldev *dev)
|
||||
{
|
||||
return (dev->phy.rev >= 5);
|
||||
}
|
||||
|
||||
static void b43_aphy_op_software_rfkill(struct b43_wldev *dev,
|
||||
bool blocked)
|
||||
{
|
||||
struct b43_phy *phy = &dev->phy;
|
||||
|
||||
if (!blocked) {
|
||||
if (phy->radio_on)
|
||||
return;
|
||||
b43_radio_write16(dev, 0x0004, 0x00C0);
|
||||
b43_radio_write16(dev, 0x0005, 0x0008);
|
||||
b43_phy_mask(dev, 0x0010, 0xFFF7);
|
||||
b43_phy_mask(dev, 0x0011, 0xFFF7);
|
||||
b43_radio_init2060(dev);
|
||||
} else {
|
||||
b43_radio_write16(dev, 0x0004, 0x00FF);
|
||||
b43_radio_write16(dev, 0x0005, 0x00FB);
|
||||
b43_phy_set(dev, 0x0010, 0x0008);
|
||||
b43_phy_set(dev, 0x0011, 0x0008);
|
||||
}
|
||||
}
|
||||
|
||||
static int b43_aphy_op_switch_channel(struct b43_wldev *dev,
|
||||
unsigned int new_channel)
|
||||
{
|
||||
if (new_channel > 200)
|
||||
return -EINVAL;
|
||||
aphy_channel_switch(dev, new_channel);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static unsigned int b43_aphy_op_get_default_chan(struct b43_wldev *dev)
|
||||
{
|
||||
return 36; /* Default to channel 36 */
|
||||
}
|
||||
|
||||
static void b43_aphy_op_set_rx_antenna(struct b43_wldev *dev, int antenna)
|
||||
{//TODO
|
||||
struct b43_phy *phy = &dev->phy;
|
||||
u16 tmp;
|
||||
int autodiv = 0;
|
||||
|
||||
if (antenna == B43_ANTENNA_AUTO0 || antenna == B43_ANTENNA_AUTO1)
|
||||
autodiv = 1;
|
||||
|
||||
b43_hf_write(dev, b43_hf_read(dev) & ~B43_HF_ANTDIVHELP);
|
||||
|
||||
b43_phy_maskset(dev, B43_PHY_BBANDCFG, ~B43_PHY_BBANDCFG_RXANT,
|
||||
(autodiv ? B43_ANTENNA_AUTO1 : antenna) <<
|
||||
B43_PHY_BBANDCFG_RXANT_SHIFT);
|
||||
|
||||
if (autodiv) {
|
||||
tmp = b43_phy_read(dev, B43_PHY_ANTDWELL);
|
||||
if (antenna == B43_ANTENNA_AUTO1)
|
||||
tmp &= ~B43_PHY_ANTDWELL_AUTODIV1;
|
||||
else
|
||||
tmp |= B43_PHY_ANTDWELL_AUTODIV1;
|
||||
b43_phy_write(dev, B43_PHY_ANTDWELL, tmp);
|
||||
}
|
||||
if (phy->rev < 3)
|
||||
b43_phy_maskset(dev, B43_PHY_ANTDWELL, 0xFF00, 0x24);
|
||||
else {
|
||||
b43_phy_set(dev, B43_PHY_OFDM61, 0x10);
|
||||
if (phy->rev == 3) {
|
||||
b43_phy_write(dev, B43_PHY_CLIPPWRDOWNT, 0x1D);
|
||||
b43_phy_write(dev, B43_PHY_ADIVRELATED, 8);
|
||||
} else {
|
||||
b43_phy_write(dev, B43_PHY_CLIPPWRDOWNT, 0x3A);
|
||||
b43_phy_maskset(dev, B43_PHY_ADIVRELATED, 0xFF00, 8);
|
||||
}
|
||||
}
|
||||
|
||||
b43_hf_write(dev, b43_hf_read(dev) | B43_HF_ANTDIVHELP);
|
||||
}
|
||||
|
||||
static void b43_aphy_op_adjust_txpower(struct b43_wldev *dev)
|
||||
{//TODO
|
||||
}
|
||||
|
||||
static enum b43_txpwr_result b43_aphy_op_recalc_txpower(struct b43_wldev *dev,
|
||||
bool ignore_tssi)
|
||||
{//TODO
|
||||
return B43_TXPWR_RES_DONE;
|
||||
}
|
||||
|
||||
static void b43_aphy_op_pwork_15sec(struct b43_wldev *dev)
|
||||
{//TODO
|
||||
}
|
||||
|
||||
static void b43_aphy_op_pwork_60sec(struct b43_wldev *dev)
|
||||
{//TODO
|
||||
}
|
||||
|
||||
static const struct b43_phy_operations b43_phyops_a = {
|
||||
.allocate = b43_aphy_op_allocate,
|
||||
.free = b43_aphy_op_free,
|
||||
.prepare_structs = b43_aphy_op_prepare_structs,
|
||||
.init = b43_aphy_op_init,
|
||||
.phy_read = b43_aphy_op_read,
|
||||
.phy_write = b43_aphy_op_write,
|
||||
.radio_read = b43_aphy_op_radio_read,
|
||||
.radio_write = b43_aphy_op_radio_write,
|
||||
.supports_hwpctl = b43_aphy_op_supports_hwpctl,
|
||||
.software_rfkill = b43_aphy_op_software_rfkill,
|
||||
.switch_analog = b43_phyop_switch_analog_generic,
|
||||
.switch_channel = b43_aphy_op_switch_channel,
|
||||
.get_default_chan = b43_aphy_op_get_default_chan,
|
||||
.set_rx_antenna = b43_aphy_op_set_rx_antenna,
|
||||
.recalc_txpower = b43_aphy_op_recalc_txpower,
|
||||
.adjust_txpower = b43_aphy_op_adjust_txpower,
|
||||
.pwork_15sec = b43_aphy_op_pwork_15sec,
|
||||
.pwork_60sec = b43_aphy_op_pwork_60sec,
|
||||
};
|
||||
|
|
@ -101,26 +101,4 @@ u32 b43_ofdmtab_read32(struct b43_wldev *dev, u16 table, u16 offset);
|
|||
void b43_ofdmtab_write32(struct b43_wldev *dev, u16 table,
|
||||
u16 offset, u32 value);
|
||||
|
||||
|
||||
struct b43_phy_a {
|
||||
/* Pointer to the table used to convert a
|
||||
* TSSI value to dBm-Q5.2 */
|
||||
const s8 *tssi2dbm;
|
||||
/* Target idle TSSI */
|
||||
int tgt_idle_tssi;
|
||||
/* Current idle TSSI */
|
||||
int cur_idle_tssi;//FIXME value currently not set
|
||||
|
||||
/* A-PHY TX Power control value. */
|
||||
u16 txpwr_offset;
|
||||
|
||||
//TODO lots of missing stuff
|
||||
};
|
||||
|
||||
/**
|
||||
* b43_phy_inita - Lowlevel A-PHY init routine.
|
||||
* This is _only_ used by the G-PHY code.
|
||||
*/
|
||||
void b43_phy_inita(struct b43_wldev *dev);
|
||||
|
||||
#endif /* LINUX_B43_PHY_A_H_ */
|
||||
|
|
|
|||
|
|
@ -190,7 +190,6 @@ struct b43_phy_operations {
|
|||
void (*pwork_60sec)(struct b43_wldev *dev);
|
||||
};
|
||||
|
||||
struct b43_phy_a;
|
||||
struct b43_phy_g;
|
||||
struct b43_phy_n;
|
||||
struct b43_phy_lp;
|
||||
|
|
@ -210,8 +209,6 @@ struct b43_phy {
|
|||
#else
|
||||
union {
|
||||
#endif
|
||||
/* A-PHY specific information */
|
||||
struct b43_phy_a *a;
|
||||
/* G-PHY specific information */
|
||||
struct b43_phy_g *g;
|
||||
/* N-PHY specific information */
|
||||
|
|
|
|||
|
|
@ -31,6 +31,7 @@
|
|||
#include "phy_common.h"
|
||||
#include "lo.h"
|
||||
#include "main.h"
|
||||
#include "wa.h"
|
||||
|
||||
#include <linux/bitrev.h>
|
||||
#include <linux/slab.h>
|
||||
|
|
@ -1987,6 +1988,25 @@ static void b43_phy_init_pctl(struct b43_wldev *dev)
|
|||
b43_shm_clear_tssi(dev);
|
||||
}
|
||||
|
||||
static void b43_phy_inita(struct b43_wldev *dev)
|
||||
{
|
||||
struct b43_phy *phy = &dev->phy;
|
||||
|
||||
might_sleep();
|
||||
|
||||
if (phy->rev >= 6) {
|
||||
if (b43_phy_read(dev, B43_PHY_ENCORE) & B43_PHY_ENCORE_EN)
|
||||
b43_phy_set(dev, B43_PHY_ENCORE, 0x0010);
|
||||
else
|
||||
b43_phy_mask(dev, B43_PHY_ENCORE, ~0x1010);
|
||||
}
|
||||
|
||||
b43_wa_all(dev);
|
||||
|
||||
if (dev->dev->bus_sprom->boardflags_lo & B43_BFL_PACTRL)
|
||||
b43_phy_maskset(dev, B43_PHY_OFDM(0x6E), 0xE000, 0x3CF);
|
||||
}
|
||||
|
||||
static void b43_phy_initg(struct b43_wldev *dev)
|
||||
{
|
||||
struct b43_phy *phy = &dev->phy;
|
||||
|
|
@ -2150,11 +2170,6 @@ static void default_radio_attenuation(struct b43_wldev *dev,
|
|||
}
|
||||
}
|
||||
|
||||
if (phy->type == B43_PHYTYPE_A) {
|
||||
rf->att = 0x60;
|
||||
return;
|
||||
}
|
||||
|
||||
switch (phy->radio_ver) {
|
||||
case 0x2053:
|
||||
switch (phy->radio_rev) {
|
||||
|
|
|
|||
Loading…
Reference in a new issue