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IB/ipath: Correctly describe workaround for TID write chip bug

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This is a comment change, only, correcting the comment to match the
implemented workaround, rather than the original workaround, and
clarifying why it's needed.

Signed-off-by: Dave Olson <dave.olson@qlogic.com>
Signed-off-by: Roland Dreier <rolandd@cisco.com>
This commit is contained in:
Dave Olson 2007-08-09 15:18:48 -07:00 committed by Roland Dreier
parent 1793b4771d
commit 9ef8617af7
1 changed files with 8 additions and 5 deletions
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13
drivers/infiniband/hw/ipath/ipath_iba6120.c
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@ -1143,11 +1143,14 @@ static void ipath_pe_put_tid(struct ipath_devdata *dd, u64 __iomem *tidptr,
pa |= 2 << 29;
}
/* workaround chip bug 9437 by writing each TID twice
* and holding a spinlock around the writes, so they don't
* intermix with other TID (eager or expected) writes
* Unfortunately, this call can be done from interrupt level
* for the port 0 eager TIDs, so we have to use irqsave
/*
* Workaround chip bug 9437 by writing the scratch register
* before and after the TID, and with an io write barrier.
* We use a spinlock around the writes, so they can't intermix
* with other TID (eager or expected) writes (the chip bug
* is triggered by back to back TID writes). Unfortunately, this
* call can be done from interrupt level for the port 0 eager TIDs,
* so we have to use irqsave locks.
*/
spin_lock_irqsave(&dd->ipath_tid_lock, flags);
ipath_write_kreg(dd, dd->ipath_kregs->kr_scratch, 0xfeeddeaf);