[PATCH] PCI/libata INTx cleanup
Simple cleanup to eliminate X copies of the pci_enable_intx() function in libata. Moved ahci.c's pci_intx() to pci.c and use it throughout libata and msi.c. Signed-off-by: Brett Russ <russb@emc.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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commit
a04ce0ffca
7 changed files with 32 additions and 63 deletions
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@ -439,10 +439,7 @@ static void enable_msi_mode(struct pci_dev *dev, int pos, int type)
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}
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if (pci_find_capability(dev, PCI_CAP_ID_EXP)) {
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/* PCI Express Endpoint device detected */
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u16 cmd;
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pci_read_config_word(dev, PCI_COMMAND, &cmd);
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cmd |= PCI_COMMAND_INTX_DISABLE;
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pci_write_config_word(dev, PCI_COMMAND, cmd);
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pci_intx(dev, 0); /* disable intx */
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}
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}
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@ -461,10 +458,7 @@ void disable_msi_mode(struct pci_dev *dev, int pos, int type)
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}
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if (pci_find_capability(dev, PCI_CAP_ID_EXP)) {
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/* PCI Express Endpoint device detected */
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u16 cmd;
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pci_read_config_word(dev, PCI_COMMAND, &cmd);
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cmd &= ~PCI_COMMAND_INTX_DISABLE;
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pci_write_config_word(dev, PCI_COMMAND, cmd);
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pci_intx(dev, 1); /* enable intx */
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}
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}
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@ -798,6 +798,31 @@ pci_clear_mwi(struct pci_dev *dev)
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}
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}
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/**
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* pci_intx - enables/disables PCI INTx for device dev
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* @dev: the PCI device to operate on
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* @enable: boolean
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*
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* Enables/disables PCI INTx for device dev
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*/
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void
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pci_intx(struct pci_dev *pdev, int enable)
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{
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u16 pci_command, new;
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pci_read_config_word(pdev, PCI_COMMAND, &pci_command);
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if (enable) {
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new = pci_command & ~PCI_COMMAND_INTX_DISABLE;
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} else {
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new = pci_command | PCI_COMMAND_INTX_DISABLE;
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}
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if (new != pci_command) {
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pci_write_config_word(pdev, PCI_COMMAND, pci_command);
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}
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}
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#ifndef HAVE_ARCH_PCI_SET_DMA_MASK
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/*
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* These can be overridden by arch-specific implementations
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@ -875,6 +900,7 @@ EXPORT_SYMBOL(pci_request_region);
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EXPORT_SYMBOL(pci_set_master);
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EXPORT_SYMBOL(pci_set_mwi);
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EXPORT_SYMBOL(pci_clear_mwi);
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EXPORT_SYMBOL_GPL(pci_intx);
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EXPORT_SYMBOL(pci_set_dma_mask);
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EXPORT_SYMBOL(pci_set_consistent_dma_mask);
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EXPORT_SYMBOL(pci_assign_resource);
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@ -865,22 +865,6 @@ static int ahci_host_init(struct ata_probe_ent *probe_ent)
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return 0;
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}
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/* move to PCI layer, integrate w/ MSI stuff */
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static void pci_intx(struct pci_dev *pdev, int enable)
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{
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u16 pci_command, new;
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pci_read_config_word(pdev, PCI_COMMAND, &pci_command);
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if (enable)
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new = pci_command & ~PCI_COMMAND_INTX_DISABLE;
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else
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new = pci_command | PCI_COMMAND_INTX_DISABLE;
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if (new != pci_command)
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pci_write_config_word(pdev, PCI_COMMAND, pci_command);
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}
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static void ahci_print_info(struct ata_probe_ent *probe_ent)
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{
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struct ahci_host_priv *hpriv = probe_ent->private_data;
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@ -568,18 +568,6 @@ static void piix_set_dmamode (struct ata_port *ap, struct ata_device *adev)
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}
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}
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/* move to PCI layer, integrate w/ MSI stuff */
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static void pci_enable_intx(struct pci_dev *pdev)
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{
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u16 pci_command;
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pci_read_config_word(pdev, PCI_COMMAND, &pci_command);
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if (pci_command & PCI_COMMAND_INTX_DISABLE) {
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pci_command &= ~PCI_COMMAND_INTX_DISABLE;
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pci_write_config_word(pdev, PCI_COMMAND, pci_command);
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}
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}
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#define AHCI_PCI_BAR 5
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#define AHCI_GLOBAL_CTL 0x04
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#define AHCI_ENABLE (1 << 31)
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@ -677,7 +665,7 @@ static int piix_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
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* message-signalled interrupts currently).
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*/
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if (port_info[0]->host_flags & PIIX_FLAG_CHECKINTR)
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pci_enable_intx(pdev);
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pci_intx(pdev, 1);
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if (combined) {
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port_info[sata_chan] = &piix_port_info[ent->driver_data];
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@ -233,18 +233,6 @@ static void sis_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val)
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}
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}
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/* move to PCI layer, integrate w/ MSI stuff */
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static void pci_enable_intx(struct pci_dev *pdev)
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{
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u16 pci_command;
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pci_read_config_word(pdev, PCI_COMMAND, &pci_command);
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if (pci_command & PCI_COMMAND_INTX_DISABLE) {
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pci_command &= ~PCI_COMMAND_INTX_DISABLE;
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pci_write_config_word(pdev, PCI_COMMAND, pci_command);
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}
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}
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static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
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{
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struct ata_probe_ent *probe_ent = NULL;
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@ -319,7 +307,7 @@ static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
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}
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pci_set_master(pdev);
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pci_enable_intx(pdev);
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pci_intx(pdev, 1);
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/* FIXME: check ata_device_add return value */
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ata_device_add(probe_ent);
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@ -176,18 +176,6 @@ static void uli_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val)
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uli_scr_cfg_write(ap, sc_reg, val);
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}
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/* move to PCI layer, integrate w/ MSI stuff */
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static void pci_enable_intx(struct pci_dev *pdev)
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{
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u16 pci_command;
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pci_read_config_word(pdev, PCI_COMMAND, &pci_command);
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if (pci_command & PCI_COMMAND_INTX_DISABLE) {
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pci_command &= ~PCI_COMMAND_INTX_DISABLE;
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pci_write_config_word(pdev, PCI_COMMAND, pci_command);
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}
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}
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static int uli_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
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{
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struct ata_probe_ent *probe_ent;
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@ -260,7 +248,7 @@ static int uli_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
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}
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pci_set_master(pdev);
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pci_enable_intx(pdev);
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pci_intx(pdev, 1);
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/* FIXME: check ata_device_add return value */
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ata_device_add(probe_ent);
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@ -383,6 +383,7 @@ void pci_set_master(struct pci_dev *dev);
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#define HAVE_PCI_SET_MWI
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int pci_set_mwi(struct pci_dev *dev);
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void pci_clear_mwi(struct pci_dev *dev);
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void pci_intx(struct pci_dev *dev, int enable);
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int pci_set_dma_mask(struct pci_dev *dev, u64 mask);
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int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask);
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void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno);
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