mxc pwm: add mx25 support
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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6134b2cbb0
commit
a058cbc179
1 changed files with 13 additions and 4 deletions
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@ -32,6 +32,7 @@
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#define MX3_PWMPR 0x10 /* PWM Period Register */
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#define MX3_PWMCR_PRESCALER(x) (((x - 1) & 0xFFF) << 4)
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#define MX3_PWMCR_CLKSRC_IPG_HIGH (2 << 16)
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#define MX3_PWMCR_CLKSRC_IPG (1 << 16)
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#define MX3_PWMCR_EN (1 << 0)
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@ -55,9 +56,11 @@ int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns)
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if (pwm == NULL || period_ns == 0 || duty_ns > period_ns)
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return -EINVAL;
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if (cpu_is_mx27() || cpu_is_mx3()) {
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if (cpu_is_mx27() || cpu_is_mx3() || cpu_is_mx25()) {
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unsigned long long c;
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unsigned long period_cycles, duty_cycles, prescale;
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u32 cr;
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c = clk_get_rate(pwm->clk);
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c = c * period_ns;
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do_div(c, 1000000000);
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@ -72,9 +75,15 @@ int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns)
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writel(duty_cycles, pwm->mmio_base + MX3_PWMSAR);
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writel(period_cycles, pwm->mmio_base + MX3_PWMPR);
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writel(MX3_PWMCR_PRESCALER(prescale) |
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MX3_PWMCR_CLKSRC_IPG_HIGH | MX3_PWMCR_EN,
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pwm->mmio_base + MX3_PWMCR);
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cr = MX3_PWMCR_PRESCALER(prescale) | MX3_PWMCR_EN;
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if (cpu_is_mx25())
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cr |= MX3_PWMCR_CLKSRC_IPG;
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else
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cr |= MX3_PWMCR_CLKSRC_IPG_HIGH;
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writel(cr, pwm->mmio_base + MX3_PWMCR);
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} else if (cpu_is_mx1() || cpu_is_mx21()) {
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/* The PWM subsystem allows for exact frequencies. However,
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* I cannot connect a scope on my device to the PWM line and
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