ixgb: Write RA register high word first, increment version

We need to disable the AV bit before flushing the low register.

Signed-off-by: <aaron.k.salter@intel.com>
Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com>
This commit is contained in:
Aaron Salter 2007-01-06 09:51:41 -08:00 committed by Auke Kok
parent dfd341e4e4
commit a3ffab8758
2 changed files with 3 additions and 2 deletions

View file

@ -399,8 +399,9 @@ ixgb_init_rx_addrs(struct ixgb_hw *hw)
/* Zero out the other 15 receive addresses. */
DEBUGOUT("Clearing RAR[1-15]\n");
for(i = 1; i < IXGB_RAR_ENTRIES; i++) {
IXGB_WRITE_REG_ARRAY(hw, RA, (i << 1), 0);
/* Write high reg first to disable the AV bit first */
IXGB_WRITE_REG_ARRAY(hw, RA, ((i << 1) + 1), 0);
IXGB_WRITE_REG_ARRAY(hw, RA, (i << 1), 0);
}
return;

View file

@ -36,7 +36,7 @@ static char ixgb_driver_string[] = "Intel(R) PRO/10GbE Network Driver";
#else
#define DRIVERNAPI "-NAPI"
#endif
#define DRV_VERSION "1.0.117-k2"DRIVERNAPI
#define DRV_VERSION "1.0.126-k2"DRIVERNAPI
char ixgb_driver_version[] = DRV_VERSION;
static char ixgb_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";