drm/amd/display: add explicit handshake between x86 and DMCU
[why] When DMCU interrupts x86, it leads to undefined phy programming [how] expand dmcu interface to support new PHY lock and unlock commands if DMCU FW doesn't support these commands, they fail silently so its okay Signed-off-by: Jun Lei <Jun.Lei@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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3 changed files with 25 additions and 2 deletions
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@ -58,6 +58,8 @@ void dp_enable_link_phy(
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const struct dc_link_settings *link_settings)
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{
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struct link_encoder *link_enc = link->link_enc;
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struct dc *core_dc = link->ctx->dc;
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struct dmcu *dmcu = core_dc->res_pool->dmcu;
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struct pipe_ctx *pipes =
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link->dc->current_state->res_ctx.pipe_ctx;
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@ -84,6 +86,9 @@ void dp_enable_link_phy(
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}
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}
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if (dmcu != NULL && dmcu->funcs->lock_phy)
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dmcu->funcs->lock_phy(dmcu);
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if (dc_is_dp_sst_signal(signal)) {
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link_enc->funcs->enable_dp_output(
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link_enc,
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@ -95,6 +100,10 @@ void dp_enable_link_phy(
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link_settings,
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clock_source);
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}
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if (dmcu != NULL && dmcu->funcs->unlock_phy)
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dmcu->funcs->unlock_phy(dmcu);
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link->cur_link_settings = *link_settings;
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dp_receiver_power_ctrl(link, true);
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@ -150,15 +159,25 @@ bool edp_receiver_ready_T7(struct dc_link *link)
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void dp_disable_link_phy(struct dc_link *link, enum signal_type signal)
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{
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struct dc *core_dc = link->ctx->dc;
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struct dmcu *dmcu = core_dc->res_pool->dmcu;
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if (!link->wa_flags.dp_keep_receiver_powered)
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dp_receiver_power_ctrl(link, false);
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if (signal == SIGNAL_TYPE_EDP) {
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link->link_enc->funcs->disable_output(link->link_enc, signal);
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link->dc->hwss.edp_power_control(link, false);
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} else
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} else {
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if (dmcu != NULL && dmcu->funcs->lock_phy)
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dmcu->funcs->lock_phy(dmcu);
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link->link_enc->funcs->disable_output(link->link_enc, signal);
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if (dmcu != NULL && dmcu->funcs->unlock_phy)
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dmcu->funcs->unlock_phy(dmcu);
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}
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/* Clear current link setting.*/
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memset(&link->cur_link_settings, 0,
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sizeof(link->cur_link_settings));
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@ -51,6 +51,8 @@
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#define PSR_SET_WAITLOOP 0x31
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#define MCP_INIT_DMCU 0x88
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#define MCP_INIT_IRAM 0x89
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#define MCP_SYNC_PHY_LOCK 0x90
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#define MCP_SYNC_PHY_UNLOCK 0x91
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#define MCP_BL_SET_PWM_FRAC 0x6A /* Enable or disable Fractional PWM */
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#define MASTER_COMM_CNTL_REG__MASTER_COMM_INTERRUPT_MASK 0x00000001L
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@ -719,7 +721,7 @@ static bool dcn10_is_dmcu_initialized(struct dmcu *dmcu)
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return true;
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}
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#endif
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#endif //(CONFIG_DRM_AMD_DC_DCN1_0)
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static const struct dmcu_funcs dce_funcs = {
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.dmcu_init = dce_dmcu_init,
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@ -70,6 +70,8 @@ struct dmcu_funcs {
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void (*get_psr_wait_loop)(struct dmcu *dmcu,
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unsigned int *psr_wait_loop_number);
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bool (*is_dmcu_initialized)(struct dmcu *dmcu);
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bool (*lock_phy)(struct dmcu *dmcu);
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bool (*unlock_phy)(struct dmcu *dmcu);
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};
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#endif
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