m68knommu: factor more common ColdFire cpu reset code
Most of the more modern ColdFire cores use the same code to reset the CPU (but it is different to most of the earlier cores). Currently that is duplicated in each of the sub-arch files. Pull out this common code and out a single copy of it with the other common reset code. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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645e5333ec
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ae909ea4ad
7 changed files with 23 additions and 51 deletions
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@ -74,17 +74,8 @@ static void __init m520x_fec_init(void)
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/***************************************************************************/
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static void m520x_cpu_reset(void)
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{
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local_irq_disable();
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__raw_writeb(MCF_RCR_SWRESET, MCF_RCR);
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}
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/***************************************************************************/
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void __init config_BSP(char *commandp, int size)
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{
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mach_reset = m520x_cpu_reset;
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mach_sched_init = hw_timer_init;
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m520x_uarts_init();
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m520x_fec_init();
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@ -54,17 +54,8 @@ static void __init m523x_fec_init(void)
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/***************************************************************************/
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static void m523x_cpu_reset(void)
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{
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local_irq_disable();
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__raw_writeb(MCF_RCR_SWRESET, MCF_RCR);
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}
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/***************************************************************************/
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void __init config_BSP(char *commandp, int size)
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{
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mach_reset = m523x_cpu_reset;
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mach_sched_init = hw_timer_init;
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m523x_fec_init();
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#ifdef CONFIG_SPI_COLDFIRE_QSPI
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@ -87,17 +87,8 @@ static void __init m527x_fec_init(void)
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/***************************************************************************/
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static void m527x_cpu_reset(void)
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{
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local_irq_disable();
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__raw_writeb(MCF_RCR_SWRESET, MCF_RCR);
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}
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/***************************************************************************/
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void __init config_BSP(char *commandp, int size)
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{
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mach_reset = m527x_cpu_reset;
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mach_sched_init = hw_timer_init;
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m527x_uarts_init();
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m527x_fec_init();
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@ -60,14 +60,6 @@ static void __init m528x_fec_init(void)
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/***************************************************************************/
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static void m528x_cpu_reset(void)
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{
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local_irq_disable();
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__raw_writeb(MCF_RCR_SWRESET, MCF_RCR);
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}
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/***************************************************************************/
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#ifdef CONFIG_WILDFIRE
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void wildfire_halt(void)
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{
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@ -103,7 +95,6 @@ void __init config_BSP(char *commandp, int size)
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#ifdef CONFIG_WILDFIREMOD
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mach_halt = wildfiremod_halt;
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#endif
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mach_reset = m528x_cpu_reset;
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mach_sched_init = hw_timer_init;
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m528x_uarts_init();
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m528x_fec_init();
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@ -61,14 +61,6 @@ static void __init m532x_fec_init(void)
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/***************************************************************************/
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static void m532x_cpu_reset(void)
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{
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local_irq_disable();
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__raw_writeb(MCF_RCR_SWRESET, MCF_RCR);
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}
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/***************************************************************************/
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void __init config_BSP(char *commandp, int size)
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{
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#if !defined(CONFIG_BOOTPARAM)
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@ -83,7 +75,6 @@ void __init config_BSP(char *commandp, int size)
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#endif
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mach_sched_init = hw_timer_init;
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mach_reset = m532x_cpu_reset;
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m532x_uarts_init();
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m532x_fec_init();
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#ifdef CONFIG_SPI_COLDFIRE_QSPI
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@ -17,14 +17,14 @@ asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
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obj-$(CONFIG_COLDFIRE) += cache.o clk.o device.o dma.o entry.o vectors.o
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obj-$(CONFIG_M5206) += timers.o intc.o reset.o
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obj-$(CONFIG_M5206e) += timers.o intc.o reset.o
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obj-$(CONFIG_M520x) += pit.o intc-simr.o
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obj-$(CONFIG_M523x) += pit.o dma_timer.o intc-2.o
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obj-$(CONFIG_M520x) += pit.o intc-simr.o reset.o
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obj-$(CONFIG_M523x) += pit.o dma_timer.o intc-2.o reset.o
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obj-$(CONFIG_M5249) += timers.o intc.o reset.o
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obj-$(CONFIG_M527x) += pit.o intc-2.o
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obj-$(CONFIG_M527x) += pit.o intc-2.o reset.o
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obj-$(CONFIG_M5272) += timers.o
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obj-$(CONFIG_M528x) += pit.o intc-2.o
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obj-$(CONFIG_M528x) += pit.o intc-2.o reset.o
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obj-$(CONFIG_M5307) += timers.o intc.o reset.o
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obj-$(CONFIG_M532x) += timers.o intc-simr.o
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obj-$(CONFIG_M532x) += timers.o intc-simr.o reset.o
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obj-$(CONFIG_M5407) += timers.o intc.o reset.o
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obj-$(CONFIG_M54xx) += sltimers.o intc-2.o
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@ -15,7 +15,15 @@
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#include <asm/coldfire.h>
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#include <asm/mcfsim.h>
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void mcf_cpu_reset(void)
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/*
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* There are 2 common methods amongst the ColdFure parts for reseting
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* the CPU. But there are couple of exceptions, the 5272 and the 547x
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* have something completely special to them, and we let their specific
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* subarch code handle them.
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*/
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#ifdef MCFSIM_SYPCR
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static void mcf_cpu_reset(void)
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{
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local_irq_disable();
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/* Set watchdog to soft reset, and enabled */
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@ -23,6 +31,15 @@ void mcf_cpu_reset(void)
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for (;;)
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/* wait for watchdog to timeout */;
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}
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#endif
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#ifdef MCF_RCR
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static void mcf_cpu_reset(void)
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{
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local_irq_disable();
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__raw_writeb(MCF_RCR_SWRESET, MCF_RCR);
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}
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#endif
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static int __init mcf_setup_reset(void)
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{
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