Merge branch 'Peer-to-Peer-One-Step-time-stamping'

Richard Cochran says:

====================
Peer to Peer One-Step time stamping

This series adds support for PTP (IEEE 1588) P2P one-step time
stamping along with a driver for a hardware device that supports this.

If the hardware supports p2p one-step, it subtracts the ingress time
stamp value from the Pdelay_Request correction field.  The user space
software stack then simply copies the correction field into the
Pdelay_Response, and on transmission the hardware adds the egress time
stamp into the correction field.

This new functionality extends CONFIG_NETWORK_PHY_TIMESTAMPING to
cover MII snooping devices, but it still depends on phylib, just as
that option does.  Expanding beyond phylib is not within the scope of
the this series.

User space support is available in the current linuxptp master branch.

- Patch 1 adds phy_device methods for existing time stamping fields.
- Patches 2-5 convert the stack and drivers to the new methods.
- Patch 6 moves code around the dp83640 driver.
- Patches 7-10 add support for MII time stamping in non-PHY devices.
- Patch 11 adds the new P2P 1-step option.
- Patch 12 adds a driver implementing the new option.

Thanks,
Richard

Changed in v9:
~~~~~~~~~~~~~~

- Fix two more drivers' switch/case blocks WRT the new HWTSTAMP ioctl.
- Picked up two more review tags from Andrew.

Changed in v8:
~~~~~~~~~~~~~~

- Avoided adding forward functional declarations in the dp83640 driver.
- Picked up Florian's new review tags and another one from Andrew.

Changed in v7:
~~~~~~~~~~~~~~

- Converted pr_debug|err to dev_ variants in new driver.
- Fixed device tree documentation per Rob's v6 review.
- Picked up Andrew's and Rob's review tags.
- Silenced sparse warnings in new driver.

Changed in v6:
~~~~~~~~~~~~~~

- Added methods for accessing the phy_device time stamping fields.
- Adjust the device tree documentation per Rob's v5 review.
- Fixed the build failures due to missing exports.

Changed in v5:
~~~~~~~~~~~~~~

- Fixed build failure in macvlan.
- Fixed latent bug with its gcc warning in the driver.

Changed in v4:
~~~~~~~~~~~~~~

- Correct error paths and PTR_ERR return values in the framework.
- Expanded KernelDoc comments WRT PHY locking.
- Pick up Andrew's review tag.

Changed in v3:
~~~~~~~~~~~~~~

- Simplify the device tree binding and document the time stamping
  phandle by itself.

Changed in v2:
~~~~~~~~~~~~~~

- Per the v1 review, changed the modeling of MII time stamping
  devices.  They are no longer a kind of mdio device.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller 2019-12-25 19:51:34 -08:00
commit aea3dee86c
25 changed files with 1437 additions and 154 deletions

View file

@ -0,0 +1,35 @@
ZHAW InES PTP time stamping IP core
The IP core needs two different kinds of nodes. The control node
lives somewhere in the memory map and specifies the address of the
control registers. There can be up to three port handles placed as
attributes of PHY nodes. These associate a particular MII bus with a
port index within the IP core.
Required properties of the control node:
- compatible: "ines,ptp-ctrl"
- reg: physical address and size of the register bank
Required format of the port handle within the PHY node:
- timestamper: provides control node reference and
the port channel within the IP core
Example:
tstamper: timestamper@60000000 {
compatible = "ines,ptp-ctrl";
reg = <0x60000000 0x80>;
};
ethernet@80000000 {
...
mdio {
...
ethernet-phy@3 {
...
timestamper = <&tstamper 0>;
};
};
};

View file

@ -0,0 +1,42 @@
Time stamps from MII bus snooping devices
This binding supports non-PHY devices that snoop the MII bus and
provide time stamps. In contrast to PHY time stamping drivers (which
can simply attach their interface directly to the PHY instance), stand
alone MII time stamping drivers use this binding to specify the
connection between the snooping device and a given network interface.
Non-PHY MII time stamping drivers typically talk to the control
interface over another bus like I2C, SPI, UART, or via a memory mapped
peripheral. This controller device is associated with one or more
time stamping channels, each of which snoops on a MII bus.
The "timestamper" property lives in a phy node and links a time
stamping channel from the controller device to that phy's MII bus.
Example:
tstamper: timestamper@10000000 {
compatible = "ines,ptp-ctrl";
reg = <0x10000000 0x80>;
};
ethernet@20000000 {
mdio {
ethernet-phy@1 {
timestamper = <&tstamper 0>;
};
};
};
ethernet@30000000 {
mdio {
ethernet-phy@2 {
timestamper = <&tstamper 1>;
};
};
};
In this example, time stamps from the MII bus attached to phy@1 will
appear on time stamp channel 0 (zero), and those from phy@2 appear on
channel 1.

View file

@ -15410,6 +15410,7 @@ int bnx2x_configure_ptp_filters(struct bnx2x *bp)
REG_WR(bp, rule, BNX2X_PTP_TX_ON_RULE_MASK);
break;
case HWTSTAMP_TX_ONESTEP_SYNC:
case HWTSTAMP_TX_ONESTEP_P2P:
BNX2X_ERR("One-step timestamping is not supported\n");
return -ERANGE;
}

View file

@ -920,6 +920,7 @@ static int mlxsw_sp_ptp_get_message_types(const struct hwtstamp_config *config,
egr_types = 0xff;
break;
case HWTSTAMP_TX_ONESTEP_SYNC:
case HWTSTAMP_TX_ONESTEP_P2P:
return -ERANGE;
}

View file

@ -1265,6 +1265,9 @@ int lan743x_ptp_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
lan743x_ptp_set_sync_ts_insert(adapter, true);
break;
case HWTSTAMP_TX_ONESTEP_P2P:
ret = -ERANGE;
break;
default:
netif_warn(adapter, drv, adapter->netdev,
" tx_type = %d, UNKNOWN\n", config.tx_type);

View file

@ -247,6 +247,7 @@ static int qede_ptp_cfg_filters(struct qede_dev *edev)
break;
case HWTSTAMP_TX_ONESTEP_SYNC:
case HWTSTAMP_TX_ONESTEP_P2P:
DP_ERR(edev, "One-step timestamping is not supported\n");
return -ERANGE;
}

View file

@ -2533,8 +2533,6 @@ static int gbe_del_vid(void *intf_priv, int vid)
}
#if IS_ENABLED(CONFIG_TI_CPTS)
#define HAS_PHY_TXTSTAMP(p) ((p)->drv && (p)->drv->txtstamp)
#define HAS_PHY_RXTSTAMP(p) ((p)->drv && (p)->drv->rxtstamp)
static void gbe_txtstamp(void *context, struct sk_buff *skb)
{
@ -2566,7 +2564,7 @@ static int gbe_txtstamp_mark_pkt(struct gbe_intf *gbe_intf,
* We mark it here because skb_tx_timestamp() is called
* after all the txhooks are called.
*/
if (phydev && HAS_PHY_TXTSTAMP(phydev)) {
if (phy_has_txtstamp(phydev)) {
skb_shinfo(p_info->skb)->tx_flags |= SKBTX_IN_PROGRESS;
return 0;
}
@ -2588,7 +2586,7 @@ static int gbe_rxtstamp(struct gbe_intf *gbe_intf, struct netcp_packet *p_info)
if (p_info->rxtstamp_complete)
return 0;
if (phydev && HAS_PHY_RXTSTAMP(phydev)) {
if (phy_has_rxtstamp(phydev)) {
p_info->rxtstamp_complete = true;
return 0;
}
@ -2830,7 +2828,7 @@ static int gbe_ioctl(void *intf_priv, struct ifreq *req, int cmd)
struct gbe_intf *gbe_intf = intf_priv;
struct phy_device *phy = gbe_intf->slave->phy;
if (!phy || !phy->drv->hwtstamp) {
if (!phy_has_hwtstamp(phy)) {
switch (cmd) {
case SIOCGHWTSTAMP:
return gbe_hwtstamp_get(gbe_intf, req);

View file

@ -1036,8 +1036,8 @@ static int macvlan_ethtool_get_ts_info(struct net_device *dev,
const struct ethtool_ops *ops = real_dev->ethtool_ops;
struct phy_device *phydev = real_dev->phydev;
if (phydev && phydev->drv && phydev->drv->ts_info) {
return phydev->drv->ts_info(phydev, info);
if (phy_has_tsinfo(phydev)) {
return phy_ts_info(phydev, info);
} else if (ops->get_ts_info) {
return ops->get_ts_info(real_dev, info);
} else {

View file

@ -43,6 +43,8 @@ obj-$(CONFIG_MDIO_SUN4I) += mdio-sun4i.o
obj-$(CONFIG_MDIO_THUNDER) += mdio-thunder.o
obj-$(CONFIG_MDIO_XGENE) += mdio-xgene.o
obj-$(CONFIG_NETWORK_PHY_TIMESTAMPING) += mii_timestamper.o
obj-$(CONFIG_SFP) += sfp.o
sfp-obj-$(CONFIG_SFP) += sfp-bus.o
obj-y += $(sfp-obj-y) $(sfp-obj-m)

View file

@ -98,6 +98,7 @@ struct dp83640_private {
struct list_head list;
struct dp83640_clock *clock;
struct phy_device *phydev;
struct mii_timestamper mii_ts;
struct delayed_work ts_work;
int hwts_tx_en;
int hwts_rx_en;
@ -1131,96 +1132,6 @@ static void dp83640_clock_put(struct dp83640_clock *clock)
mutex_unlock(&clock->clock_lock);
}
static int dp83640_probe(struct phy_device *phydev)
{
struct dp83640_clock *clock;
struct dp83640_private *dp83640;
int err = -ENOMEM, i;
if (phydev->mdio.addr == BROADCAST_ADDR)
return 0;
clock = dp83640_clock_get_bus(phydev->mdio.bus);
if (!clock)
goto no_clock;
dp83640 = kzalloc(sizeof(struct dp83640_private), GFP_KERNEL);
if (!dp83640)
goto no_memory;
dp83640->phydev = phydev;
INIT_DELAYED_WORK(&dp83640->ts_work, rx_timestamp_work);
INIT_LIST_HEAD(&dp83640->rxts);
INIT_LIST_HEAD(&dp83640->rxpool);
for (i = 0; i < MAX_RXTS; i++)
list_add(&dp83640->rx_pool_data[i].list, &dp83640->rxpool);
phydev->priv = dp83640;
spin_lock_init(&dp83640->rx_lock);
skb_queue_head_init(&dp83640->rx_queue);
skb_queue_head_init(&dp83640->tx_queue);
dp83640->clock = clock;
if (choose_this_phy(clock, phydev)) {
clock->chosen = dp83640;
clock->ptp_clock = ptp_clock_register(&clock->caps,
&phydev->mdio.dev);
if (IS_ERR(clock->ptp_clock)) {
err = PTR_ERR(clock->ptp_clock);
goto no_register;
}
} else
list_add_tail(&dp83640->list, &clock->phylist);
dp83640_clock_put(clock);
return 0;
no_register:
clock->chosen = NULL;
kfree(dp83640);
no_memory:
dp83640_clock_put(clock);
no_clock:
return err;
}
static void dp83640_remove(struct phy_device *phydev)
{
struct dp83640_clock *clock;
struct list_head *this, *next;
struct dp83640_private *tmp, *dp83640 = phydev->priv;
if (phydev->mdio.addr == BROADCAST_ADDR)
return;
enable_status_frames(phydev, false);
cancel_delayed_work_sync(&dp83640->ts_work);
skb_queue_purge(&dp83640->rx_queue);
skb_queue_purge(&dp83640->tx_queue);
clock = dp83640_clock_get(dp83640->clock);
if (dp83640 == clock->chosen) {
ptp_clock_unregister(clock->ptp_clock);
clock->chosen = NULL;
} else {
list_for_each_safe(this, next, &clock->phylist) {
tmp = list_entry(this, struct dp83640_private, list);
if (tmp == dp83640) {
list_del_init(&tmp->list);
break;
}
}
}
dp83640_clock_put(clock);
kfree(dp83640);
}
static int dp83640_soft_reset(struct phy_device *phydev)
{
int ret;
@ -1319,9 +1230,10 @@ static int dp83640_config_intr(struct phy_device *phydev)
}
}
static int dp83640_hwtstamp(struct phy_device *phydev, struct ifreq *ifr)
static int dp83640_hwtstamp(struct mii_timestamper *mii_ts, struct ifreq *ifr)
{
struct dp83640_private *dp83640 = phydev->priv;
struct dp83640_private *dp83640 =
container_of(mii_ts, struct dp83640_private, mii_ts);
struct hwtstamp_config cfg;
u16 txcfg0, rxcfg0;
@ -1397,8 +1309,8 @@ static int dp83640_hwtstamp(struct phy_device *phydev, struct ifreq *ifr)
mutex_lock(&dp83640->clock->extreg_lock);
ext_write(0, phydev, PAGE5, PTP_TXCFG0, txcfg0);
ext_write(0, phydev, PAGE5, PTP_RXCFG0, rxcfg0);
ext_write(0, dp83640->phydev, PAGE5, PTP_TXCFG0, txcfg0);
ext_write(0, dp83640->phydev, PAGE5, PTP_RXCFG0, rxcfg0);
mutex_unlock(&dp83640->clock->extreg_lock);
@ -1428,10 +1340,11 @@ static void rx_timestamp_work(struct work_struct *work)
schedule_delayed_work(&dp83640->ts_work, SKB_TIMESTAMP_TIMEOUT);
}
static bool dp83640_rxtstamp(struct phy_device *phydev,
static bool dp83640_rxtstamp(struct mii_timestamper *mii_ts,
struct sk_buff *skb, int type)
{
struct dp83640_private *dp83640 = phydev->priv;
struct dp83640_private *dp83640 =
container_of(mii_ts, struct dp83640_private, mii_ts);
struct dp83640_skb_info *skb_info = (struct dp83640_skb_info *)skb->cb;
struct list_head *this, *next;
struct rxts *rxts;
@ -1477,11 +1390,12 @@ static bool dp83640_rxtstamp(struct phy_device *phydev,
return true;
}
static void dp83640_txtstamp(struct phy_device *phydev,
static void dp83640_txtstamp(struct mii_timestamper *mii_ts,
struct sk_buff *skb, int type)
{
struct dp83640_skb_info *skb_info = (struct dp83640_skb_info *)skb->cb;
struct dp83640_private *dp83640 = phydev->priv;
struct dp83640_private *dp83640 =
container_of(mii_ts, struct dp83640_private, mii_ts);
switch (dp83640->hwts_tx_en) {
@ -1504,9 +1418,11 @@ static void dp83640_txtstamp(struct phy_device *phydev,
}
}
static int dp83640_ts_info(struct phy_device *dev, struct ethtool_ts_info *info)
static int dp83640_ts_info(struct mii_timestamper *mii_ts,
struct ethtool_ts_info *info)
{
struct dp83640_private *dp83640 = dev->priv;
struct dp83640_private *dp83640 =
container_of(mii_ts, struct dp83640_private, mii_ts);
info->so_timestamping =
SOF_TIMESTAMPING_TX_HARDWARE |
@ -1526,6 +1442,103 @@ static int dp83640_ts_info(struct phy_device *dev, struct ethtool_ts_info *info)
return 0;
}
static int dp83640_probe(struct phy_device *phydev)
{
struct dp83640_clock *clock;
struct dp83640_private *dp83640;
int err = -ENOMEM, i;
if (phydev->mdio.addr == BROADCAST_ADDR)
return 0;
clock = dp83640_clock_get_bus(phydev->mdio.bus);
if (!clock)
goto no_clock;
dp83640 = kzalloc(sizeof(struct dp83640_private), GFP_KERNEL);
if (!dp83640)
goto no_memory;
dp83640->phydev = phydev;
dp83640->mii_ts.rxtstamp = dp83640_rxtstamp;
dp83640->mii_ts.txtstamp = dp83640_txtstamp;
dp83640->mii_ts.hwtstamp = dp83640_hwtstamp;
dp83640->mii_ts.ts_info = dp83640_ts_info;
INIT_DELAYED_WORK(&dp83640->ts_work, rx_timestamp_work);
INIT_LIST_HEAD(&dp83640->rxts);
INIT_LIST_HEAD(&dp83640->rxpool);
for (i = 0; i < MAX_RXTS; i++)
list_add(&dp83640->rx_pool_data[i].list, &dp83640->rxpool);
phydev->mii_ts = &dp83640->mii_ts;
phydev->priv = dp83640;
spin_lock_init(&dp83640->rx_lock);
skb_queue_head_init(&dp83640->rx_queue);
skb_queue_head_init(&dp83640->tx_queue);
dp83640->clock = clock;
if (choose_this_phy(clock, phydev)) {
clock->chosen = dp83640;
clock->ptp_clock = ptp_clock_register(&clock->caps,
&phydev->mdio.dev);
if (IS_ERR(clock->ptp_clock)) {
err = PTR_ERR(clock->ptp_clock);
goto no_register;
}
} else
list_add_tail(&dp83640->list, &clock->phylist);
dp83640_clock_put(clock);
return 0;
no_register:
clock->chosen = NULL;
kfree(dp83640);
no_memory:
dp83640_clock_put(clock);
no_clock:
return err;
}
static void dp83640_remove(struct phy_device *phydev)
{
struct dp83640_clock *clock;
struct list_head *this, *next;
struct dp83640_private *tmp, *dp83640 = phydev->priv;
if (phydev->mdio.addr == BROADCAST_ADDR)
return;
phydev->mii_ts = NULL;
enable_status_frames(phydev, false);
cancel_delayed_work_sync(&dp83640->ts_work);
skb_queue_purge(&dp83640->rx_queue);
skb_queue_purge(&dp83640->tx_queue);
clock = dp83640_clock_get(dp83640->clock);
if (dp83640 == clock->chosen) {
ptp_clock_unregister(clock->ptp_clock);
clock->chosen = NULL;
} else {
list_for_each_safe(this, next, &clock->phylist) {
tmp = list_entry(this, struct dp83640_private, list);
if (tmp == dp83640) {
list_del_init(&tmp->list);
break;
}
}
}
dp83640_clock_put(clock);
kfree(dp83640);
}
static struct phy_driver dp83640_driver = {
.phy_id = DP83640_PHY_ID,
.phy_id_mask = 0xfffffff0,
@ -1537,10 +1550,6 @@ static struct phy_driver dp83640_driver = {
.config_init = dp83640_config_init,
.ack_interrupt = dp83640_ack_interrupt,
.config_intr = dp83640_config_intr,
.ts_info = dp83640_ts_info,
.hwtstamp = dp83640_hwtstamp,
.rxtstamp = dp83640_rxtstamp,
.txtstamp = dp83640_txtstamp,
};
static int __init dp83640_init(void)

View file

@ -0,0 +1,125 @@
// SPDX-License-Identifier: GPL-2.0
//
// Support for generic time stamping devices on MII buses.
// Copyright (C) 2018 Richard Cochran <richardcochran@gmail.com>
//
#include <linux/mii_timestamper.h>
static LIST_HEAD(mii_timestamping_devices);
static DEFINE_MUTEX(tstamping_devices_lock);
struct mii_timestamping_desc {
struct list_head list;
struct mii_timestamping_ctrl *ctrl;
struct device *device;
};
/**
* register_mii_tstamp_controller() - registers an MII time stamping device.
*
* @device: The device to be registered.
* @ctrl: Pointer to device's control interface.
*
* Returns zero on success or non-zero on failure.
*/
int register_mii_tstamp_controller(struct device *device,
struct mii_timestamping_ctrl *ctrl)
{
struct mii_timestamping_desc *desc;
desc = kzalloc(sizeof(*desc), GFP_KERNEL);
if (!desc)
return -ENOMEM;
INIT_LIST_HEAD(&desc->list);
desc->ctrl = ctrl;
desc->device = device;
mutex_lock(&tstamping_devices_lock);
list_add_tail(&mii_timestamping_devices, &desc->list);
mutex_unlock(&tstamping_devices_lock);
return 0;
}
EXPORT_SYMBOL(register_mii_tstamp_controller);
/**
* unregister_mii_tstamp_controller() - unregisters an MII time stamping device.
*
* @device: A device previously passed to register_mii_tstamp_controller().
*/
void unregister_mii_tstamp_controller(struct device *device)
{
struct mii_timestamping_desc *desc;
struct list_head *this, *next;
mutex_lock(&tstamping_devices_lock);
list_for_each_safe(this, next, &mii_timestamping_devices) {
desc = list_entry(this, struct mii_timestamping_desc, list);
if (desc->device == device) {
list_del_init(&desc->list);
kfree(desc);
break;
}
}
mutex_unlock(&tstamping_devices_lock);
}
EXPORT_SYMBOL(unregister_mii_tstamp_controller);
/**
* register_mii_timestamper - Enables a given port of an MII time stamper.
*
* @node: The device tree node of the MII time stamp controller.
* @port: The index of the port to be enabled.
*
* Returns a valid interface on success or ERR_PTR otherwise.
*/
struct mii_timestamper *register_mii_timestamper(struct device_node *node,
unsigned int port)
{
struct mii_timestamper *mii_ts = NULL;
struct mii_timestamping_desc *desc;
struct list_head *this;
mutex_lock(&tstamping_devices_lock);
list_for_each(this, &mii_timestamping_devices) {
desc = list_entry(this, struct mii_timestamping_desc, list);
if (desc->device->of_node == node) {
mii_ts = desc->ctrl->probe_channel(desc->device, port);
if (!IS_ERR(mii_ts)) {
mii_ts->device = desc->device;
get_device(desc->device);
}
break;
}
}
mutex_unlock(&tstamping_devices_lock);
return mii_ts ? mii_ts : ERR_PTR(-EPROBE_DEFER);
}
EXPORT_SYMBOL(register_mii_timestamper);
/**
* unregister_mii_timestamper - Disables a given MII time stamper.
*
* @mii_ts: An interface obtained via register_mii_timestamper().
*
*/
void unregister_mii_timestamper(struct mii_timestamper *mii_ts)
{
struct mii_timestamping_desc *desc;
struct list_head *this;
mutex_lock(&tstamping_devices_lock);
list_for_each(this, &mii_timestamping_devices) {
desc = list_entry(this, struct mii_timestamping_desc, list);
if (desc->device == mii_ts->device) {
desc->ctrl->release_channel(desc->device, mii_ts);
put_device(desc->device);
break;
}
}
mutex_unlock(&tstamping_devices_lock);
}
EXPORT_SYMBOL(unregister_mii_timestamper);

View file

@ -422,8 +422,8 @@ int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd)
return 0;
case SIOCSHWTSTAMP:
if (phydev->drv && phydev->drv->hwtstamp)
return phydev->drv->hwtstamp(phydev, ifr);
if (phydev->mii_ts && phydev->mii_ts->hwtstamp)
return phydev->mii_ts->hwtstamp(phydev->mii_ts, ifr);
/* fall through */
default:

View file

@ -881,6 +881,9 @@ EXPORT_SYMBOL(phy_device_register);
*/
void phy_device_remove(struct phy_device *phydev)
{
if (phydev->mii_ts)
unregister_mii_timestamper(phydev->mii_ts);
device_del(&phydev->mdio.dev);
/* Assert the reset signal */
@ -919,6 +922,8 @@ static void phy_link_change(struct phy_device *phydev, bool up, bool do_carrier)
netif_carrier_off(netdev);
}
phydev->adjust_link(netdev);
if (phydev->mii_ts && phydev->mii_ts->link_state)
phydev->mii_ts->link_state(phydev->mii_ts, phydev);
}
/**

View file

@ -42,14 +42,37 @@ static int of_get_phy_id(struct device_node *device, u32 *phy_id)
return -EINVAL;
}
static struct mii_timestamper *of_find_mii_timestamper(struct device_node *node)
{
struct of_phandle_args arg;
int err;
err = of_parse_phandle_with_fixed_args(node, "timestamper", 1, 0, &arg);
if (err == -ENOENT)
return NULL;
else if (err)
return ERR_PTR(err);
if (arg.args_count != 1)
return ERR_PTR(-EINVAL);
return register_mii_timestamper(arg.np, arg.args[0]);
}
static int of_mdiobus_register_phy(struct mii_bus *mdio,
struct device_node *child, u32 addr)
{
struct mii_timestamper *mii_ts;
struct phy_device *phy;
bool is_c45;
int rc;
u32 phy_id;
mii_ts = of_find_mii_timestamper(child);
if (IS_ERR(mii_ts))
return PTR_ERR(mii_ts);
is_c45 = of_device_is_compatible(child,
"ethernet-phy-ieee802.3-c45");
@ -57,11 +80,14 @@ static int of_mdiobus_register_phy(struct mii_bus *mdio,
phy = phy_device_create(mdio, addr, phy_id, 0, NULL);
else
phy = get_phy_device(mdio, addr, is_c45);
if (IS_ERR(phy))
if (IS_ERR(phy)) {
unregister_mii_timestamper(mii_ts);
return PTR_ERR(phy);
}
rc = of_irq_get(child, 0);
if (rc == -EPROBE_DEFER) {
unregister_mii_timestamper(mii_ts);
phy_device_free(phy);
return rc;
}
@ -90,10 +116,12 @@ static int of_mdiobus_register_phy(struct mii_bus *mdio,
* register it */
rc = phy_device_register(phy);
if (rc) {
unregister_mii_timestamper(mii_ts);
phy_device_free(phy);
of_node_put(child);
return rc;
}
phy->mii_ts = mii_ts;
dev_dbg(&mdio->dev, "registered phy %pOFn at address %i\n",
child, addr);

View file

@ -89,6 +89,16 @@ config DP83640_PHY
In order for this to work, your MAC driver must also
implement the skb_tx_timestamp() function.
config PTP_1588_CLOCK_INES
tristate "ZHAW InES PTP time stamping IP core"
depends on NETWORK_PHY_TIMESTAMPING
depends on PHYLIB
depends on PTP_1588_CLOCK
help
This driver adds support for using the ZHAW InES 1588 IP
core. This clock is only useful if the MII bus of your MAC
is wired up to the core.
config PTP_1588_CLOCK_PCH
tristate "Intel PCH EG20T as PTP clock"
depends on X86_32 || COMPILE_TEST

View file

@ -6,6 +6,7 @@
ptp-y := ptp_clock.o ptp_chardev.o ptp_sysfs.o
obj-$(CONFIG_PTP_1588_CLOCK) += ptp.o
obj-$(CONFIG_PTP_1588_CLOCK_DTE) += ptp_dte.o
obj-$(CONFIG_PTP_1588_CLOCK_INES) += ptp_ines.o
obj-$(CONFIG_PTP_1588_CLOCK_IXP46X) += ptp_ixp46x.o
obj-$(CONFIG_PTP_1588_CLOCK_PCH) += ptp_pch.o
obj-$(CONFIG_PTP_1588_CLOCK_KVM) += ptp_kvm.o

852
drivers/ptp/ptp_ines.c Normal file
View file

@ -0,0 +1,852 @@
// SPDX-License-Identifier: GPL-2.0
//
// Copyright (C) 2018 MOSER-BAER AG
//
#define pr_fmt(fmt) "InES_PTP: " fmt
#include <linux/ethtool.h>
#include <linux/export.h>
#include <linux/if_vlan.h>
#include <linux/mii_timestamper.h>
#include <linux/module.h>
#include <linux/net_tstamp.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <linux/phy.h>
#include <linux/platform_device.h>
#include <linux/ptp_classify.h>
#include <linux/ptp_clock_kernel.h>
#include <linux/stddef.h>
MODULE_DESCRIPTION("Driver for the ZHAW InES PTP time stamping IP core");
MODULE_AUTHOR("Richard Cochran <richardcochran@gmail.com>");
MODULE_VERSION("1.0");
MODULE_LICENSE("GPL");
/* GLOBAL register */
#define MCAST_MAC_SELECT_SHIFT 2
#define MCAST_MAC_SELECT_MASK 0x3
#define IO_RESET BIT(1)
#define PTP_RESET BIT(0)
/* VERSION register */
#define IF_MAJOR_VER_SHIFT 12
#define IF_MAJOR_VER_MASK 0xf
#define IF_MINOR_VER_SHIFT 8
#define IF_MINOR_VER_MASK 0xf
#define FPGA_MAJOR_VER_SHIFT 4
#define FPGA_MAJOR_VER_MASK 0xf
#define FPGA_MINOR_VER_SHIFT 0
#define FPGA_MINOR_VER_MASK 0xf
/* INT_STAT register */
#define RX_INTR_STATUS_3 BIT(5)
#define RX_INTR_STATUS_2 BIT(4)
#define RX_INTR_STATUS_1 BIT(3)
#define TX_INTR_STATUS_3 BIT(2)
#define TX_INTR_STATUS_2 BIT(1)
#define TX_INTR_STATUS_1 BIT(0)
/* INT_MSK register */
#define RX_INTR_MASK_3 BIT(5)
#define RX_INTR_MASK_2 BIT(4)
#define RX_INTR_MASK_1 BIT(3)
#define TX_INTR_MASK_3 BIT(2)
#define TX_INTR_MASK_2 BIT(1)
#define TX_INTR_MASK_1 BIT(0)
/* BUF_STAT register */
#define RX_FIFO_NE_3 BIT(5)
#define RX_FIFO_NE_2 BIT(4)
#define RX_FIFO_NE_1 BIT(3)
#define TX_FIFO_NE_3 BIT(2)
#define TX_FIFO_NE_2 BIT(1)
#define TX_FIFO_NE_1 BIT(0)
/* PORT_CONF register */
#define CM_ONE_STEP BIT(6)
#define PHY_SPEED_SHIFT 4
#define PHY_SPEED_MASK 0x3
#define P2P_DELAY_WR_POS_SHIFT 2
#define P2P_DELAY_WR_POS_MASK 0x3
#define PTP_MODE_SHIFT 0
#define PTP_MODE_MASK 0x3
/* TS_STAT_TX register */
#define TS_ENABLE BIT(15)
#define DATA_READ_POS_SHIFT 8
#define DATA_READ_POS_MASK 0x1f
#define DISCARDED_EVENTS_SHIFT 4
#define DISCARDED_EVENTS_MASK 0xf
#define INES_N_PORTS 3
#define INES_REGISTER_SIZE 0x80
#define INES_PORT_OFFSET 0x20
#define INES_PORT_SIZE 0x20
#define INES_FIFO_DEPTH 90
#define INES_MAX_EVENTS 100
#define BC_PTP_V1 0
#define BC_PTP_V2 1
#define TC_E2E_PTP_V2 2
#define TC_P2P_PTP_V2 3
#define OFF_PTP_CLOCK_ID 20
#define OFF_PTP_PORT_NUM 28
#define PHY_SPEED_10 0
#define PHY_SPEED_100 1
#define PHY_SPEED_1000 2
#define PORT_CONF \
((PHY_SPEED_1000 << PHY_SPEED_SHIFT) | (BC_PTP_V2 << PTP_MODE_SHIFT))
#define ines_read32(s, r) __raw_readl((void __iomem *)&s->regs->r)
#define ines_write32(s, v, r) __raw_writel(v, (void __iomem *)&s->regs->r)
#define MESSAGE_TYPE_SYNC 1
#define MESSAGE_TYPE_P_DELAY_REQ 2
#define MESSAGE_TYPE_P_DELAY_RESP 3
#define MESSAGE_TYPE_DELAY_REQ 4
#define SYNC 0x0
#define DELAY_REQ 0x1
#define PDELAY_REQ 0x2
#define PDELAY_RESP 0x3
static LIST_HEAD(ines_clocks);
static DEFINE_MUTEX(ines_clocks_lock);
struct ines_global_regs {
u32 id;
u32 test;
u32 global;
u32 version;
u32 test2;
u32 int_stat;
u32 int_msk;
u32 buf_stat;
};
struct ines_port_registers {
u32 port_conf;
u32 p_delay;
u32 ts_stat_tx;
u32 ts_stat_rx;
u32 ts_tx;
u32 ts_rx;
};
struct ines_timestamp {
struct list_head list;
unsigned long tmo;
u16 tag;
u64 sec;
u64 nsec;
u64 clkid;
u16 portnum;
u16 seqid;
};
struct ines_port {
struct ines_port_registers *regs;
struct mii_timestamper mii_ts;
struct ines_clock *clock;
bool rxts_enabled;
bool txts_enabled;
unsigned int index;
struct delayed_work ts_work;
/* lock protects event list and tx_skb */
spinlock_t lock;
struct sk_buff *tx_skb;
struct list_head events;
struct list_head pool;
struct ines_timestamp pool_data[INES_MAX_EVENTS];
};
struct ines_clock {
struct ines_port port[INES_N_PORTS];
struct ines_global_regs __iomem *regs;
void __iomem *base;
struct device_node *node;
struct device *dev;
struct list_head list;
};
static bool ines_match(struct sk_buff *skb, unsigned int ptp_class,
struct ines_timestamp *ts, struct device *dev);
static int ines_rxfifo_read(struct ines_port *port);
static u64 ines_rxts64(struct ines_port *port, unsigned int words);
static bool ines_timestamp_expired(struct ines_timestamp *ts);
static u64 ines_txts64(struct ines_port *port, unsigned int words);
static void ines_txtstamp_work(struct work_struct *work);
static bool is_sync_pdelay_resp(struct sk_buff *skb, int type);
static u8 tag_to_msgtype(u8 tag);
static void ines_clock_cleanup(struct ines_clock *clock)
{
struct ines_port *port;
int i;
for (i = 0; i < INES_N_PORTS; i++) {
port = &clock->port[i];
cancel_delayed_work_sync(&port->ts_work);
}
}
static int ines_clock_init(struct ines_clock *clock, struct device *device,
void __iomem *addr)
{
struct device_node *node = device->of_node;
unsigned long port_addr;
struct ines_port *port;
int i, j;
INIT_LIST_HEAD(&clock->list);
clock->node = node;
clock->dev = device;
clock->base = addr;
clock->regs = clock->base;
for (i = 0; i < INES_N_PORTS; i++) {
port = &clock->port[i];
port_addr = (unsigned long) clock->base +
INES_PORT_OFFSET + i * INES_PORT_SIZE;
port->regs = (struct ines_port_registers *) port_addr;
port->clock = clock;
port->index = i;
INIT_DELAYED_WORK(&port->ts_work, ines_txtstamp_work);
spin_lock_init(&port->lock);
INIT_LIST_HEAD(&port->events);
INIT_LIST_HEAD(&port->pool);
for (j = 0; j < INES_MAX_EVENTS; j++)
list_add(&port->pool_data[j].list, &port->pool);
}
ines_write32(clock, 0xBEEF, test);
ines_write32(clock, 0xBEEF, test2);
dev_dbg(device, "ID 0x%x\n", ines_read32(clock, id));
dev_dbg(device, "TEST 0x%x\n", ines_read32(clock, test));
dev_dbg(device, "VERSION 0x%x\n", ines_read32(clock, version));
dev_dbg(device, "TEST2 0x%x\n", ines_read32(clock, test2));
for (i = 0; i < INES_N_PORTS; i++) {
port = &clock->port[i];
ines_write32(port, PORT_CONF, port_conf);
}
return 0;
}
static struct ines_port *ines_find_port(struct device_node *node, u32 index)
{
struct ines_port *port = NULL;
struct ines_clock *clock;
struct list_head *this;
mutex_lock(&ines_clocks_lock);
list_for_each(this, &ines_clocks) {
clock = list_entry(this, struct ines_clock, list);
if (clock->node == node) {
port = &clock->port[index];
break;
}
}
mutex_unlock(&ines_clocks_lock);
return port;
}
static u64 ines_find_rxts(struct ines_port *port, struct sk_buff *skb, int type)
{
struct list_head *this, *next;
struct ines_timestamp *ts;
unsigned long flags;
u64 ns = 0;
if (type == PTP_CLASS_NONE)
return 0;
spin_lock_irqsave(&port->lock, flags);
ines_rxfifo_read(port);
list_for_each_safe(this, next, &port->events) {
ts = list_entry(this, struct ines_timestamp, list);
if (ines_timestamp_expired(ts)) {
list_del_init(&ts->list);
list_add(&ts->list, &port->pool);
continue;
}
if (ines_match(skb, type, ts, port->clock->dev)) {
ns = ts->sec * 1000000000ULL + ts->nsec;
list_del_init(&ts->list);
list_add(&ts->list, &port->pool);
break;
}
}
spin_unlock_irqrestore(&port->lock, flags);
return ns;
}
static u64 ines_find_txts(struct ines_port *port, struct sk_buff *skb)
{
unsigned int class = ptp_classify_raw(skb), i;
u32 data_rd_pos, buf_stat, mask, ts_stat_tx;
struct ines_timestamp ts;
unsigned long flags;
u64 ns = 0;
mask = TX_FIFO_NE_1 << port->index;
spin_lock_irqsave(&port->lock, flags);
for (i = 0; i < INES_FIFO_DEPTH; i++) {
buf_stat = ines_read32(port->clock, buf_stat);
if (!(buf_stat & mask)) {
dev_dbg(port->clock->dev,
"Tx timestamp FIFO unexpectedly empty\n");
break;
}
ts_stat_tx = ines_read32(port, ts_stat_tx);
data_rd_pos = (ts_stat_tx >> DATA_READ_POS_SHIFT) &
DATA_READ_POS_MASK;
if (data_rd_pos) {
dev_err(port->clock->dev,
"unexpected Tx read pos %u\n", data_rd_pos);
break;
}
ts.tag = ines_read32(port, ts_tx);
ts.sec = ines_txts64(port, 3);
ts.nsec = ines_txts64(port, 2);
ts.clkid = ines_txts64(port, 4);
ts.portnum = ines_read32(port, ts_tx);
ts.seqid = ines_read32(port, ts_tx);
if (ines_match(skb, class, &ts, port->clock->dev)) {
ns = ts.sec * 1000000000ULL + ts.nsec;
break;
}
}
spin_unlock_irqrestore(&port->lock, flags);
return ns;
}
static int ines_hwtstamp(struct mii_timestamper *mii_ts, struct ifreq *ifr)
{
struct ines_port *port = container_of(mii_ts, struct ines_port, mii_ts);
u32 cm_one_step = 0, port_conf, ts_stat_rx, ts_stat_tx;
struct hwtstamp_config cfg;
unsigned long flags;
if (copy_from_user(&cfg, ifr->ifr_data, sizeof(cfg)))
return -EFAULT;
/* reserved for future extensions */
if (cfg.flags)
return -EINVAL;
switch (cfg.tx_type) {
case HWTSTAMP_TX_OFF:
ts_stat_tx = 0;
break;
case HWTSTAMP_TX_ON:
ts_stat_tx = TS_ENABLE;
break;
case HWTSTAMP_TX_ONESTEP_P2P:
ts_stat_tx = TS_ENABLE;
cm_one_step = CM_ONE_STEP;
break;
default:
return -ERANGE;
}
switch (cfg.rx_filter) {
case HWTSTAMP_FILTER_NONE:
ts_stat_rx = 0;
break;
case HWTSTAMP_FILTER_ALL:
case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
return -ERANGE;
case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
case HWTSTAMP_FILTER_PTP_V2_EVENT:
case HWTSTAMP_FILTER_PTP_V2_SYNC:
case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
ts_stat_rx = TS_ENABLE;
cfg.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
break;
default:
return -ERANGE;
}
spin_lock_irqsave(&port->lock, flags);
port_conf = ines_read32(port, port_conf);
port_conf &= ~CM_ONE_STEP;
port_conf |= cm_one_step;
ines_write32(port, port_conf, port_conf);
ines_write32(port, ts_stat_rx, ts_stat_rx);
ines_write32(port, ts_stat_tx, ts_stat_tx);
port->rxts_enabled = ts_stat_rx == TS_ENABLE ? true : false;
port->txts_enabled = ts_stat_tx == TS_ENABLE ? true : false;
spin_unlock_irqrestore(&port->lock, flags);
return copy_to_user(ifr->ifr_data, &cfg, sizeof(cfg)) ? -EFAULT : 0;
}
static void ines_link_state(struct mii_timestamper *mii_ts,
struct phy_device *phydev)
{
struct ines_port *port = container_of(mii_ts, struct ines_port, mii_ts);
u32 port_conf, speed_conf;
unsigned long flags;
switch (phydev->speed) {
case SPEED_10:
speed_conf = PHY_SPEED_10 << PHY_SPEED_SHIFT;
break;
case SPEED_100:
speed_conf = PHY_SPEED_100 << PHY_SPEED_SHIFT;
break;
case SPEED_1000:
speed_conf = PHY_SPEED_1000 << PHY_SPEED_SHIFT;
break;
default:
dev_err(port->clock->dev, "bad speed: %d\n", phydev->speed);
return;
}
spin_lock_irqsave(&port->lock, flags);
port_conf = ines_read32(port, port_conf);
port_conf &= ~(0x3 << PHY_SPEED_SHIFT);
port_conf |= speed_conf;
ines_write32(port, port_conf, port_conf);
spin_unlock_irqrestore(&port->lock, flags);
}
static bool ines_match(struct sk_buff *skb, unsigned int ptp_class,
struct ines_timestamp *ts, struct device *dev)
{
u8 *msgtype, *data = skb_mac_header(skb);
unsigned int offset = 0;
__be16 *portn, *seqid;
__be64 *clkid;
if (unlikely(ptp_class & PTP_CLASS_V1))
return false;
if (ptp_class & PTP_CLASS_VLAN)
offset += VLAN_HLEN;
switch (ptp_class & PTP_CLASS_PMASK) {
case PTP_CLASS_IPV4:
offset += ETH_HLEN + IPV4_HLEN(data + offset) + UDP_HLEN;
break;
case PTP_CLASS_IPV6:
offset += ETH_HLEN + IP6_HLEN + UDP_HLEN;
break;
case PTP_CLASS_L2:
offset += ETH_HLEN;
break;
default:
return false;
}
if (skb->len + ETH_HLEN < offset + OFF_PTP_SEQUENCE_ID + sizeof(*seqid))
return false;
msgtype = data + offset;
clkid = (__be64 *)(data + offset + OFF_PTP_CLOCK_ID);
portn = (__be16 *)(data + offset + OFF_PTP_PORT_NUM);
seqid = (__be16 *)(data + offset + OFF_PTP_SEQUENCE_ID);
if (tag_to_msgtype(ts->tag & 0x7) != (*msgtype & 0xf)) {
dev_dbg(dev, "msgtype mismatch ts %hhu != skb %hhu\n",
tag_to_msgtype(ts->tag & 0x7), *msgtype & 0xf);
return false;
}
if (cpu_to_be64(ts->clkid) != *clkid) {
dev_dbg(dev, "clkid mismatch ts %llx != skb %llx\n",
cpu_to_be64(ts->clkid), *clkid);
return false;
}
if (ts->portnum != ntohs(*portn)) {
dev_dbg(dev, "portn mismatch ts %hu != skb %hu\n",
ts->portnum, ntohs(*portn));
return false;
}
if (ts->seqid != ntohs(*seqid)) {
dev_dbg(dev, "seqid mismatch ts %hu != skb %hu\n",
ts->seqid, ntohs(*seqid));
return false;
}
return true;
}
static bool ines_rxtstamp(struct mii_timestamper *mii_ts,
struct sk_buff *skb, int type)
{
struct ines_port *port = container_of(mii_ts, struct ines_port, mii_ts);
struct skb_shared_hwtstamps *ssh;
u64 ns;
if (!port->rxts_enabled)
return false;
ns = ines_find_rxts(port, skb, type);
if (!ns)
return false;
ssh = skb_hwtstamps(skb);
ssh->hwtstamp = ns_to_ktime(ns);
netif_rx(skb);
return true;
}
static int ines_rxfifo_read(struct ines_port *port)
{
u32 data_rd_pos, buf_stat, mask, ts_stat_rx;
struct ines_timestamp *ts;
unsigned int i;
mask = RX_FIFO_NE_1 << port->index;
for (i = 0; i < INES_FIFO_DEPTH; i++) {
if (list_empty(&port->pool)) {
dev_err(port->clock->dev, "event pool is empty\n");
return -1;
}
buf_stat = ines_read32(port->clock, buf_stat);
if (!(buf_stat & mask))
break;
ts_stat_rx = ines_read32(port, ts_stat_rx);
data_rd_pos = (ts_stat_rx >> DATA_READ_POS_SHIFT) &
DATA_READ_POS_MASK;
if (data_rd_pos) {
dev_err(port->clock->dev, "unexpected Rx read pos %u\n",
data_rd_pos);
break;
}
ts = list_first_entry(&port->pool, struct ines_timestamp, list);
ts->tmo = jiffies + HZ;
ts->tag = ines_read32(port, ts_rx);
ts->sec = ines_rxts64(port, 3);
ts->nsec = ines_rxts64(port, 2);
ts->clkid = ines_rxts64(port, 4);
ts->portnum = ines_read32(port, ts_rx);
ts->seqid = ines_read32(port, ts_rx);
list_del_init(&ts->list);
list_add_tail(&ts->list, &port->events);
}
return 0;
}
static u64 ines_rxts64(struct ines_port *port, unsigned int words)
{
unsigned int i;
u64 result;
u16 word;
word = ines_read32(port, ts_rx);
result = word;
words--;
for (i = 0; i < words; i++) {
word = ines_read32(port, ts_rx);
result <<= 16;
result |= word;
}
return result;
}
static bool ines_timestamp_expired(struct ines_timestamp *ts)
{
return time_after(jiffies, ts->tmo);
}
static int ines_ts_info(struct mii_timestamper *mii_ts,
struct ethtool_ts_info *info)
{
info->so_timestamping =
SOF_TIMESTAMPING_TX_HARDWARE |
SOF_TIMESTAMPING_TX_SOFTWARE |
SOF_TIMESTAMPING_RX_HARDWARE |
SOF_TIMESTAMPING_RX_SOFTWARE |
SOF_TIMESTAMPING_SOFTWARE |
SOF_TIMESTAMPING_RAW_HARDWARE;
info->phc_index = -1;
info->tx_types =
(1 << HWTSTAMP_TX_OFF) |
(1 << HWTSTAMP_TX_ON) |
(1 << HWTSTAMP_TX_ONESTEP_P2P);
info->rx_filters =
(1 << HWTSTAMP_FILTER_NONE) |
(1 << HWTSTAMP_FILTER_PTP_V2_EVENT);
return 0;
}
static u64 ines_txts64(struct ines_port *port, unsigned int words)
{
unsigned int i;
u64 result;
u16 word;
word = ines_read32(port, ts_tx);
result = word;
words--;
for (i = 0; i < words; i++) {
word = ines_read32(port, ts_tx);
result <<= 16;
result |= word;
}
return result;
}
static bool ines_txts_onestep(struct ines_port *port, struct sk_buff *skb, int type)
{
unsigned long flags;
u32 port_conf;
spin_lock_irqsave(&port->lock, flags);
port_conf = ines_read32(port, port_conf);
spin_unlock_irqrestore(&port->lock, flags);
if (port_conf & CM_ONE_STEP)
return is_sync_pdelay_resp(skb, type);
return false;
}
static void ines_txtstamp(struct mii_timestamper *mii_ts,
struct sk_buff *skb, int type)
{
struct ines_port *port = container_of(mii_ts, struct ines_port, mii_ts);
struct sk_buff *old_skb = NULL;
unsigned long flags;
if (!port->txts_enabled || ines_txts_onestep(port, skb, type)) {
kfree_skb(skb);
return;
}
spin_lock_irqsave(&port->lock, flags);
if (port->tx_skb)
old_skb = port->tx_skb;
port->tx_skb = skb;
spin_unlock_irqrestore(&port->lock, flags);
if (old_skb)
kfree_skb(old_skb);
schedule_delayed_work(&port->ts_work, 1);
}
static void ines_txtstamp_work(struct work_struct *work)
{
struct ines_port *port =
container_of(work, struct ines_port, ts_work.work);
struct skb_shared_hwtstamps ssh;
struct sk_buff *skb;
unsigned long flags;
u64 ns;
spin_lock_irqsave(&port->lock, flags);
skb = port->tx_skb;
port->tx_skb = NULL;
spin_unlock_irqrestore(&port->lock, flags);
ns = ines_find_txts(port, skb);
if (!ns) {
kfree_skb(skb);
return;
}
ssh.hwtstamp = ns_to_ktime(ns);
skb_complete_tx_timestamp(skb, &ssh);
}
static bool is_sync_pdelay_resp(struct sk_buff *skb, int type)
{
u8 *data = skb->data, *msgtype;
unsigned int offset = 0;
if (type & PTP_CLASS_VLAN)
offset += VLAN_HLEN;
switch (type & PTP_CLASS_PMASK) {
case PTP_CLASS_IPV4:
offset += ETH_HLEN + IPV4_HLEN(data + offset) + UDP_HLEN;
break;
case PTP_CLASS_IPV6:
offset += ETH_HLEN + IP6_HLEN + UDP_HLEN;
break;
case PTP_CLASS_L2:
offset += ETH_HLEN;
break;
default:
return 0;
}
if (type & PTP_CLASS_V1)
offset += OFF_PTP_CONTROL;
if (skb->len < offset + 1)
return 0;
msgtype = data + offset;
switch ((*msgtype & 0xf)) {
case SYNC:
case PDELAY_RESP:
return true;
default:
return false;
}
}
static u8 tag_to_msgtype(u8 tag)
{
switch (tag) {
case MESSAGE_TYPE_SYNC:
return SYNC;
case MESSAGE_TYPE_P_DELAY_REQ:
return PDELAY_REQ;
case MESSAGE_TYPE_P_DELAY_RESP:
return PDELAY_RESP;
case MESSAGE_TYPE_DELAY_REQ:
return DELAY_REQ;
}
return 0xf;
}
static struct mii_timestamper *ines_ptp_probe_channel(struct device *device,
unsigned int index)
{
struct device_node *node = device->of_node;
struct ines_port *port;
if (index > INES_N_PORTS - 1) {
dev_err(device, "bad port index %u\n", index);
return ERR_PTR(-EINVAL);
}
port = ines_find_port(node, index);
if (!port) {
dev_err(device, "missing port index %u\n", index);
return ERR_PTR(-ENODEV);
}
port->mii_ts.rxtstamp = ines_rxtstamp;
port->mii_ts.txtstamp = ines_txtstamp;
port->mii_ts.hwtstamp = ines_hwtstamp;
port->mii_ts.link_state = ines_link_state;
port->mii_ts.ts_info = ines_ts_info;
return &port->mii_ts;
}
static void ines_ptp_release_channel(struct device *device,
struct mii_timestamper *mii_ts)
{
}
static struct mii_timestamping_ctrl ines_ctrl = {
.probe_channel = ines_ptp_probe_channel,
.release_channel = ines_ptp_release_channel,
};
static int ines_ptp_ctrl_probe(struct platform_device *pld)
{
struct ines_clock *clock;
struct resource *res;
void __iomem *addr;
int err = 0;
res = platform_get_resource(pld, IORESOURCE_MEM, 0);
if (!res) {
dev_err(&pld->dev, "missing memory resource\n");
return -EINVAL;
}
addr = devm_ioremap_resource(&pld->dev, res);
if (IS_ERR(addr)) {
err = PTR_ERR(addr);
goto out;
}
clock = kzalloc(sizeof(*clock), GFP_KERNEL);
if (!clock) {
err = -ENOMEM;
goto out;
}
if (ines_clock_init(clock, &pld->dev, addr)) {
kfree(clock);
err = -ENOMEM;
goto out;
}
err = register_mii_tstamp_controller(&pld->dev, &ines_ctrl);
if (err) {
kfree(clock);
goto out;
}
mutex_lock(&ines_clocks_lock);
list_add_tail(&ines_clocks, &clock->list);
mutex_unlock(&ines_clocks_lock);
dev_set_drvdata(&pld->dev, clock);
out:
return err;
}
static int ines_ptp_ctrl_remove(struct platform_device *pld)
{
struct ines_clock *clock = dev_get_drvdata(&pld->dev);
unregister_mii_tstamp_controller(&pld->dev);
mutex_lock(&ines_clocks_lock);
list_del(&clock->list);
mutex_unlock(&ines_clocks_lock);
ines_clock_cleanup(clock);
kfree(clock);
return 0;
}
static const struct of_device_id ines_ptp_ctrl_of_match[] = {
{ .compatible = "ines,ptp-ctrl" },
{ }
};
MODULE_DEVICE_TABLE(of, ines_ptp_ctrl_of_match);
static struct platform_driver ines_ptp_ctrl_driver = {
.probe = ines_ptp_ctrl_probe,
.remove = ines_ptp_ctrl_remove,
.driver = {
.name = "ines_ptp_ctrl",
.of_match_table = of_match_ptr(ines_ptp_ctrl_of_match),
},
};
module_platform_driver(ines_ptp_ctrl_driver);

View file

@ -0,0 +1,121 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Support for generic time stamping devices on MII buses.
* Copyright (C) 2018 Richard Cochran <richardcochran@gmail.com>
*/
#ifndef _LINUX_MII_TIMESTAMPER_H
#define _LINUX_MII_TIMESTAMPER_H
#include <linux/device.h>
#include <linux/ethtool.h>
#include <linux/skbuff.h>
struct phy_device;
/**
* struct mii_timestamper - Callback interface to MII time stamping devices.
*
* @rxtstamp: Requests a Rx timestamp for 'skb'. If the skb is accepted,
* the MII time stamping device promises to deliver it using
* netif_rx() as soon as a timestamp becomes available. One of
* the PTP_CLASS_ values is passed in 'type'. The function
* must return true if the skb is accepted for delivery.
*
* @txtstamp: Requests a Tx timestamp for 'skb'. The MII time stamping
* device promises to deliver it using skb_complete_tx_timestamp()
* as soon as a timestamp becomes available. One of the PTP_CLASS_
* values is passed in 'type'.
*
* @hwtstamp: Handles SIOCSHWTSTAMP ioctl for hardware time stamping.
*
* @link_state: Allows the device to respond to changes in the link
* state. The caller invokes this function while holding
* the phy_device mutex.
*
* @ts_info: Handles ethtool queries for hardware time stamping.
* @device: Remembers the device to which the instance belongs.
*
* Drivers for PHY time stamping devices should embed their
* mii_timestamper within a private structure, obtaining a reference
* to it using container_of().
*
* Drivers for non-PHY time stamping devices should return a pointer
* to a mii_timestamper from the probe_channel() callback of their
* mii_timestamping_ctrl interface.
*/
struct mii_timestamper {
bool (*rxtstamp)(struct mii_timestamper *mii_ts,
struct sk_buff *skb, int type);
void (*txtstamp)(struct mii_timestamper *mii_ts,
struct sk_buff *skb, int type);
int (*hwtstamp)(struct mii_timestamper *mii_ts,
struct ifreq *ifreq);
void (*link_state)(struct mii_timestamper *mii_ts,
struct phy_device *phydev);
int (*ts_info)(struct mii_timestamper *mii_ts,
struct ethtool_ts_info *ts_info);
struct device *device;
};
/**
* struct mii_timestamping_ctrl - MII time stamping controller interface.
*
* @probe_channel: Callback into the controller driver announcing the
* presence of the 'port' channel. The 'device' field
* had been passed to register_mii_tstamp_controller().
* The driver must return either a pointer to a valid
* MII timestamper instance or PTR_ERR.
*
* @release_channel: Releases an instance obtained via .probe_channel.
*/
struct mii_timestamping_ctrl {
struct mii_timestamper *(*probe_channel)(struct device *device,
unsigned int port);
void (*release_channel)(struct device *device,
struct mii_timestamper *mii_ts);
};
#ifdef CONFIG_NETWORK_PHY_TIMESTAMPING
int register_mii_tstamp_controller(struct device *device,
struct mii_timestamping_ctrl *ctrl);
void unregister_mii_tstamp_controller(struct device *device);
struct mii_timestamper *register_mii_timestamper(struct device_node *node,
unsigned int port);
void unregister_mii_timestamper(struct mii_timestamper *mii_ts);
#else
static inline
int register_mii_tstamp_controller(struct device *device,
struct mii_timestamping_ctrl *ctrl)
{
return -EOPNOTSUPP;
}
static inline void unregister_mii_tstamp_controller(struct device *device)
{
}
static inline
struct mii_timestamper *register_mii_timestamper(struct device_node *node,
unsigned int port)
{
return NULL;
}
static inline void unregister_mii_timestamper(struct mii_timestamper *mii_ts)
{
}
#endif
#endif

View file

@ -17,6 +17,7 @@
#include <linux/linkmode.h>
#include <linux/mdio.h>
#include <linux/mii.h>
#include <linux/mii_timestamper.h>
#include <linux/module.h>
#include <linux/timer.h>
#include <linux/workqueue.h>
@ -441,6 +442,7 @@ struct phy_device {
struct sfp_bus *sfp_bus;
struct phylink *phylink;
struct net_device *attached_dev;
struct mii_timestamper *mii_ts;
u8 mdix;
u8 mdix_ctrl;
@ -546,29 +548,6 @@ struct phy_driver {
*/
int (*match_phy_device)(struct phy_device *phydev);
/* Handles ethtool queries for hardware time stamping. */
int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti);
/* Handles SIOCSHWTSTAMP ioctl for hardware time stamping. */
int (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr);
/*
* Requests a Rx timestamp for 'skb'. If the skb is accepted,
* the phy driver promises to deliver it using netif_rx() as
* soon as a timestamp becomes available. One of the
* PTP_CLASS_ values is passed in 'type'. The function must
* return true if the skb is accepted for delivery.
*/
bool (*rxtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
/*
* Requests a Tx timestamp for 'skb'. The phy driver promises
* to deliver it using skb_complete_tx_timestamp() as soon as a
* timestamp becomes available. One of the PTP_CLASS_ values
* is passed in 'type'.
*/
void (*txtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
/* Some devices (e.g. qnap TS-119P II) require PHY register changes to
* enable Wake on LAN, so set_wol is provided to be called in the
* ethernet driver's set_wol function. */
@ -936,6 +915,66 @@ static inline bool phy_polling_mode(struct phy_device *phydev)
return phydev->irq == PHY_POLL;
}
/**
* phy_has_hwtstamp - Tests whether a PHY time stamp configuration.
* @phydev: the phy_device struct
*/
static inline bool phy_has_hwtstamp(struct phy_device *phydev)
{
return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp;
}
/**
* phy_has_rxtstamp - Tests whether a PHY supports receive time stamping.
* @phydev: the phy_device struct
*/
static inline bool phy_has_rxtstamp(struct phy_device *phydev)
{
return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp;
}
/**
* phy_has_tsinfo - Tests whether a PHY reports time stamping and/or
* PTP hardware clock capabilities.
* @phydev: the phy_device struct
*/
static inline bool phy_has_tsinfo(struct phy_device *phydev)
{
return phydev && phydev->mii_ts && phydev->mii_ts->ts_info;
}
/**
* phy_has_txtstamp - Tests whether a PHY supports transmit time stamping.
* @phydev: the phy_device struct
*/
static inline bool phy_has_txtstamp(struct phy_device *phydev)
{
return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp;
}
static inline int phy_hwtstamp(struct phy_device *phydev, struct ifreq *ifr)
{
return phydev->mii_ts->hwtstamp(phydev->mii_ts, ifr);
}
static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb,
int type)
{
return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type);
}
static inline int phy_ts_info(struct phy_device *phydev,
struct ethtool_ts_info *tsinfo)
{
return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo);
}
static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb,
int type)
{
phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type);
}
/**
* phy_is_internal - Convenience function for testing if a PHY is internal
* @phydev: the phy_device struct

View file

@ -90,6 +90,14 @@ enum hwtstamp_tx_types {
* queue.
*/
HWTSTAMP_TX_ONESTEP_SYNC,
/*
* Same as HWTSTAMP_TX_ONESTEP_SYNC, but also enables time
* stamp insertion directly into PDelay_Resp packets. In this
* case, neither transmitted Sync nor PDelay_Resp packets will
* receive a time stamp via the socket error queue.
*/
HWTSTAMP_TX_ONESTEP_P2P,
};
/* possible values for hwtstamp_config->rx_filter */

View file

@ -646,8 +646,8 @@ static int vlan_ethtool_get_ts_info(struct net_device *dev,
const struct ethtool_ops *ops = vlan->real_dev->ethtool_ops;
struct phy_device *phydev = vlan->real_dev->phydev;
if (phydev && phydev->drv && phydev->drv->ts_info) {
return phydev->drv->ts_info(phydev, info);
if (phy_has_tsinfo(phydev)) {
return phy_ts_info(phydev, info);
} else if (ops->get_ts_info) {
return ops->get_ts_info(vlan->real_dev, info);
} else {

View file

@ -108,9 +108,10 @@ config NETWORK_PHY_TIMESTAMPING
bool "Timestamping in PHY devices"
select NET_PTP_CLASSIFY
help
This allows timestamping of network packets by PHYs with
hardware timestamping capabilities. This option adds some
overhead in the transmit and receive paths.
This allows timestamping of network packets by PHYs (or
other MII bus snooping devices) with hardware timestamping
capabilities. This option adds some overhead in the transmit
and receive paths.
If you are unsure how to answer this question, answer N.

View file

@ -187,6 +187,7 @@ static int net_hwtstamp_validate(struct ifreq *ifr)
case HWTSTAMP_TX_OFF:
case HWTSTAMP_TX_ON:
case HWTSTAMP_TX_ONESTEP_SYNC:
case HWTSTAMP_TX_ONESTEP_P2P:
tx_type_valid = 1;
break;
}

View file

@ -13,7 +13,7 @@
static unsigned int classify(const struct sk_buff *skb)
{
if (likely(skb->dev && skb->dev->phydev &&
skb->dev->phydev->drv))
skb->dev->phydev->mii_ts))
return ptp_classify_raw(skb);
else
return PTP_CLASS_NONE;
@ -21,7 +21,7 @@ static unsigned int classify(const struct sk_buff *skb)
void skb_clone_tx_timestamp(struct sk_buff *skb)
{
struct phy_device *phydev;
struct mii_timestamper *mii_ts;
struct sk_buff *clone;
unsigned int type;
@ -32,22 +32,22 @@ void skb_clone_tx_timestamp(struct sk_buff *skb)
if (type == PTP_CLASS_NONE)
return;
phydev = skb->dev->phydev;
if (likely(phydev->drv->txtstamp)) {
mii_ts = skb->dev->phydev->mii_ts;
if (likely(mii_ts->txtstamp)) {
clone = skb_clone_sk(skb);
if (!clone)
return;
phydev->drv->txtstamp(phydev, clone, type);
mii_ts->txtstamp(mii_ts, clone, type);
}
}
EXPORT_SYMBOL_GPL(skb_clone_tx_timestamp);
bool skb_defer_rx_timestamp(struct sk_buff *skb)
{
struct phy_device *phydev;
struct mii_timestamper *mii_ts;
unsigned int type;
if (!skb->dev || !skb->dev->phydev || !skb->dev->phydev->drv)
if (!skb->dev || !skb->dev->phydev || !skb->dev->phydev->mii_ts)
return false;
if (skb_headroom(skb) < ETH_HLEN)
@ -62,9 +62,9 @@ bool skb_defer_rx_timestamp(struct sk_buff *skb)
if (type == PTP_CLASS_NONE)
return false;
phydev = skb->dev->phydev;
if (likely(phydev->drv->rxtstamp))
return phydev->drv->rxtstamp(phydev, skb, type);
mii_ts = skb->dev->phydev->mii_ts;
if (likely(mii_ts->rxtstamp))
return mii_ts->rxtstamp(mii_ts, skb, type);
return false;
}

View file

@ -2096,8 +2096,8 @@ static int ethtool_get_ts_info(struct net_device *dev, void __user *useraddr)
memset(&info, 0, sizeof(info));
info.cmd = ETHTOOL_GET_TS_INFO;
if (phydev && phydev->drv && phydev->drv->ts_info) {
err = phydev->drv->ts_info(phydev, &info);
if (phy_has_tsinfo(phydev)) {
err = phy_ts_info(phydev, &info);
} else if (ops->get_ts_info) {
err = ops->get_ts_info(dev, &info);
} else {