Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: [MIPS] kspd: ioctl needs a translation entry. [MIPS] Viper2: Remove defective support. [MIPS] Oprofile: Reset all performance registers for MIPS_MT_SMP configs
This commit is contained in:
commit
b174ec2c65
51 changed files with 17 additions and 75 deletions
|
@ -470,11 +470,6 @@ config MIPS_XXS1500
|
|||
select SOC_AU1500
|
||||
select SYS_SUPPORTS_LITTLE_ENDIAN
|
||||
|
||||
config PNX8550_V2PCI
|
||||
bool "Philips PNX8550 based Viper2-PCI board"
|
||||
select PNX8550
|
||||
select SYS_SUPPORTS_LITTLE_ENDIAN
|
||||
|
||||
config PNX8550_JBS
|
||||
bool "Philips PNX8550 based JBS board"
|
||||
select PNX8550
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_MIPS_ATLAS=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_ZONE_DMA=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_ZONE_DMA=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_MIPS_COBALT=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_MIPS_DB1000=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_MIPS_DB1100=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_MIPS_DB1200=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_MIPS_DB1500=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_MIPS_DB1550=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_ZONE_DMA=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
CONFIG_DDB5477=y
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_MACH_DECSTATION=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_ZONE_DMA=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_ZONE_DMA=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_MIPS_EV64120=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -40,7 +40,6 @@ CONFIG_BASLER_EXCITE=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_ZONE_DMA=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_ZONE_DMA=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_ZONE_DMA=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_MOMENCO_JAGUAR_ATX=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_MACH_JAZZ=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_ZONE_DMA=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_LASAT=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_MIPS_MALTA=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_MIPS_SIM=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_ZONE_DMA=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_MOMENCO_OCELOT_3=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_ZONE_DMA=y
|
|||
CONFIG_MOMENCO_OCELOT_C=y
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_MOMENCO_OCELOT=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_ZONE_DMA=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
CONFIG_MOMENCO_OCELOT_G=y
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_MIPS_PB1100=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_MIPS_PB1500=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_MIPS_PB1550=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_ZONE_DMA=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
CONFIG_PNX8550_JBS=y
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_ZONE_DMA=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
CONFIG_PNX8550_STB810=y
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_ZONE_DMA=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
CONFIG_PNX8550_V2PCI=y
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_ZONE_DMA=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_ZONE_DMA=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_ZONE_DMA=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_ZONE_DMA=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_MIPS_SEAD=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_ZONE_DMA=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_ZONE_DMA=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_ZONE_DMA=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_ZONE_DMA=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_WR_PPMC=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_ZONE_DMA=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_ZONE_DMA=y
|
|||
# CONFIG_MOMENCO_OCELOT_C is not set
|
||||
# CONFIG_MOMENCO_OCELOT_G is not set
|
||||
# CONFIG_MIPS_XXS1500 is not set
|
||||
# CONFIG_PNX8550_V2PCI is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_DDB5477 is not set
|
||||
|
|
|
@ -70,6 +70,7 @@ static int sp_stopping = 0;
|
|||
#define MTSP_SYSCALL_GETTIME (MTSP_SYSCALL_BASE + 7)
|
||||
#define MTSP_SYSCALL_PIPEFREQ (MTSP_SYSCALL_BASE + 8)
|
||||
#define MTSP_SYSCALL_GETTOD (MTSP_SYSCALL_BASE + 9)
|
||||
#define MTSP_SYSCALL_IOCTL (MTSP_SYSCALL_BASE + 10)
|
||||
|
||||
#define MTSP_O_RDONLY 0x0000
|
||||
#define MTSP_O_WRONLY 0x0001
|
||||
|
@ -110,7 +111,8 @@ struct apsp_table syscall_command_table[] = {
|
|||
{ MTSP_SYSCALL_CLOSE, __NR_close },
|
||||
{ MTSP_SYSCALL_READ, __NR_read },
|
||||
{ MTSP_SYSCALL_WRITE, __NR_write },
|
||||
{ MTSP_SYSCALL_LSEEK32, __NR_lseek }
|
||||
{ MTSP_SYSCALL_LSEEK32, __NR_lseek },
|
||||
{ MTSP_SYSCALL_IOCTL, __NR_ioctl }
|
||||
};
|
||||
|
||||
static int sp_syscall(int num, int arg0, int arg1, int arg2, int arg3)
|
||||
|
|
|
@ -74,13 +74,13 @@ static inline void w_c0_ ## r ## n(unsigned int value) \
|
|||
|
||||
__define_perf_accessors(perfcntr, 0, 2)
|
||||
__define_perf_accessors(perfcntr, 1, 3)
|
||||
__define_perf_accessors(perfcntr, 2, 2)
|
||||
__define_perf_accessors(perfcntr, 3, 2)
|
||||
__define_perf_accessors(perfcntr, 2, 0)
|
||||
__define_perf_accessors(perfcntr, 3, 1)
|
||||
|
||||
__define_perf_accessors(perfctrl, 0, 2)
|
||||
__define_perf_accessors(perfctrl, 1, 3)
|
||||
__define_perf_accessors(perfctrl, 2, 2)
|
||||
__define_perf_accessors(perfctrl, 3, 2)
|
||||
__define_perf_accessors(perfctrl, 2, 0)
|
||||
__define_perf_accessors(perfctrl, 3, 1)
|
||||
|
||||
struct op_mips_model op_model_mipsxx_ops;
|
||||
|
||||
|
@ -97,7 +97,6 @@ static void mipsxx_reg_setup(struct op_counter_config *ctr)
|
|||
int i;
|
||||
|
||||
/* Compute the performance counter control word. */
|
||||
/* For now count kernel and user mode */
|
||||
for (i = 0; i < counters; i++) {
|
||||
reg.control[i] = 0;
|
||||
reg.counter[i] = 0;
|
||||
|
@ -234,9 +233,6 @@ static inline int n_counters(void)
|
|||
counters = __n_counters();
|
||||
}
|
||||
|
||||
#ifdef CONFIG_MIPS_MT_SMP
|
||||
counters >> 1;
|
||||
#endif
|
||||
return counters;
|
||||
}
|
||||
|
||||
|
@ -270,6 +266,10 @@ static int __init mipsxx_init(void)
|
|||
|
||||
reset_counters(counters);
|
||||
|
||||
#ifdef CONFIG_MIPS_MT_SMP
|
||||
counters >>= 1;
|
||||
#endif
|
||||
|
||||
op_model_mipsxx_ops.num_counters = counters;
|
||||
switch (current_cpu_data.cputype) {
|
||||
case CPU_20KC:
|
||||
|
@ -326,7 +326,11 @@ static int __init mipsxx_init(void)
|
|||
|
||||
static void mipsxx_exit(void)
|
||||
{
|
||||
reset_counters(op_model_mipsxx_ops.num_counters);
|
||||
int counters = op_model_mipsxx_ops.num_counters;
|
||||
#ifdef CONFIG_MIPS_MT_SMP
|
||||
counters <<= 1;
|
||||
#endif
|
||||
reset_counters(counters);
|
||||
|
||||
perf_irq = null_perf_irq;
|
||||
}
|
||||
|
|
|
@ -204,19 +204,7 @@ void __init arch_init_irq(void)
|
|||
* Note, PCI INTA is active low on the bus, but inverted
|
||||
* in the GIC, so to us it's active high.
|
||||
*/
|
||||
#ifdef CONFIG_PNX8550_V2PCI
|
||||
if (gic_int_line == (PNX8550_INT_GPIO0 - PNX8550_INT_GIC_MIN)) {
|
||||
/* PCI INT through gpio 8, which is setup in
|
||||
* pnx8550_setup.c and routed to GPIO
|
||||
* Interrupt Level 0 (GPIO Connection 58).
|
||||
* Set it active low. */
|
||||
|
||||
PNX8550_GIC_REQ(gic_int_line) = 0x1E020000;
|
||||
} else
|
||||
#endif
|
||||
{
|
||||
PNX8550_GIC_REQ(i - PNX8550_INT_GIC_MIN) = 0x1E000000;
|
||||
}
|
||||
PNX8550_GIC_REQ(i - PNX8550_INT_GIC_MIN) = 0x1E000000;
|
||||
|
||||
/* mask/priority is still 0 so we will not get any
|
||||
* interrupts until it is unmasked */
|
||||
|
|
Loading…
Reference in a new issue