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clk: keystone: fix a trivial typo

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s/regsiter/register/

Signed-off-by: Geliang Tang <geliangtang@163.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
This commit is contained in:
Geliang Tang 2015-10-18 23:31:12 +08:00 committed by Stephen Boyd
parent 61e22fff64
commit b30c64508b
1 changed files with 1 additions and 1 deletions
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2
drivers/clk/keystone/pll.c
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@ -157,7 +157,7 @@ out:
* _of_clk_init - PLL initialisation via DT
* @node: device tree node for this clock
* @pllctrl: If true, lower 6 bits of multiplier is in pllm register of
* pll controller, else it is in the control regsiter0(bit 11-6)
* pll controller, else it is in the control register0(bit 11-6)
*/
static void __init _of_pll_clk_init(struct device_node *node, bool pllctrl)
{