qla3xxx: bugfix: Jumbo frame handling.
Fixed rx checksum bits. Turn on TCP processing for rx checksum. Fixed max frame length register write. It wasn't getting set in multi-port system. Set rx buffer queue length properly for jumbo frames. Signed-off-by: Ron Mercer <ron.mercer@qlogic.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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f67cac0190
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2 changed files with 16 additions and 16 deletions
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@ -1933,17 +1933,18 @@ static void ql_process_macip_rx_intr(struct ql3_adapter *qdev,
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u16 checksum = le16_to_cpu(ib_ip_rsp_ptr->checksum);
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u16 checksum = le16_to_cpu(ib_ip_rsp_ptr->checksum);
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if (checksum &
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if (checksum &
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(IB_IP_IOCB_RSP_3032_ICE |
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(IB_IP_IOCB_RSP_3032_ICE |
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IB_IP_IOCB_RSP_3032_CE |
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IB_IP_IOCB_RSP_3032_CE)) {
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IB_IP_IOCB_RSP_3032_NUC)) {
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printk(KERN_ERR
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printk(KERN_ERR
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"%s: Bad checksum for this %s packet, checksum = %x.\n",
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"%s: Bad checksum for this %s packet, checksum = %x.\n",
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__func__,
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__func__,
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((checksum &
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((checksum &
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IB_IP_IOCB_RSP_3032_TCP) ? "TCP" :
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IB_IP_IOCB_RSP_3032_TCP) ? "TCP" :
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"UDP"),checksum);
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"UDP"),checksum);
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} else if (checksum & IB_IP_IOCB_RSP_3032_TCP) {
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} else if ((checksum & IB_IP_IOCB_RSP_3032_TCP) ||
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(checksum & IB_IP_IOCB_RSP_3032_UDP &&
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!(checksum & IB_IP_IOCB_RSP_3032_NUC))) {
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skb2->ip_summed = CHECKSUM_UNNECESSARY;
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skb2->ip_summed = CHECKSUM_UNNECESSARY;
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}
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}
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}
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}
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skb2->dev = qdev->ndev;
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skb2->dev = qdev->ndev;
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skb2->protocol = eth_type_trans(skb2, qdev->ndev);
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skb2->protocol = eth_type_trans(skb2, qdev->ndev);
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@ -3039,15 +3040,6 @@ static int ql_adapter_initialize(struct ql3_adapter *qdev)
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goto out;
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goto out;
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}
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}
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if (qdev->mac_index)
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ql_write_page0_reg(qdev,
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&port_regs->mac1MaxFrameLengthReg,
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qdev->max_frame_size);
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else
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ql_write_page0_reg(qdev,
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&port_regs->mac0MaxFrameLengthReg,
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qdev->max_frame_size);
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value = qdev->nvram_data.tcpMaxWindowSize;
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value = qdev->nvram_data.tcpMaxWindowSize;
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ql_write_page0_reg(qdev, &port_regs->tcpMaxWindow, value);
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ql_write_page0_reg(qdev, &port_regs->tcpMaxWindow, value);
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@ -3067,6 +3059,14 @@ static int ql_adapter_initialize(struct ql3_adapter *qdev)
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ql_sem_unlock(qdev, QL_FLASH_SEM_MASK);
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ql_sem_unlock(qdev, QL_FLASH_SEM_MASK);
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}
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}
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if (qdev->mac_index)
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ql_write_page0_reg(qdev,
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&port_regs->mac1MaxFrameLengthReg,
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qdev->max_frame_size);
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else
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ql_write_page0_reg(qdev,
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&port_regs->mac0MaxFrameLengthReg,
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qdev->max_frame_size);
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if(ql_sem_spinlock(qdev, QL_PHY_GIO_SEM_MASK,
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if(ql_sem_spinlock(qdev, QL_PHY_GIO_SEM_MASK,
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(QL_RESOURCE_BITS_BASE_CODE | (qdev->mac_index) *
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(QL_RESOURCE_BITS_BASE_CODE | (qdev->mac_index) *
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@ -3137,7 +3137,8 @@ static int ql_adapter_initialize(struct ql3_adapter *qdev)
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if (qdev->device_id == QL3032_DEVICE_ID) {
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if (qdev->device_id == QL3032_DEVICE_ID) {
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value =
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value =
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(QL3032_PORT_CONTROL_EF | QL3032_PORT_CONTROL_KIE |
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(QL3032_PORT_CONTROL_EF | QL3032_PORT_CONTROL_KIE |
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QL3032_PORT_CONTROL_EIv6 | QL3032_PORT_CONTROL_EIv4);
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QL3032_PORT_CONTROL_EIv6 | QL3032_PORT_CONTROL_EIv4 |
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QL3032_PORT_CONTROL_ET);
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ql_write_page0_reg(qdev, &port_regs->functionControl,
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ql_write_page0_reg(qdev, &port_regs->functionControl,
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((value << 16) | value));
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((value << 16) | value));
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} else {
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} else {
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@ -1014,8 +1014,7 @@ struct eeprom_data {
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/* Transmit and Receive Buffers */
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/* Transmit and Receive Buffers */
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#define NUM_LBUFQ_ENTRIES 128
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#define NUM_LBUFQ_ENTRIES 128
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#define JUMBO_NUM_LBUFQ_ENTRIES \
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#define JUMBO_NUM_LBUFQ_ENTRIES 32
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(NUM_LBUFQ_ENTRIES/(JUMBO_MTU_SIZE/NORMAL_MTU_SIZE))
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#define NUM_SBUFQ_ENTRIES 64
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#define NUM_SBUFQ_ENTRIES 64
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#define QL_SMALL_BUFFER_SIZE 32
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#define QL_SMALL_BUFFER_SIZE 32
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#define QL_ADDR_ELE_PER_BUFQ_ENTRY \
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#define QL_ADDR_ELE_PER_BUFQ_ENTRY \
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