[ARM] Orion: catch a couple more alternative spellings of PCIe

Unify a couple more spellings of "PCIe" ("PCI-E", "PCIE".)

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
This commit is contained in:
Lennert Buytenhek 2008-04-25 16:31:32 -04:00 committed by Nicolas Pitre
parent 994cab8464
commit b46926bb2d
6 changed files with 8 additions and 8 deletions

View file

@ -19,14 +19,14 @@
/*
* The Orion has fully programable address map. There's a separate address
* map for each of the device _master_ interfaces, e.g. CPU, PCI, PCIE, USB,
* map for each of the device _master_ interfaces, e.g. CPU, PCI, PCIe, USB,
* Gigabit Ethernet, DMA/XOR engines, etc. Each interface has its own
* address decode windows that allow it to access any of the Orion resources.
*
* CPU address decoding --
* Linux assumes that it is the boot loader that already setup the access to
* DDR and internal registers.
* Setup access to PCI and PCI-E IO/MEM space is issued by this file.
* Setup access to PCI and PCIe IO/MEM space is issued by this file.
* Setup access to various devices located on the device bus interface (e.g.
* flashes, RTC, etc) should be issued by machine-setup.c according to
* specific board population (by using orion5x_setup_*_win()).

View file

@ -317,7 +317,7 @@ struct sys_timer orion5x_timer = {
****************************************************************************/
/*
* Identify device ID and rev from PCIE configuration header space '0'.
* Identify device ID and rev from PCIe configuration header space '0'.
*/
static void __init orion5x_id(u32 *dev, u32 *rev, char **dev_name)
{

View file

@ -258,9 +258,9 @@ static void __init dns323_init(void)
*/
orion5x_setup_dev_boot_win(DNS323_NOR_BOOT_BASE, DNS323_NOR_BOOT_SIZE);
/* DNS-323 has a Marvell 88X7042 SATA controller attached via PCIE
/* DNS-323 has a Marvell 88X7042 SATA controller attached via PCIe
*
* Open a special address decode windows for the PCIE WA.
* Open a special address decode windows for the PCIe WA.
*/
orion5x_setup_pcie_wa_win(ORION5X_PCIE_WA_PHYS_BASE,
ORION5X_PCIE_WA_SIZE);

View file

@ -199,7 +199,7 @@ static void __init kurobox_pro_init(void)
orion5x_setup_dev0_win(KUROBOX_PRO_NAND_BASE, KUROBOX_PRO_NAND_SIZE);
/*
* Open a special address decode windows for the PCIE WA.
* Open a special address decode windows for the PCIe WA.
*/
orion5x_setup_pcie_wa_win(ORION5X_PCIE_WA_PHYS_BASE,
ORION5X_PCIE_WA_SIZE);

View file

@ -262,7 +262,7 @@ static void __init rd88f5182_init(void)
orion5x_setup_dev1_win(RD88F5182_NOR_BASE, RD88F5182_NOR_SIZE);
/*
* Open a special address decode windows for the PCIE WA.
* Open a special address decode windows for the PCIe WA.
*/
orion5x_setup_pcie_wa_win(ORION5X_PCIE_WA_PHYS_BASE,
ORION5X_PCIE_WA_SIZE);

View file

@ -376,7 +376,7 @@ static void __init qnap_ts209_init(void)
QNAP_TS209_NOR_BOOT_SIZE);
/*
* Open a special address decode windows for the PCIE WA.
* Open a special address decode windows for the PCIe WA.
*/
orion5x_setup_pcie_wa_win(ORION5X_PCIE_WA_PHYS_BASE,
ORION5X_PCIE_WA_SIZE);