[ARM] Orion: catch a couple more alternative spellings of PCIe
Unify a couple more spellings of "PCIe" ("PCI-E", "PCIE".) Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
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6 changed files with 8 additions and 8 deletions
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@ -19,14 +19,14 @@
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/*
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* The Orion has fully programable address map. There's a separate address
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* map for each of the device _master_ interfaces, e.g. CPU, PCI, PCIE, USB,
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* map for each of the device _master_ interfaces, e.g. CPU, PCI, PCIe, USB,
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* Gigabit Ethernet, DMA/XOR engines, etc. Each interface has its own
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* address decode windows that allow it to access any of the Orion resources.
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*
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* CPU address decoding --
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* Linux assumes that it is the boot loader that already setup the access to
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* DDR and internal registers.
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* Setup access to PCI and PCI-E IO/MEM space is issued by this file.
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* Setup access to PCI and PCIe IO/MEM space is issued by this file.
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* Setup access to various devices located on the device bus interface (e.g.
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* flashes, RTC, etc) should be issued by machine-setup.c according to
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* specific board population (by using orion5x_setup_*_win()).
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@ -317,7 +317,7 @@ struct sys_timer orion5x_timer = {
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****************************************************************************/
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/*
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* Identify device ID and rev from PCIE configuration header space '0'.
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* Identify device ID and rev from PCIe configuration header space '0'.
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*/
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static void __init orion5x_id(u32 *dev, u32 *rev, char **dev_name)
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{
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@ -258,9 +258,9 @@ static void __init dns323_init(void)
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*/
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orion5x_setup_dev_boot_win(DNS323_NOR_BOOT_BASE, DNS323_NOR_BOOT_SIZE);
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/* DNS-323 has a Marvell 88X7042 SATA controller attached via PCIE
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/* DNS-323 has a Marvell 88X7042 SATA controller attached via PCIe
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*
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* Open a special address decode windows for the PCIE WA.
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* Open a special address decode windows for the PCIe WA.
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*/
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orion5x_setup_pcie_wa_win(ORION5X_PCIE_WA_PHYS_BASE,
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ORION5X_PCIE_WA_SIZE);
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@ -199,7 +199,7 @@ static void __init kurobox_pro_init(void)
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orion5x_setup_dev0_win(KUROBOX_PRO_NAND_BASE, KUROBOX_PRO_NAND_SIZE);
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/*
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* Open a special address decode windows for the PCIE WA.
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* Open a special address decode windows for the PCIe WA.
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*/
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orion5x_setup_pcie_wa_win(ORION5X_PCIE_WA_PHYS_BASE,
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ORION5X_PCIE_WA_SIZE);
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@ -262,7 +262,7 @@ static void __init rd88f5182_init(void)
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orion5x_setup_dev1_win(RD88F5182_NOR_BASE, RD88F5182_NOR_SIZE);
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/*
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* Open a special address decode windows for the PCIE WA.
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* Open a special address decode windows for the PCIe WA.
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*/
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orion5x_setup_pcie_wa_win(ORION5X_PCIE_WA_PHYS_BASE,
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ORION5X_PCIE_WA_SIZE);
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@ -376,7 +376,7 @@ static void __init qnap_ts209_init(void)
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QNAP_TS209_NOR_BOOT_SIZE);
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/*
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* Open a special address decode windows for the PCIE WA.
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* Open a special address decode windows for the PCIe WA.
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*/
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orion5x_setup_pcie_wa_win(ORION5X_PCIE_WA_PHYS_BASE,
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ORION5X_PCIE_WA_SIZE);
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