[media] media: rc: nuvoton-cir: improve chip detection
Make the chip detection code more similar to the one used for the same chips in watchdog/w83627hf_wdt.c and hwmon/w83627ehf.c. Apart from better maintainability we gain - unified naming of chips (e.g. 677C -> NCT6776F) - driver works with all revisions of the chips (least 4 bits of id are masked) Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
This commit is contained in:
Heiner Kallweit
Mauro Carvalho Chehab
parent
099256e58e
commit
b5cf725c04
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@ -39,6 +39,17 @@
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#include "nuvoton-cir.h"
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static const struct nvt_chip nvt_chips[] = {
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{ "w83667hg", NVT_W83667HG },
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{ "NCT6775F", NVT_6775F },
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{ "NCT6776F", NVT_6776F },
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};
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static inline bool is_w83667hg(struct nvt_dev *nvt)
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{
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return nvt->chip_ver == NVT_W83667HG;
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}
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/* write val to config reg */
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static inline void nvt_cr_write(struct nvt_dev *nvt, u8 val, u8 reg)
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{
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@ -224,63 +235,53 @@ static void cir_wake_dump_regs(struct nvt_dev *nvt)
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pr_cont("\n");
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}
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static inline const char *nvt_find_chip(struct nvt_dev *nvt, int id)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(nvt_chips); i++)
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if ((id & SIO_ID_MASK) == nvt_chips[i].chip_ver) {
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nvt->chip_ver = nvt_chips[i].chip_ver;
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return nvt_chips[i].name;
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}
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return NULL;
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}
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/* detect hardware features */
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static int nvt_hw_detect(struct nvt_dev *nvt)
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{
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u8 chip_major, chip_minor;
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char chip_id[12];
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bool chip_unknown = false;
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const char *chip_name;
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int chip_id;
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nvt_efm_enable(nvt);
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/* Check if we're wired for the alternate EFER setup */
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chip_major = nvt_cr_read(nvt, CR_CHIP_ID_HI);
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if (chip_major == 0xff) {
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nvt->chip_major = nvt_cr_read(nvt, CR_CHIP_ID_HI);
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if (nvt->chip_major == 0xff) {
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nvt->cr_efir = CR_EFIR2;
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nvt->cr_efdr = CR_EFDR2;
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nvt_efm_enable(nvt);
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chip_major = nvt_cr_read(nvt, CR_CHIP_ID_HI);
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nvt->chip_major = nvt_cr_read(nvt, CR_CHIP_ID_HI);
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}
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chip_minor = nvt_cr_read(nvt, CR_CHIP_ID_LO);
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nvt->chip_minor = nvt_cr_read(nvt, CR_CHIP_ID_LO);
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/* these are the known working chip revisions... */
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switch (chip_major) {
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case CHIP_ID_HIGH_667:
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strcpy(chip_id, "w83667hg\0");
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if (chip_minor != CHIP_ID_LOW_667)
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chip_unknown = true;
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break;
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case CHIP_ID_HIGH_677B:
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strcpy(chip_id, "w83677hg\0");
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if (chip_minor != CHIP_ID_LOW_677B2 &&
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chip_minor != CHIP_ID_LOW_677B3)
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chip_unknown = true;
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break;
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case CHIP_ID_HIGH_677C:
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strcpy(chip_id, "w83677hg-c\0");
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if (chip_minor != CHIP_ID_LOW_677C)
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chip_unknown = true;
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break;
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default:
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strcpy(chip_id, "w836x7hg\0");
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chip_unknown = true;
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break;
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}
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chip_id = nvt->chip_major << 8 | nvt->chip_minor;
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chip_name = nvt_find_chip(nvt, chip_id);
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/* warn, but still let the driver load, if we don't know this chip */
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if (chip_unknown)
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nvt_pr(KERN_WARNING, "%s: unknown chip, id: 0x%02x 0x%02x, "
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"it may not work...", chip_id, chip_major, chip_minor);
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if (!chip_name)
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nvt_pr(KERN_WARNING,
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"unknown chip, id: 0x%02x 0x%02x, it may not work...",
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nvt->chip_major, nvt->chip_minor);
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else
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nvt_dbg("%s: chip id: 0x%02x 0x%02x",
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chip_id, chip_major, chip_minor);
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nvt_dbg("found %s or compatible: chip id: 0x%02x 0x%02x",
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chip_name, nvt->chip_major, nvt->chip_minor);
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nvt_efm_disable(nvt);
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nvt->chip_major = chip_major;
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nvt->chip_minor = chip_minor;
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return 0;
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}
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@ -288,7 +289,7 @@ static void nvt_cir_ldev_init(struct nvt_dev *nvt)
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{
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u8 val, psreg, psmask, psval;
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if (nvt->chip_major == CHIP_ID_HIGH_667) {
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if (is_w83667hg(nvt)) {
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psreg = CR_MULTIFUNC_PIN_SEL;
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psmask = MULTIFUNC_PIN_SEL_MASK;
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psval = MULTIFUNC_ENABLE_CIR | MULTIFUNC_ENABLE_CIRWB;
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@ -64,6 +64,20 @@ static int debug;
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#define TX_BUF_LEN 256
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#define RX_BUF_LEN 32
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#define SIO_ID_MASK 0xfff0
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enum nvt_chip_ver {
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NVT_UNKNOWN = 0,
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NVT_W83667HG = 0xa510,
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NVT_6775F = 0xb470,
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NVT_6776F = 0xc330
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};
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struct nvt_chip {
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const char *name;
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enum nvt_chip_ver chip_ver;
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};
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struct nvt_dev {
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struct pnp_dev *pdev;
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struct rc_dev *rdev;
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@ -93,6 +107,7 @@ struct nvt_dev {
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int cir_irq;
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int cir_wake_irq;
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enum nvt_chip_ver chip_ver;
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/* hardware id */
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u8 chip_major;
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u8 chip_minor;
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@ -326,15 +341,6 @@ struct nvt_dev {
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#define EFER_EFM_ENABLE 0x87
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#define EFER_EFM_DISABLE 0xaa
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/* Chip IDs found in CR_CHIP_ID_{HI,LO} */
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#define CHIP_ID_HIGH_667 0xa5
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#define CHIP_ID_HIGH_677B 0xb4
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#define CHIP_ID_HIGH_677C 0xc3
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#define CHIP_ID_LOW_667 0x13
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#define CHIP_ID_LOW_677B2 0x72
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#define CHIP_ID_LOW_677B3 0x73
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#define CHIP_ID_LOW_677C 0x33
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/* Config regs we need to care about */
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#define CR_SOFTWARE_RESET 0x02
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#define CR_LOGICAL_DEV_SEL 0x07
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