drm/i915: move adjusted_x/y from crtc to cache.
Move adjusted_x/y from crtc to fbc cache. Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/1508270891-22186-2-git-send-email-juhapekka.heikkila@gmail.com [vsyrjala: Add rudimentary commit message] Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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4 changed files with 16 additions and 11 deletions
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@ -1108,6 +1108,14 @@ struct intel_fbc {
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int src_w;
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int src_h;
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bool visible;
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/*
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* Display surface base address adjustement for
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* pageflips. Note that on gen4+ this only adjusts up
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* to a tile, offsets within a tile are handled in
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* the hw itself (with the TILEOFF register).
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*/
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int adjusted_x;
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int adjusted_y;
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} plane;
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struct {
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@ -3306,9 +3306,6 @@ static void i9xx_update_primary_plane(struct intel_plane *primary,
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else
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crtc->dspaddr_offset = linear_offset;
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crtc->adjusted_x = x;
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crtc->adjusted_y = y;
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spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
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if (INTEL_GEN(dev_priv) < 4) {
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@ -3577,9 +3574,6 @@ static void skylake_update_primary_plane(struct intel_plane *plane,
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crtc->dspaddr_offset = surf_addr;
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crtc->adjusted_x = src_x;
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crtc->adjusted_y = src_y;
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spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
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if (IS_GEMINILAKE(dev_priv) || IS_CANNONLAKE(dev_priv)) {
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@ -812,8 +812,6 @@ struct intel_crtc {
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* gen4+ this only adjusts up to a tile, offsets within a tile are
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* handled in the hw itself (with the TILEOFF register). */
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u32 dspaddr_offset;
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int adjusted_x;
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int adjusted_y;
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struct intel_crtc_state *config;
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@ -71,7 +71,10 @@ static inline bool no_fbc_on_multiple_pipes(struct drm_i915_private *dev_priv)
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*/
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static unsigned int get_crtc_fence_y_offset(struct intel_crtc *crtc)
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{
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return crtc->base.y - crtc->adjusted_y;
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struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
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struct intel_fbc *fbc = &dev_priv->fbc;
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return crtc->base.y - fbc->state_cache.plane.adjusted_y;
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}
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/*
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@ -727,8 +730,8 @@ static bool intel_fbc_hw_tracking_covers_screen(struct intel_crtc *crtc)
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intel_fbc_get_plane_source_size(&fbc->state_cache, &effective_w,
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&effective_h);
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effective_w += crtc->adjusted_x;
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effective_h += crtc->adjusted_y;
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effective_w += fbc->state_cache.plane.adjusted_x;
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effective_h += fbc->state_cache.plane.adjusted_y;
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return effective_w <= max_w && effective_h <= max_h;
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}
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@ -757,6 +760,8 @@ static void intel_fbc_update_state_cache(struct intel_crtc *crtc,
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cache->plane.src_w = drm_rect_width(&plane_state->base.src) >> 16;
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cache->plane.src_h = drm_rect_height(&plane_state->base.src) >> 16;
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cache->plane.visible = plane_state->base.visible;
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cache->plane.adjusted_x = plane_state->main.x;
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cache->plane.adjusted_y = plane_state->main.y;
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if (!cache->plane.visible)
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return;
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