ARM i.MX31: Add devicetree support
This patch adds basic devicetree support for i.MX31 based SoCs. Only the UART and interrupts bindings are added. Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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88
arch/arm/boot/dts/imx31.dtsi
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88
arch/arm/boot/dts/imx31.dtsi
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/*
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* Copyright 2012 Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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/include/ "skeleton.dtsi"
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/ {
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aliases {
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serial0 = &uart1;
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serial1 = &uart2;
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serial2 = &uart3;
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serial3 = &uart4;
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serial4 = &uart5;
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};
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avic: avic-interrupt-controller@60000000 {
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compatible = "fsl,imx31-avic", "fsl,avic";
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0x60000000 0x100000>;
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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interrupt-parent = <&avic>;
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ranges;
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aips@43f00000 { /* AIPS1 */
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compatible = "fsl,aips-bus", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x43f00000 0x100000>;
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ranges;
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uart1: serial@43f90000 {
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compatible = "fsl,imx31-uart", "fsl,imx21-uart";
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reg = <0x43f90000 0x4000>;
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interrupts = <45>;
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status = "disabled";
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};
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uart2: serial@43f94000 {
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compatible = "fsl,imx31-uart", "fsl,imx21-uart";
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reg = <0x43f94000 0x4000>;
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interrupts = <32>;
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status = "disabled";
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};
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uart4: serial@43fb0000 {
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compatible = "fsl,imx31-uart", "fsl,imx21-uart";
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reg = <0x43fb0000 0x4000>;
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interrupts = <46>;
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status = "disabled";
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};
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uart5: serial@43fb4000 {
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compatible = "fsl,imx31-uart", "fsl,imx21-uart";
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reg = <0x43fb4000 0x4000>;
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interrupts = <47>;
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status = "disabled";
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};
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};
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spba@50000000 {
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compatible = "fsl,spba-bus", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x50000000 0x100000>;
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ranges;
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uart3: serial@5000c000 {
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compatible = "fsl,imx31-uart", "fsl,imx21-uart";
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reg = <0x5000c000 0x4000>;
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interrupts = <18>;
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status = "disabled";
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};
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};
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};
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};
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@ -557,6 +557,14 @@ config MACH_BUG
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Include support for BUGBase 1.3 platform. This includes specific
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configurations for the board and its peripherals.
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config MACH_IMX31_DT
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bool "Support i.MX31 platforms from device tree"
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select SOC_IMX31
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select USE_OF
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help
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Include support for Freescale i.MX31 based platforms
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using the device tree for discovery.
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comment "MX35 platforms:"
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config MACH_PCM043
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@ -57,6 +57,7 @@ obj-$(CONFIG_MACH_QONG) += mach-qong.o
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obj-$(CONFIG_MACH_ARMADILLO5X0) += mach-armadillo5x0.o
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obj-$(CONFIG_MACH_KZM_ARM11_01) += mach-kzm_arm11_01.o
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obj-$(CONFIG_MACH_BUG) += mach-bug.o
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obj-$(CONFIG_MACH_IMX31_DT) += imx31-dt.o
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# i.MX35 based machines
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obj-$(CONFIG_MACH_PCM043) += mach-pcm043.o
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@ -20,6 +20,7 @@
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#include <linux/clkdev.h>
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#include <linux/io.h>
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#include <linux/err.h>
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#include <linux/of.h>
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#include <mach/hardware.h>
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#include <mach/mx31.h>
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@ -179,3 +180,21 @@ int __init mx31_clocks_init(unsigned long fref)
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return 0;
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}
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#ifdef CONFIG_OF
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int __init mx31_clocks_init_dt(void)
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{
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struct device_node *np;
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u32 fref = 26000000; /* default */
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for_each_compatible_node(np, NULL, "fixed-clock") {
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if (!of_device_is_compatible(np, "fsl,imx-osc26m"))
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continue;
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if (!of_property_read_u32(np, "clock-frequency", &fref))
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break;
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}
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return mx31_clocks_init(fref);
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}
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#endif
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63
arch/arm/mach-imx/imx31-dt.c
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63
arch/arm/mach-imx/imx31-dt.c
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/*
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* Copyright 2012 Sascha Hauer, Pengutronix
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#include <linux/irq.h>
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#include <linux/of_irq.h>
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#include <linux/of_platform.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/time.h>
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#include <mach/common.h>
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#include <mach/mx31.h>
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static const struct of_dev_auxdata imx31_auxdata_lookup[] __initconst = {
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OF_DEV_AUXDATA("fsl,imx31-uart", MX31_UART1_BASE_ADDR,
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"imx21-uart.0", NULL),
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OF_DEV_AUXDATA("fsl,imx31-uart", MX31_UART2_BASE_ADDR,
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"imx21-uart.1", NULL),
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OF_DEV_AUXDATA("fsl,imx31-uart", MX31_UART3_BASE_ADDR,
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"imx21-uart.2", NULL),
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OF_DEV_AUXDATA("fsl,imx31-uart", MX31_UART4_BASE_ADDR,
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"imx21-uart.3", NULL),
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OF_DEV_AUXDATA("fsl,imx31-uart", MX31_UART5_BASE_ADDR,
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"imx21-uart.4", NULL),
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{ /* sentinel */ }
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};
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static void __init imx31_dt_init(void)
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{
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of_platform_populate(NULL, of_default_bus_match_table,
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imx31_auxdata_lookup, NULL);
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}
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static void __init imx31_timer_init(void)
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{
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mx31_clocks_init_dt();
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}
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static struct sys_timer imx31_timer = {
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.init = imx31_timer_init,
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};
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static const char *imx31_dt_board_compat[] __initdata = {
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"fsl,imx31",
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NULL
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};
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DT_MACHINE_START(IMX31_DT, "Freescale i.MX31 (Device Tree Support)")
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.map_io = mx31_map_io,
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.init_early = imx31_init_early,
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.init_irq = mx31_init_irq,
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.handle_irq = imx31_handle_irq,
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.timer = &imx31_timer,
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.init_machine = imx31_dt_init,
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.dt_compat = imx31_dt_board_compat,
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.restart = mxc_restart,
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MACHINE_END
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@ -67,6 +67,7 @@ extern int mx51_clocks_init(unsigned long ckil, unsigned long osc,
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extern int mx53_clocks_init(unsigned long ckil, unsigned long osc,
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unsigned long ckih1, unsigned long ckih2);
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extern int mx27_clocks_init_dt(void);
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extern int mx31_clocks_init_dt(void);
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extern int mx51_clocks_init_dt(void);
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extern int mx53_clocks_init_dt(void);
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extern int mx6q_clocks_init(void);
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