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[ARM] 4843/1: Add GCR_CLKBPB for PXA3xx

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The PXA3xx AC97 controller has an additional control bit GCR_CLKBPB
which must be used during cold reset.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Mark Brown 2008-02-27 15:34:56 +01:00 committed by Russell King
parent ceee4f98f7
commit d862ccc570
1 changed files with 3 additions and 0 deletions
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3
include/asm-arm/arch-pxa/pxa-regs.h
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@ -520,6 +520,9 @@
#define MCCR_FSRIE (1 << 1) /* FIFO Service Request Interrupt Enable */
#define GCR __REG(0x4050000C) /* Global Control Register */
#ifdef CONFIG_PXA3xx
#define GCR_CLKBPB (1 << 31) /* Internal clock enable */
#endif
#define GCR_nDMAEN (1 << 24) /* non DMA Enable */
#define GCR_CDONE_IE (1 << 19) /* Command Done Interrupt Enable */
#define GCR_SDONE_IE (1 << 18) /* Status Done Interrupt Enable */