ia64: Use generic pci_mmap_resource_range()
Now that we eliminated the different behaviour in separately-reviewable commits, we can switch IA64 to the generic implementation. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Tested-by: Tony Luck <tony.luck@intel.com>
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2 changed files with 1 additions and 30 deletions
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@ -51,6 +51,7 @@ extern unsigned long ia64_max_iommu_merge_mask;
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#define PCI_DMA_BUS_IS_PHYS (ia64_max_iommu_merge_mask == ~0UL)
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#define PCI_DMA_BUS_IS_PHYS (ia64_max_iommu_merge_mask == ~0UL)
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#define HAVE_PCI_MMAP
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#define HAVE_PCI_MMAP
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#define ARCH_GENERIC_PCI_MMAP_RESOURCE
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#define arch_can_pci_mmap_wc() 1
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#define arch_can_pci_mmap_wc() 1
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#define HAVE_PCI_LEGACY
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#define HAVE_PCI_LEGACY
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@ -418,36 +418,6 @@ pcibios_align_resource (void *data, const struct resource *res,
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return res->start;
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return res->start;
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}
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}
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int
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pci_mmap_page_range (struct pci_dev *dev, int bar,
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struct vm_area_struct *vma,
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enum pci_mmap_state mmap_state, int write_combine)
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{
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/*
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* I/O space cannot be accessed via normal processor loads and
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* stores on this platform.
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*/
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if (mmap_state == pci_mmap_io)
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/*
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* XXX we could relax this for I/O spaces for which ACPI
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* indicates that the space is 1-to-1 mapped. But at the
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* moment, we don't support multiple PCI address spaces and
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* the legacy I/O space is not 1-to-1 mapped, so this is moot.
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*/
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return -EINVAL;
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if (write_combine)
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vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
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else
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vma->vm_page_prot = pgprot_device(vma->vm_page_prot);
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if (remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
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vma->vm_end - vma->vm_start, vma->vm_page_prot))
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return -EAGAIN;
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return 0;
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}
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/**
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/**
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* ia64_pci_get_legacy_mem - generic legacy mem routine
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* ia64_pci_get_legacy_mem - generic legacy mem routine
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* @bus: bus to get legacy memory base address for
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* @bus: bus to get legacy memory base address for
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