ia64: Use generic pci_mmap_resource_range()

Now that we eliminated the different behaviour in separately-reviewable
commits, we can switch IA64 to the generic implementation.

Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Tested-by: Tony Luck <tony.luck@intel.com>
This commit is contained in:
David Woodhouse 2017-04-07 12:10:53 +02:00 committed by Bjorn Helgaas
parent fcdb10d6b1
commit d9c102de2c
2 changed files with 1 additions and 30 deletions

View file

@ -51,6 +51,7 @@ extern unsigned long ia64_max_iommu_merge_mask;
#define PCI_DMA_BUS_IS_PHYS (ia64_max_iommu_merge_mask == ~0UL) #define PCI_DMA_BUS_IS_PHYS (ia64_max_iommu_merge_mask == ~0UL)
#define HAVE_PCI_MMAP #define HAVE_PCI_MMAP
#define ARCH_GENERIC_PCI_MMAP_RESOURCE
#define arch_can_pci_mmap_wc() 1 #define arch_can_pci_mmap_wc() 1
#define HAVE_PCI_LEGACY #define HAVE_PCI_LEGACY

View file

@ -418,36 +418,6 @@ pcibios_align_resource (void *data, const struct resource *res,
return res->start; return res->start;
} }
int
pci_mmap_page_range (struct pci_dev *dev, int bar,
struct vm_area_struct *vma,
enum pci_mmap_state mmap_state, int write_combine)
{
/*
* I/O space cannot be accessed via normal processor loads and
* stores on this platform.
*/
if (mmap_state == pci_mmap_io)
/*
* XXX we could relax this for I/O spaces for which ACPI
* indicates that the space is 1-to-1 mapped. But at the
* moment, we don't support multiple PCI address spaces and
* the legacy I/O space is not 1-to-1 mapped, so this is moot.
*/
return -EINVAL;
if (write_combine)
vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
else
vma->vm_page_prot = pgprot_device(vma->vm_page_prot);
if (remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
vma->vm_end - vma->vm_start, vma->vm_page_prot))
return -EAGAIN;
return 0;
}
/** /**
* ia64_pci_get_legacy_mem - generic legacy mem routine * ia64_pci_get_legacy_mem - generic legacy mem routine
* @bus: bus to get legacy memory base address for * @bus: bus to get legacy memory base address for