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MIPS: Cavium: Fix typo

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Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net>
Cc: david.daney@cavium.com
Cc: janne.huttunen@nokia.com
Cc: aaro.koskinen@nokia.com
Cc: trivial@kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/13324/
Patchwork: https://patchwork.linux-mips.org/patch/13325/
Patchwork: https://patchwork.linux-mips.org/patch/13326/
Patchwork: https://patchwork.linux-mips.org/patch/13327/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Andrea Gelmini 2016-05-21 14:00:40 +02:00 committed by Ralf Baechle
parent 7a448b57a6
commit da66f8e637
4 changed files with 4 additions and 4 deletions
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2
arch/mips/include/asm/octeon/cvmx-cmd-queue.h
View file

@ -146,7 +146,7 @@ typedef struct {
* This structure contains the global state of all command queues.
* It is stored in a bootmem named block and shared by all
* applications running on Octeon. Tickets are stored in a differnet
* cahce line that queue information to reduce the contention on the
* cache line that queue information to reduce the contention on the
* ll/sc used to get a ticket. If this is not the case, the update
* of queue state causes the ll/sc to fail quite often.
*/

2
arch/mips/include/asm/octeon/cvmx-helper-board.h
View file

@ -94,7 +94,7 @@ extern int cvmx_helper_board_get_mii_address(int ipd_port);
* @phy_addr: The address of the PHY to program
* @link_flags:
* Flags to control autonegotiation. Bit 0 is autonegotiation
* enable/disable to maintain backware compatibility.
* enable/disable to maintain backward compatibility.
* @link_info: Link speed to program. If the speed is zero and autonegotiation
* is enabled, all possible negotiation speeds are advertised.
*

2
arch/mips/include/asm/octeon/cvmx-ipd.h
View file

@ -39,7 +39,7 @@
enum cvmx_ipd_mode {
CVMX_IPD_OPC_MODE_STT = 0LL, /* All blocks DRAM, not cached in L2 */
CVMX_IPD_OPC_MODE_STF = 1LL, /* All bloccks into L2 */
CVMX_IPD_OPC_MODE_STF = 1LL, /* All blocks into L2 */
CVMX_IPD_OPC_MODE_STF1_STT = 2LL, /* 1st block L2, rest DRAM */
CVMX_IPD_OPC_MODE_STF2_STT = 3LL /* 1st, 2nd blocks L2, rest DRAM */
};

2
arch/mips/include/asm/octeon/cvmx-pow.h
View file

@ -2051,7 +2051,7 @@ static inline void cvmx_pow_tag_sw_desched(uint32_t tag,
}
/**
* Descchedules the current work queue entry.
* Deschedules the current work queue entry.
*
* @no_sched: no schedule flag value to be set on the work queue
* entry. If this is set the entry will not be