net/mlx4_core: New init and exit flow for mlx4_core
In the new flow, we separate the pci initialization and teardown from the initialization and teardown of the other resources. __mlx4_init_one handles the pci resources initialization. It then calls mlx4_load_one to initialize the remainder of the resources. When removing a device, mlx4_remove_one is invoked. However, now mlx4_remove_one calls mlx4_unload_one to free all the resources except the pci resources. When mlx4_unload_one returns, mlx4_remove_one then frees the pci resources. The above separation will allow us to implement 'reset flow' in the future. It will also enable more EQs for VFs and is a pre-step to the modern API to enable/disable SRIOV. Also added nvfs; an integer array of size MLX4_MAX_PORTS + 1; to the mlx4_dev struct. This new field is used to avoid parsing the num_vfs module parameter each time the mlx4_restart_one is called. Signed-off-by: Majd Dibbiny <majd@mellanox.com> Signed-off-by: Or Gerlitz <ogerlitz@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Majd Dibbiny
David S. Miller
parent
bbb07af4cd
commit
e1c00e10e9
2 changed files with 220 additions and 174 deletions
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@ -2259,116 +2259,18 @@ static void mlx4_free_ownership(struct mlx4_dev *dev)
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iounmap(owner);
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}
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static int __mlx4_init_one(struct pci_dev *pdev, int pci_dev_data)
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static int mlx4_load_one(struct pci_dev *pdev, int pci_dev_data,
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int total_vfs, int *nvfs, struct mlx4_priv *priv)
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{
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struct mlx4_priv *priv;
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struct mlx4_dev *dev;
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unsigned sum = 0;
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int err;
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int port;
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int nvfs[MLX4_MAX_PORTS + 1] = {0, 0, 0};
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int prb_vf[MLX4_MAX_PORTS + 1] = {0, 0, 0};
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const int param_map[MLX4_MAX_PORTS + 1][MLX4_MAX_PORTS + 1] = {
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{2, 0, 0}, {0, 1, 2}, {0, 1, 2} };
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unsigned total_vfs = 0;
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int sriov_initialized = 0;
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unsigned int i;
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int i;
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int existing_vfs = 0;
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pr_info(DRV_NAME ": Initializing %s\n", pci_name(pdev));
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dev = &priv->dev;
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err = pci_enable_device(pdev);
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if (err) {
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dev_err(&pdev->dev, "Cannot enable PCI device, aborting\n");
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return err;
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}
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/* Due to requirement that all VFs and the PF are *guaranteed* 2 MACS
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* per port, we must limit the number of VFs to 63 (since their are
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* 128 MACs)
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*/
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for (i = 0; i < sizeof(nvfs)/sizeof(nvfs[0]) && i < num_vfs_argc;
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total_vfs += nvfs[param_map[num_vfs_argc - 1][i]], i++) {
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nvfs[param_map[num_vfs_argc - 1][i]] = num_vfs[i];
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if (nvfs[i] < 0) {
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dev_err(&pdev->dev, "num_vfs module parameter cannot be negative\n");
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return -EINVAL;
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}
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}
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for (i = 0; i < sizeof(prb_vf)/sizeof(prb_vf[0]) && i < probe_vfs_argc;
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i++) {
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prb_vf[param_map[probe_vfs_argc - 1][i]] = probe_vf[i];
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if (prb_vf[i] < 0 || prb_vf[i] > nvfs[i]) {
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dev_err(&pdev->dev, "probe_vf module parameter cannot be negative or greater than num_vfs\n");
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return -EINVAL;
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}
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}
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if (total_vfs >= MLX4_MAX_NUM_VF) {
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dev_err(&pdev->dev,
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"Requested more VF's (%d) than allowed (%d)\n",
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total_vfs, MLX4_MAX_NUM_VF - 1);
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return -EINVAL;
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}
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for (i = 0; i < MLX4_MAX_PORTS; i++) {
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if (nvfs[i] + nvfs[2] >= MLX4_MAX_NUM_VF_P_PORT) {
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dev_err(&pdev->dev,
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"Requested more VF's (%d) for port (%d) than allowed (%d)\n",
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nvfs[i] + nvfs[2], i + 1,
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MLX4_MAX_NUM_VF_P_PORT - 1);
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return -EINVAL;
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}
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}
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/*
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* Check for BARs.
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*/
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if (!(pci_dev_data & MLX4_PCI_DEV_IS_VF) &&
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!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
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dev_err(&pdev->dev, "Missing DCS, aborting (driver_data: 0x%x, pci_resource_flags(pdev, 0):0x%lx)\n",
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pci_dev_data, pci_resource_flags(pdev, 0));
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err = -ENODEV;
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goto err_disable_pdev;
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}
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if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM)) {
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dev_err(&pdev->dev, "Missing UAR, aborting\n");
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err = -ENODEV;
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goto err_disable_pdev;
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}
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err = pci_request_regions(pdev, DRV_NAME);
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if (err) {
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dev_err(&pdev->dev, "Couldn't get PCI resources, aborting\n");
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goto err_disable_pdev;
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}
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pci_set_master(pdev);
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err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
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if (err) {
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dev_warn(&pdev->dev, "Warning: couldn't set 64-bit PCI DMA mask\n");
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err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
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if (err) {
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dev_err(&pdev->dev, "Can't set PCI DMA mask, aborting\n");
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goto err_release_regions;
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}
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}
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err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
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if (err) {
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dev_warn(&pdev->dev, "Warning: couldn't set 64-bit consistent PCI DMA mask\n");
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err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
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if (err) {
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dev_err(&pdev->dev, "Can't set consistent PCI DMA mask, aborting\n");
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goto err_release_regions;
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}
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}
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/* Allow large DMA segments, up to the firmware limit of 1 GB */
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dma_set_max_seg_size(&pdev->dev, 1024 * 1024 * 1024);
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dev = pci_get_drvdata(pdev);
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priv = mlx4_priv(dev);
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dev->pdev = pdev;
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INIT_LIST_HEAD(&priv->ctx_list);
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spin_lock_init(&priv->ctx_lock);
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@ -2382,28 +2284,9 @@ static int __mlx4_init_one(struct pci_dev *pdev, int pci_dev_data)
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dev->rev_id = pdev->revision;
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dev->numa_node = dev_to_node(&pdev->dev);
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/* Detect if this device is a virtual function */
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if (pci_dev_data & MLX4_PCI_DEV_IS_VF) {
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/* When acting as pf, we normally skip vfs unless explicitly
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* requested to probe them. */
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if (total_vfs) {
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unsigned vfs_offset = 0;
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for (i = 0; i < sizeof(nvfs)/sizeof(nvfs[0]) &&
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vfs_offset + nvfs[i] < extended_func_num(pdev);
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vfs_offset += nvfs[i], i++)
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;
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if (i == sizeof(nvfs)/sizeof(nvfs[0])) {
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err = -ENODEV;
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goto err_free_dev;
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}
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if ((extended_func_num(pdev) - vfs_offset)
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> prb_vf[i]) {
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mlx4_warn(dev, "Skipping virtual function:%d\n",
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extended_func_num(pdev));
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err = -ENODEV;
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goto err_free_dev;
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}
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}
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mlx4_warn(dev, "Detected virtual function - running in slave mode\n");
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dev->flags |= MLX4_FLAG_SLAVE;
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} else {
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@ -2413,11 +2296,10 @@ static int __mlx4_init_one(struct pci_dev *pdev, int pci_dev_data)
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err = mlx4_get_ownership(dev);
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if (err) {
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if (err < 0)
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goto err_free_dev;
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return err;
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else {
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mlx4_warn(dev, "Multiple PFs not yet supported - Skipping PF\n");
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err = -EINVAL;
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goto err_free_dev;
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return -EINVAL;
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}
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}
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@ -2429,7 +2311,8 @@ static int __mlx4_init_one(struct pci_dev *pdev, int pci_dev_data)
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GFP_KERNEL);
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if (NULL == dev->dev_vfs) {
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mlx4_err(dev, "Failed to allocate memory for VFs\n");
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err = 0;
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err = -ENOMEM;
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goto err_free_own;
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} else {
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atomic_inc(&pf_loading);
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existing_vfs = pci_num_vf(pdev);
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@ -2445,13 +2328,11 @@ static int __mlx4_init_one(struct pci_dev *pdev, int pci_dev_data)
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mlx4_err(dev, "Failed to enable SR-IOV, continuing without SR-IOV (err = %d)\n",
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err);
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atomic_dec(&pf_loading);
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err = 0;
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} else {
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mlx4_warn(dev, "Running in master mode\n");
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dev->flags |= MLX4_FLAG_SRIOV |
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MLX4_FLAG_MASTER;
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dev->num_vfs = total_vfs;
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sriov_initialized = 1;
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}
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}
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}
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@ -2467,7 +2348,7 @@ static int __mlx4_init_one(struct pci_dev *pdev, int pci_dev_data)
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err = mlx4_reset(dev);
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if (err) {
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mlx4_err(dev, "Failed to reset HCA, aborting\n");
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goto err_rel_own;
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goto err_sriov;
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}
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}
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@ -2517,34 +2398,46 @@ slave_start:
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/* In master functions, the communication channel must be initialized
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* after obtaining its address from fw */
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if (mlx4_is_master(dev)) {
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unsigned sum = 0;
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err = mlx4_multi_func_init(dev);
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if (err) {
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mlx4_err(dev, "Failed to init master mfunc interface, aborting\n");
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int ib_ports = 0;
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mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
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ib_ports++;
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if (ib_ports &&
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(num_vfs_argc > 1 || probe_vfs_argc > 1)) {
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mlx4_err(dev,
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"Invalid syntax of num_vfs/probe_vfs with IB port - single port VFs syntax is only supported when all ports are configured as ethernet\n");
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err = -EINVAL;
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goto err_close;
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}
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if (sriov_initialized) {
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int ib_ports = 0;
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mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
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ib_ports++;
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if (dev->caps.num_ports < 2 &&
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num_vfs_argc > 1) {
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err = -EINVAL;
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mlx4_err(dev,
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"Error: Trying to configure VFs on port 2, but HCA has only %d physical ports\n",
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dev->caps.num_ports);
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goto err_close;
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}
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memcpy(dev->nvfs, nvfs, sizeof(dev->nvfs));
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if (ib_ports &&
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(num_vfs_argc > 1 || probe_vfs_argc > 1)) {
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mlx4_err(dev,
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"Invalid syntax of num_vfs/probe_vfs with IB port - single port VFs syntax is only supported when all ports are configured as ethernet\n");
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err = -EINVAL;
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goto err_master_mfunc;
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}
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for (i = 0; i < sizeof(nvfs)/sizeof(nvfs[0]); i++) {
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unsigned j;
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for (j = 0; j < nvfs[i]; ++sum, ++j) {
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dev->dev_vfs[sum].min_port =
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i < 2 ? i + 1 : 1;
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dev->dev_vfs[sum].n_ports = i < 2 ? 1 :
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dev->caps.num_ports;
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}
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for (i = 0; i < sizeof(dev->nvfs)/sizeof(dev->nvfs[0]); i++) {
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unsigned j;
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for (j = 0; j < dev->nvfs[i]; ++sum, ++j) {
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dev->dev_vfs[sum].min_port = i < 2 ? i + 1 : 1;
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dev->dev_vfs[sum].n_ports = i < 2 ? 1 :
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dev->caps.num_ports;
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}
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}
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/* In master functions, the communication channel
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* must be initialized after obtaining its address from fw
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*/
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err = mlx4_multi_func_init(dev);
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if (err) {
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mlx4_err(dev, "Failed to init master mfunc interface, aborting.\n");
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goto err_close;
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}
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}
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err = mlx4_alloc_eq_table(dev);
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@ -2565,7 +2458,7 @@ slave_start:
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if (!mlx4_is_slave(dev)) {
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err = mlx4_init_steering(dev);
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if (err)
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goto err_free_eq;
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goto err_disable_msix;
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}
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err = mlx4_setup_hca(dev);
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@ -2625,6 +2518,10 @@ err_steer:
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if (!mlx4_is_slave(dev))
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mlx4_clear_steering(dev);
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err_disable_msix:
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if (dev->flags & MLX4_FLAG_MSI_X)
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pci_disable_msix(pdev);
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err_free_eq:
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mlx4_free_eq_table(dev);
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@ -2641,9 +2538,6 @@ err_master_mfunc:
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}
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err_close:
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if (dev->flags & MLX4_FLAG_MSI_X)
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pci_disable_msix(pdev);
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mlx4_close_hca(dev);
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err_mfunc:
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@ -2657,17 +2551,151 @@ err_sriov:
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if (dev->flags & MLX4_FLAG_SRIOV && !existing_vfs)
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pci_disable_sriov(pdev);
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err_rel_own:
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if (!mlx4_is_slave(dev))
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mlx4_free_ownership(dev);
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if (mlx4_is_master(dev) && dev->num_vfs)
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atomic_dec(&pf_loading);
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kfree(priv->dev.dev_vfs);
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err_free_dev:
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kfree(priv);
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err_free_own:
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if (!mlx4_is_slave(dev))
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mlx4_free_ownership(dev);
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return err;
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}
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static int __mlx4_init_one(struct pci_dev *pdev, int pci_dev_data,
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struct mlx4_priv *priv)
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{
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int err;
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int nvfs[MLX4_MAX_PORTS + 1] = {0, 0, 0};
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int prb_vf[MLX4_MAX_PORTS + 1] = {0, 0, 0};
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const int param_map[MLX4_MAX_PORTS + 1][MLX4_MAX_PORTS + 1] = {
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{2, 0, 0}, {0, 1, 2}, {0, 1, 2} };
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unsigned total_vfs = 0;
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unsigned int i;
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pr_info(DRV_NAME ": Initializing %s\n", pci_name(pdev));
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err = pci_enable_device(pdev);
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if (err) {
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dev_err(&pdev->dev, "Cannot enable PCI device, aborting\n");
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return err;
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}
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/* Due to requirement that all VFs and the PF are *guaranteed* 2 MACS
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* per port, we must limit the number of VFs to 63 (since their are
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* 128 MACs)
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*/
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for (i = 0; i < sizeof(nvfs)/sizeof(nvfs[0]) && i < num_vfs_argc;
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total_vfs += nvfs[param_map[num_vfs_argc - 1][i]], i++) {
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nvfs[param_map[num_vfs_argc - 1][i]] = num_vfs[i];
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if (nvfs[i] < 0) {
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dev_err(&pdev->dev, "num_vfs module parameter cannot be negative\n");
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err = -EINVAL;
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goto err_disable_pdev;
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}
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}
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for (i = 0; i < sizeof(prb_vf)/sizeof(prb_vf[0]) && i < probe_vfs_argc;
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i++) {
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prb_vf[param_map[probe_vfs_argc - 1][i]] = probe_vf[i];
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if (prb_vf[i] < 0 || prb_vf[i] > nvfs[i]) {
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dev_err(&pdev->dev, "probe_vf module parameter cannot be negative or greater than num_vfs\n");
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err = -EINVAL;
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goto err_disable_pdev;
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}
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}
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if (total_vfs >= MLX4_MAX_NUM_VF) {
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dev_err(&pdev->dev,
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"Requested more VF's (%d) than allowed (%d)\n",
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total_vfs, MLX4_MAX_NUM_VF - 1);
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err = -EINVAL;
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goto err_disable_pdev;
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}
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for (i = 0; i < MLX4_MAX_PORTS; i++) {
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if (nvfs[i] + nvfs[2] >= MLX4_MAX_NUM_VF_P_PORT) {
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dev_err(&pdev->dev,
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"Requested more VF's (%d) for port (%d) than allowed (%d)\n",
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nvfs[i] + nvfs[2], i + 1,
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MLX4_MAX_NUM_VF_P_PORT - 1);
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err = -EINVAL;
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goto err_disable_pdev;
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}
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}
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/* Check for BARs. */
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if (!(pci_dev_data & MLX4_PCI_DEV_IS_VF) &&
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!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
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dev_err(&pdev->dev, "Missing DCS, aborting (driver_data: 0x%x, pci_resource_flags(pdev, 0):0x%lx)\n",
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pci_dev_data, pci_resource_flags(pdev, 0));
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err = -ENODEV;
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goto err_disable_pdev;
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}
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if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM)) {
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dev_err(&pdev->dev, "Missing UAR, aborting\n");
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err = -ENODEV;
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goto err_disable_pdev;
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}
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err = pci_request_regions(pdev, DRV_NAME);
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if (err) {
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dev_err(&pdev->dev, "Couldn't get PCI resources, aborting\n");
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goto err_disable_pdev;
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}
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pci_set_master(pdev);
|
||||
|
||||
err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
|
||||
if (err) {
|
||||
dev_warn(&pdev->dev, "Warning: couldn't set 64-bit PCI DMA mask\n");
|
||||
err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
|
||||
if (err) {
|
||||
dev_err(&pdev->dev, "Can't set PCI DMA mask, aborting\n");
|
||||
goto err_release_regions;
|
||||
}
|
||||
}
|
||||
err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
|
||||
if (err) {
|
||||
dev_warn(&pdev->dev, "Warning: couldn't set 64-bit consistent PCI DMA mask\n");
|
||||
err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
|
||||
if (err) {
|
||||
dev_err(&pdev->dev, "Can't set consistent PCI DMA mask, aborting\n");
|
||||
goto err_release_regions;
|
||||
}
|
||||
}
|
||||
|
||||
/* Allow large DMA segments, up to the firmware limit of 1 GB */
|
||||
dma_set_max_seg_size(&pdev->dev, 1024 * 1024 * 1024);
|
||||
/* Detect if this device is a virtual function */
|
||||
if (pci_dev_data & MLX4_PCI_DEV_IS_VF) {
|
||||
/* When acting as pf, we normally skip vfs unless explicitly
|
||||
* requested to probe them.
|
||||
*/
|
||||
if (total_vfs) {
|
||||
unsigned vfs_offset = 0;
|
||||
|
||||
for (i = 0; i < sizeof(nvfs)/sizeof(nvfs[0]) &&
|
||||
vfs_offset + nvfs[i] < extended_func_num(pdev);
|
||||
vfs_offset += nvfs[i], i++)
|
||||
;
|
||||
if (i == sizeof(nvfs)/sizeof(nvfs[0])) {
|
||||
err = -ENODEV;
|
||||
goto err_release_regions;
|
||||
}
|
||||
if ((extended_func_num(pdev) - vfs_offset)
|
||||
> prb_vf[i]) {
|
||||
dev_warn(&pdev->dev, "Skipping virtual function:%d\n",
|
||||
extended_func_num(pdev));
|
||||
err = -ENODEV;
|
||||
goto err_release_regions;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
err = mlx4_load_one(pdev, pci_dev_data, total_vfs, nvfs, priv);
|
||||
if (err)
|
||||
goto err_release_regions;
|
||||
return 0;
|
||||
|
||||
err_release_regions:
|
||||
pci_release_regions(pdev);
|
||||
|
|
@ -2682,6 +2710,7 @@ static int mlx4_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
|
|||
{
|
||||
struct mlx4_priv *priv;
|
||||
struct mlx4_dev *dev;
|
||||
int ret;
|
||||
|
||||
printk_once(KERN_INFO "%s", mlx4_version);
|
||||
|
||||
|
|
@ -2690,13 +2719,18 @@ static int mlx4_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
|
|||
return -ENOMEM;
|
||||
|
||||
dev = &priv->dev;
|
||||
dev->pdev = pdev;
|
||||
pci_set_drvdata(pdev, dev);
|
||||
priv->pci_dev_data = id->driver_data;
|
||||
|
||||
return __mlx4_init_one(pdev, id->driver_data);
|
||||
ret = __mlx4_init_one(pdev, id->driver_data, priv);
|
||||
if (ret)
|
||||
kfree(priv);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void __mlx4_remove_one(struct pci_dev *pdev)
|
||||
static void mlx4_unload_one(struct pci_dev *pdev)
|
||||
{
|
||||
struct mlx4_dev *dev = pci_get_drvdata(pdev);
|
||||
struct mlx4_priv *priv = mlx4_priv(dev);
|
||||
|
|
@ -2775,8 +2809,6 @@ static void __mlx4_remove_one(struct pci_dev *pdev)
|
|||
kfree(dev->caps.qp1_proxy);
|
||||
kfree(dev->dev_vfs);
|
||||
|
||||
pci_release_regions(pdev);
|
||||
pci_disable_device(pdev);
|
||||
memset(priv, 0, sizeof(*priv));
|
||||
priv->pci_dev_data = pci_dev_data;
|
||||
priv->removed = 1;
|
||||
|
|
@ -2787,7 +2819,9 @@ static void mlx4_remove_one(struct pci_dev *pdev)
|
|||
struct mlx4_dev *dev = pci_get_drvdata(pdev);
|
||||
struct mlx4_priv *priv = mlx4_priv(dev);
|
||||
|
||||
__mlx4_remove_one(pdev);
|
||||
mlx4_unload_one(pdev);
|
||||
pci_release_regions(pdev);
|
||||
pci_disable_device(pdev);
|
||||
kfree(priv);
|
||||
pci_set_drvdata(pdev, NULL);
|
||||
}
|
||||
|
|
@ -2796,11 +2830,22 @@ int mlx4_restart_one(struct pci_dev *pdev)
|
|||
{
|
||||
struct mlx4_dev *dev = pci_get_drvdata(pdev);
|
||||
struct mlx4_priv *priv = mlx4_priv(dev);
|
||||
int pci_dev_data;
|
||||
int nvfs[MLX4_MAX_PORTS + 1] = {0, 0, 0};
|
||||
int pci_dev_data, err, total_vfs;
|
||||
|
||||
pci_dev_data = priv->pci_dev_data;
|
||||
__mlx4_remove_one(pdev);
|
||||
return __mlx4_init_one(pdev, pci_dev_data);
|
||||
total_vfs = dev->num_vfs;
|
||||
memcpy(nvfs, dev->nvfs, sizeof(dev->nvfs));
|
||||
|
||||
mlx4_unload_one(pdev);
|
||||
err = mlx4_load_one(pdev, pci_dev_data, total_vfs, nvfs, priv);
|
||||
if (err) {
|
||||
mlx4_err(dev, "%s: ERROR: mlx4_load_one failed, pci_name=%s, err=%d\n",
|
||||
__func__, pci_name(pdev), err);
|
||||
return err;
|
||||
}
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
static const struct pci_device_id mlx4_pci_table[] = {
|
||||
|
|
@ -2854,7 +2899,7 @@ MODULE_DEVICE_TABLE(pci, mlx4_pci_table);
|
|||
static pci_ers_result_t mlx4_pci_err_detected(struct pci_dev *pdev,
|
||||
pci_channel_state_t state)
|
||||
{
|
||||
__mlx4_remove_one(pdev);
|
||||
mlx4_unload_one(pdev);
|
||||
|
||||
return state == pci_channel_io_perm_failure ?
|
||||
PCI_ERS_RESULT_DISCONNECT : PCI_ERS_RESULT_NEED_RESET;
|
||||
|
|
@ -2866,7 +2911,7 @@ static pci_ers_result_t mlx4_pci_slot_reset(struct pci_dev *pdev)
|
|||
struct mlx4_priv *priv = mlx4_priv(dev);
|
||||
int ret;
|
||||
|
||||
ret = __mlx4_init_one(pdev, priv->pci_dev_data);
|
||||
ret = __mlx4_init_one(pdev, priv->pci_dev_data, priv);
|
||||
|
||||
return ret ? PCI_ERS_RESULT_DISCONNECT : PCI_ERS_RESULT_RECOVERED;
|
||||
}
|
||||
|
|
@ -2880,7 +2925,7 @@ static struct pci_driver mlx4_driver = {
|
|||
.name = DRV_NAME,
|
||||
.id_table = mlx4_pci_table,
|
||||
.probe = mlx4_init_one,
|
||||
.shutdown = __mlx4_remove_one,
|
||||
.shutdown = mlx4_unload_one,
|
||||
.remove = mlx4_remove_one,
|
||||
.err_handler = &mlx4_err_handler,
|
||||
};
|
||||
|
|
|
|||
|
|
@ -707,6 +707,7 @@ struct mlx4_dev {
|
|||
u64 regid_promisc_array[MLX4_MAX_PORTS + 1];
|
||||
u64 regid_allmulti_array[MLX4_MAX_PORTS + 1];
|
||||
struct mlx4_vf_dev *dev_vfs;
|
||||
int nvfs[MLX4_MAX_PORTS + 1];
|
||||
};
|
||||
|
||||
struct mlx4_eqe {
|
||||
|
|
|
|||
Loading…
Reference in a new issue