davinci: make it possible to include clock.h and psc.h in assembly code
psc.h contains register defines for PSC module which need to be accessed in assembly code which helps the DA850/OMAP-L138 SoC go to sleep. Shutting down DDR clock using PSC is a part of the sleep procedure. Also, the PLL related hardware definitions in clock.h are needed in assembly code to bypass the DDR2 PLL. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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2 changed files with 11 additions and 3 deletions
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@ -12,9 +12,6 @@
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#ifndef __ARCH_ARM_DAVINCI_CLOCK_H
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#define __ARCH_ARM_DAVINCI_CLOCK_H
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#include <linux/list.h>
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#include <asm/clkdev.h>
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#define DAVINCI_PLL1_BASE 0x01c40800
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#define DAVINCI_PLL2_BASE 0x01c40c00
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#define MAX_PLL 2
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@ -68,6 +65,11 @@
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*/
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#define PLL_LOCK_TIME 20
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#ifndef __ASSEMBLER__
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#include <linux/list.h>
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#include <asm/clkdev.h>
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struct pll_data {
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u32 phys_base;
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void __iomem *base;
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@ -124,3 +126,5 @@ int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv,
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extern struct platform_device davinci_wdt_device;
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#endif
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#endif
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@ -191,8 +191,12 @@
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#define MDSTAT_STATE_MASK 0x1f
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#ifndef __ASSEMBLER__
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extern int davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id);
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extern void davinci_psc_config(unsigned int domain, unsigned int ctlr,
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unsigned int id, char enable);
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#endif
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#endif /* __ASM_ARCH_PSC_H */
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