[ARM] 3417/1: add support for logicpd pxa270 card engine
Patch from Lennert Buytenhek Add support for the LogicPD PXA270 Card Engine. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Lennert Buytenhek
Russell King
parent
fa5ebfccf3
commit
e9937d4b0a
5 changed files with 443 additions and 0 deletions
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@ -10,6 +10,11 @@ config ARCH_LUBBOCK
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select PXA25x
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select SA1111
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config MACH_LOGICPD_PXA270
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bool "LogicPD PXA270 Card Engine Development Platform"
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select PXA27x
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select IWMMXT
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config MACH_MAINSTONE
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bool "Intel HCDDBBVA0 Development Platform"
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select PXA27x
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@ -9,6 +9,7 @@ obj-$(CONFIG_PXA27x) += pxa27x.o
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# Specific board support
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obj-$(CONFIG_ARCH_LUBBOCK) += lubbock.o
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obj-$(CONFIG_MACH_LOGICPD_PXA270) += lpd270.o
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obj-$(CONFIG_MACH_MAINSTONE) += mainstone.o
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obj-$(CONFIG_ARCH_PXA_IDP) += idp.o
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obj-$(CONFIG_PXA_SHARP_C7xx) += corgi.o corgi_ssp.o corgi_lcd.o sharpsl_pm.o corgi_pm.o
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393
arch/arm/mach-pxa/lpd270.c
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393
arch/arm/mach-pxa/lpd270.c
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@ -0,0 +1,393 @@
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/*
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* linux/arch/arm/mach-pxa/lpd270.c
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*
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* Support for the LogicPD PXA270 Card Engine.
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* Derived from the mainstone code, which carries these notices:
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*
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* Author: Nicolas Pitre
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* Created: Nov 05, 2002
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* Copyright: MontaVista Software Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/sysdev.h>
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#include <linux/interrupt.h>
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#include <linux/sched.h>
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#include <linux/bitops.h>
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#include <linux/fb.h>
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#include <linux/ioport.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <asm/types.h>
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#include <asm/setup.h>
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#include <asm/memory.h>
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#include <asm/mach-types.h>
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#include <asm/hardware.h>
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#include <asm/irq.h>
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#include <asm/sizes.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/mach/irq.h>
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#include <asm/mach/flash.h>
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#include <asm/arch/pxa-regs.h>
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#include <asm/arch/lpd270.h>
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#include <asm/arch/audio.h>
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#include <asm/arch/pxafb.h>
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#include <asm/arch/mmc.h>
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#include <asm/arch/irda.h>
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#include <asm/arch/ohci.h>
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#include "generic.h"
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static unsigned int lpd270_irq_enabled;
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static void lpd270_mask_irq(unsigned int irq)
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{
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int lpd270_irq = irq - LPD270_IRQ(0);
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__raw_writew(~(1 << lpd270_irq), LPD270_INT_STATUS);
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lpd270_irq_enabled &= ~(1 << lpd270_irq);
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__raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
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}
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static void lpd270_unmask_irq(unsigned int irq)
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{
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int lpd270_irq = irq - LPD270_IRQ(0);
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lpd270_irq_enabled |= 1 << lpd270_irq;
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__raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
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}
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static struct irqchip lpd270_irq_chip = {
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.ack = lpd270_mask_irq,
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.mask = lpd270_mask_irq,
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.unmask = lpd270_unmask_irq,
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};
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static void lpd270_irq_handler(unsigned int irq, struct irqdesc *desc,
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struct pt_regs *regs)
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{
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unsigned long pending;
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pending = __raw_readw(LPD270_INT_STATUS) & lpd270_irq_enabled;
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do {
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GEDR(0) = GPIO_bit(0); /* clear useless edge notification */
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if (likely(pending)) {
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irq = LPD270_IRQ(0) + __ffs(pending);
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desc = irq_desc + irq;
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desc_handle_irq(irq, desc, regs);
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pending = __raw_readw(LPD270_INT_STATUS) &
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lpd270_irq_enabled;
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}
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} while (pending);
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}
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static void __init lpd270_init_irq(void)
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{
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int irq;
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pxa_init_irq();
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__raw_writew(0, LPD270_INT_MASK);
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__raw_writew(0, LPD270_INT_STATUS);
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/* setup extra LogicPD PXA270 irqs */
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for (irq = LPD270_IRQ(2); irq <= LPD270_IRQ(4); irq++) {
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set_irq_chip(irq, &lpd270_irq_chip);
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set_irq_handler(irq, do_level_IRQ);
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set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
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}
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set_irq_chained_handler(IRQ_GPIO(0), lpd270_irq_handler);
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set_irq_type(IRQ_GPIO(0), IRQT_FALLING);
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}
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#ifdef CONFIG_PM
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static int lpd270_irq_resume(struct sys_device *dev)
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{
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__raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
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return 0;
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}
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static struct sysdev_class lpd270_irq_sysclass = {
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set_kset_name("cpld_irq"),
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.resume = lpd270_irq_resume,
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};
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static struct sys_device lpd270_irq_device = {
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.cls = &lpd270_irq_sysclass,
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};
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static int __init lpd270_irq_device_init(void)
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{
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int ret = sysdev_class_register(&lpd270_irq_sysclass);
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if (ret == 0)
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ret = sysdev_register(&lpd270_irq_device);
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return ret;
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}
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device_initcall(lpd270_irq_device_init);
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#endif
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static struct resource smc91x_resources[] = {
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[0] = {
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.start = LPD270_ETH_PHYS,
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.end = (LPD270_ETH_PHYS + 0xfffff),
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = LPD270_ETHERNET_IRQ,
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.end = LPD270_ETHERNET_IRQ,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device smc91x_device = {
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.name = "smc91x",
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.id = 0,
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.num_resources = ARRAY_SIZE(smc91x_resources),
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.resource = smc91x_resources,
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};
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static struct platform_device lpd270_audio_device = {
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.name = "pxa2xx-ac97",
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.id = -1,
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};
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static struct resource lpd270_flash_resources[] = {
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[0] = {
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.start = PXA_CS0_PHYS,
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.end = PXA_CS0_PHYS + SZ_64M - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = PXA_CS1_PHYS,
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.end = PXA_CS1_PHYS + SZ_64M - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct mtd_partition lpd270_flash0_partitions[] = {
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{
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.name = "Bootloader",
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.size = 0x00040000,
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.offset = 0,
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.mask_flags = MTD_WRITEABLE /* force read-only */
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}, {
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.name = "Kernel",
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.size = 0x00400000,
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.offset = 0x00040000,
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}, {
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.name = "Filesystem",
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.size = MTDPART_SIZ_FULL,
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.offset = 0x00440000
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},
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};
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static struct flash_platform_data lpd270_flash_data[2] = {
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{
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.name = "processor-flash",
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.map_name = "cfi_probe",
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.parts = lpd270_flash0_partitions,
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.nr_parts = ARRAY_SIZE(lpd270_flash0_partitions),
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}, {
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.name = "mainboard-flash",
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.map_name = "cfi_probe",
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.parts = NULL,
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.nr_parts = 0,
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}
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};
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static struct platform_device lpd270_flash_device[2] = {
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{
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.name = "pxa2xx-flash",
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.id = 0,
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.dev = {
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.platform_data = &lpd270_flash_data[0],
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},
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.resource = &lpd270_flash_resources[0],
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.num_resources = 1,
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}, {
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.name = "pxa2xx-flash",
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.id = 1,
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.dev = {
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.platform_data = &lpd270_flash_data[1],
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},
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.resource = &lpd270_flash_resources[1],
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.num_resources = 1,
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},
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};
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static void lpd270_backlight_power(int on)
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{
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if (on) {
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pxa_gpio_mode(GPIO16_PWM0_MD);
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pxa_set_cken(CKEN0_PWM0, 1);
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PWM_CTRL0 = 0;
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PWM_PWDUTY0 = 0x3ff;
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PWM_PERVAL0 = 0x3ff;
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} else {
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PWM_CTRL0 = 0;
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PWM_PWDUTY0 = 0x0;
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PWM_PERVAL0 = 0x3FF;
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pxa_set_cken(CKEN0_PWM0, 0);
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}
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}
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/* 5.7" TFT QVGA (LoLo display number 1) */
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static struct pxafb_mach_info sharp_lq057q3dc02 __initdata = {
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.pixclock = 100000,
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.xres = 240,
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.yres = 320,
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.bpp = 16,
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.hsync_len = 64,
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.left_margin = 0x27,
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.right_margin = 0x09,
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.vsync_len = 0x04,
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.upper_margin = 0x08,
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.lower_margin = 0x14,
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.sync = 0,
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.lccr0 = 0x07800080,
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.lccr3 = 0x04400007,
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.pxafb_backlight_power = lpd270_backlight_power,
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};
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/* 6.4" TFT VGA (LoLo display number 5) */
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static struct pxafb_mach_info sharp_lq64d343 __initdata = {
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.pixclock = 20000,
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.xres = 640,
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.yres = 480,
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.bpp = 16,
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.hsync_len = 49,
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.left_margin = 0x89,
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.right_margin = 0x19,
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.vsync_len = 18,
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.upper_margin = 0x22,
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.lower_margin = 0,
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.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
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.lccr0 = 0x07800080,
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.lccr3 = 0x04400001,
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.pxafb_backlight_power = lpd270_backlight_power,
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};
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/* 3.5" TFT QVGA (LoLo display number 8) */
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static struct pxafb_mach_info sharp_lq035q7db02_20 __initdata = {
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.pixclock = 100000,
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.xres = 240,
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.yres = 320,
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.bpp = 16,
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.hsync_len = 0x34,
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.left_margin = 0x09,
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.right_margin = 0x09,
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.vsync_len = 0x08,
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.upper_margin = 0x05,
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.lower_margin = 0x14,
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.sync = 0,
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.lccr0 = 0x07800080,
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.lccr3 = 0x04400007,
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.pxafb_backlight_power = lpd270_backlight_power,
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};
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static struct platform_device *platform_devices[] __initdata = {
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&smc91x_device,
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&lpd270_audio_device,
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&lpd270_flash_device[0],
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&lpd270_flash_device[1],
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};
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static int lpd270_ohci_init(struct device *dev)
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{
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/* setup Port1 GPIO pin. */
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pxa_gpio_mode(88 | GPIO_ALT_FN_1_IN); /* USBHPWR1 */
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pxa_gpio_mode(89 | GPIO_ALT_FN_2_OUT); /* USBHPEN1 */
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/* Set the Power Control Polarity Low and Power Sense
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Polarity Low to active low. */
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UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
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~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE);
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return 0;
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}
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static struct pxaohci_platform_data lpd270_ohci_platform_data = {
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.port_mode = PMM_PERPORT_MODE,
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.init = lpd270_ohci_init,
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};
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static void __init lpd270_init(void)
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{
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lpd270_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4;
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lpd270_flash_data[1].width = 4;
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/*
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* System bus arbiter setting:
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* - Core_Park
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* - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
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*/
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ARB_CNTRL = ARB_CORE_PARK | 0x234;
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/*
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* On LogicPD PXA270, we route AC97_SYSCLK via GPIO45.
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*/
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pxa_gpio_mode(GPIO45_SYSCLK_AC97_MD);
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platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
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// set_pxa_fb_info(&sharp_lq057q3dc02);
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set_pxa_fb_info(&sharp_lq64d343);
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// set_pxa_fb_info(&sharp_lq035q7db02_20);
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pxa_set_ohci_info(&lpd270_ohci_platform_data);
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}
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static struct map_desc lpd270_io_desc[] __initdata = {
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{
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.virtual = LPD270_CPLD_VIRT,
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.pfn = __phys_to_pfn(LPD270_CPLD_PHYS),
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.length = LPD270_CPLD_SIZE,
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.type = MT_DEVICE,
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},
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};
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static void __init lpd270_map_io(void)
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{
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pxa_map_io();
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iotable_init(lpd270_io_desc, ARRAY_SIZE(lpd270_io_desc));
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/* initialize sleep mode regs (wake-up sources, etc) */
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PGSR0 = 0x00008800;
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PGSR1 = 0x00000002;
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PGSR2 = 0x0001FC00;
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PGSR3 = 0x00001F81;
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PWER = 0xC0000002;
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PRER = 0x00000002;
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PFER = 0x00000002;
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/* for use I SRAM as framebuffer. */
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PSLR |= 0x00000F04;
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PCFR = 0x00000066;
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}
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MACHINE_START(LOGICPD_PXA270, "LogicPD PXA270 Card Engine")
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/* Maintainer: Peter Barada */
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.phys_io = 0x40000000,
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.io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
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.boot_params = 0xa0000100,
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.map_io = lpd270_map_io,
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.init_irq = lpd270_init_irq,
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.timer = &pxa_timer,
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.init_machine = lpd270_init,
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MACHINE_END
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@ -176,6 +176,7 @@
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#elif defined(CONFIG_SHARP_LOCOMO)
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#define NR_IRQS (IRQ_LOCOMO_SPI_TEND + 1)
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#elif defined(CONFIG_ARCH_LUBBOCK) || \
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defined(CONFIG_MACH_LOGICPD_PXA270) || \
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defined(CONFIG_MACH_MAINSTONE)
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#define NR_IRQS (IRQ_BOARD_END)
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#else
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@ -196,6 +197,11 @@
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#define LUBBOCK_USB_DISC_IRQ LUBBOCK_IRQ(6) /* usb disconnect */
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#define LUBBOCK_LAST_IRQ LUBBOCK_IRQ(6)
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#define LPD270_IRQ(x) (IRQ_BOARD_START + (x))
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#define LPD270_USBC_IRQ LPD270_IRQ(2)
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#define LPD270_ETHERNET_IRQ LPD270_IRQ(3)
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#define LPD270_AC97_IRQ LPD270_IRQ(4)
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#define MAINSTONE_IRQ(x) (IRQ_BOARD_START + (x))
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#define MAINSTONE_MMC_IRQ MAINSTONE_IRQ(0)
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#define MAINSTONE_USIM_IRQ MAINSTONE_IRQ(1)
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38
include/asm-arm/arch-pxa/lpd270.h
Normal file
38
include/asm-arm/arch-pxa/lpd270.h
Normal file
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@ -0,0 +1,38 @@
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/*
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* include/asm-arm/arch-pxa/lpd270.h
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*
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* Author: Lennert Buytenhek
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* Created: Feb 10, 2006
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*
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* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
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*/
|
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|
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#ifndef __ASM_ARCH_LPD270_H
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#define __ASM_ARCH_LPD270_H
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#define LPD270_CPLD_PHYS PXA_CS2_PHYS
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#define LPD270_CPLD_VIRT 0xf0000000
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#define LPD270_CPLD_SIZE 0x00100000
|
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|
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#define LPD270_ETH_PHYS (PXA_CS2_PHYS + 0x01000000)
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|
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/* CPLD registers */
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#define LPD270_CPLD_REG(x) ((unsigned long)(LPD270_CPLD_VIRT + (x)))
|
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#define LPD270_CONTROL LPD270_CPLD_REG(0x00)
|
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#define LPD270_PERIPHERAL0 LPD270_CPLD_REG(0x04)
|
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#define LPD270_PERIPHERAL1 LPD270_CPLD_REG(0x08)
|
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#define LPD270_CPLD_REVISION LPD270_CPLD_REG(0x14)
|
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#define LPD270_EEPROM_SPI_ITF LPD270_CPLD_REG(0x20)
|
||||
#define LPD270_MODE_PINS LPD270_CPLD_REG(0x24)
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#define LPD270_EGPIO LPD270_CPLD_REG(0x30)
|
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#define LPD270_INT_MASK LPD270_CPLD_REG(0x40)
|
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#define LPD270_INT_STATUS LPD270_CPLD_REG(0x50)
|
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|
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#define LPD270_INT_AC97 (1 << 4) /* AC'97 CODEC IRQ */
|
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#define LPD270_INT_ETHERNET (1 << 3) /* Ethernet controller IRQ */
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#define LPD270_INT_USBC (1 << 2) /* USB client cable detection IRQ */
|
||||
|
||||
|
||||
#endif
|
||||
Loading…
Reference in a new issue