sky2: support for Yukon Supreme
Add support from sk98lin vendor driver 10.50.1.3 for 88E8055 and 88E8075 chips. I don't have this hardware to test, so this changes are untested. Signed-off-by: Stephen Hemminger <shemminger@linux-foundation.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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804d8541d2
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2 changed files with 46 additions and 21 deletions
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@ -134,6 +134,8 @@ static const struct pci_device_id sky2_id_table[] = {
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{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436A) }, /* 88E8058 */
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{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436B) }, /* 88E8071 */
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{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436C) }, /* 88E8072 */
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{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436D) }, /* 88E8055 */
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{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4370) }, /* 88E8075 */
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{ 0 }
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};
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@ -547,6 +549,7 @@ static void sky2_phy_init(struct sky2_hw *hw, unsigned port)
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case CHIP_ID_YUKON_EC_U:
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case CHIP_ID_YUKON_EX:
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case CHIP_ID_YUKON_SUPR:
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pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
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/* select page 3 to access LED control register */
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@ -713,23 +716,33 @@ static void sky2_set_tx_stfwd(struct sky2_hw *hw, unsigned port)
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{
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struct net_device *dev = hw->dev[port];
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if (dev->mtu <= ETH_DATA_LEN)
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sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T),
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TX_JUMBO_DIS | TX_STFW_ENA);
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if ( (hw->chip_id == CHIP_ID_YUKON_EX &&
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hw->chip_rev != CHIP_REV_YU_EX_A0) ||
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hw->chip_id == CHIP_ID_YUKON_FE_P ||
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hw->chip_id == CHIP_ID_YUKON_SUPR) {
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/* Yukon-Extreme B0 and further Extreme devices */
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/* enable Store & Forward mode for TX */
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else if (hw->chip_id != CHIP_ID_YUKON_EC_U)
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sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T),
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TX_STFW_ENA | TX_JUMBO_ENA);
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else {
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/* set Tx GMAC FIFO Almost Empty Threshold */
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sky2_write32(hw, SK_REG(port, TX_GMF_AE_THR),
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(ECU_JUMBO_WM << 16) | ECU_AE_THR);
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if (dev->mtu <= ETH_DATA_LEN)
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sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T),
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TX_JUMBO_DIS | TX_STFW_ENA);
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sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T),
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TX_JUMBO_ENA | TX_STFW_DIS);
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else
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sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T),
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TX_JUMBO_ENA| TX_STFW_ENA);
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} else {
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if (dev->mtu <= ETH_DATA_LEN)
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sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_STFW_ENA);
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else {
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/* set Tx GMAC FIFO Almost Empty Threshold */
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sky2_write32(hw, SK_REG(port, TX_GMF_AE_THR),
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(ECU_JUMBO_WM << 16) | ECU_AE_THR);
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/* Can't do offload because of lack of store/forward */
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dev->features &= ~(NETIF_F_TSO | NETIF_F_SG | NETIF_F_ALL_CSUM);
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sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_STFW_DIS);
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/* Can't do offload because of lack of store/forward */
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dev->features &= ~(NETIF_F_TSO | NETIF_F_SG | NETIF_F_ALL_CSUM);
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}
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}
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}
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@ -2660,6 +2673,7 @@ static u32 sky2_mhz(const struct sky2_hw *hw)
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case CHIP_ID_YUKON_EC:
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case CHIP_ID_YUKON_EC_U:
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case CHIP_ID_YUKON_EX:
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case CHIP_ID_YUKON_SUPR:
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return 125;
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case CHIP_ID_YUKON_FE:
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@ -2743,6 +2757,15 @@ static int __devinit sky2_init(struct sky2_hw *hw)
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| SKY2_HW_AUTO_TX_SUM
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| SKY2_HW_ADV_POWER_CTL;
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break;
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case CHIP_ID_YUKON_SUPR:
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hw->flags = SKY2_HW_GIGABIT
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| SKY2_HW_NEWER_PHY
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| SKY2_HW_NEW_LE
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| SKY2_HW_AUTO_TX_SUM
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| SKY2_HW_ADV_POWER_CTL;
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break;
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default:
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dev_err(&hw->pdev->dev, "unsupported chip type 0x%x\n",
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hw->chip_id);
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@ -2813,7 +2836,8 @@ static void sky2_reset(struct sky2_hw *hw)
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sky2_write8(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_SET);
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sky2_write8(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_CLR);
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if (hw->chip_id == CHIP_ID_YUKON_EX)
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if (hw->chip_id == CHIP_ID_YUKON_EX ||
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hw->chip_id == CHIP_ID_YUKON_SUPR)
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sky2_write16(hw, SK_REG(i, GMAC_CTRL),
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GMC_BYP_MACSECRX_ON | GMC_BYP_MACSECTX_ON
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| GMC_BYP_RETR_ON);
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@ -425,12 +425,13 @@ enum {
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/* B2_CHIP_ID 8 bit Chip Identification Number */
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enum {
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CHIP_ID_YUKON_XL = 0xb3, /* Chip ID for YUKON-2 XL */
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CHIP_ID_YUKON_EC_U = 0xb4, /* Chip ID for YUKON-2 EC Ultra */
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CHIP_ID_YUKON_EX = 0xb5, /* Chip ID for YUKON-2 Extreme */
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CHIP_ID_YUKON_EC = 0xb6, /* Chip ID for YUKON-2 EC */
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CHIP_ID_YUKON_FE = 0xb7, /* Chip ID for YUKON-2 FE */
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CHIP_ID_YUKON_FE_P = 0xb8, /* Chip ID for YUKON-2 FE+ */
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CHIP_ID_YUKON_XL = 0xb3, /* YUKON-2 XL */
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CHIP_ID_YUKON_EC_U = 0xb4, /* YUKON-2 EC Ultra */
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CHIP_ID_YUKON_EX = 0xb5, /* YUKON-2 Extreme */
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CHIP_ID_YUKON_EC = 0xb6, /* YUKON-2 EC */
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CHIP_ID_YUKON_FE = 0xb7, /* YUKON-2 FE */
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CHIP_ID_YUKON_FE_P = 0xb8, /* YUKON-2 FE+ */
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CHIP_ID_YUKON_SUPR = 0xb9, /* YUKON-2 Supreme */
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};
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enum yukon_ec_rev {
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CHIP_REV_YU_EC_A1 = 0, /* Chip Rev. for Yukon-EC A1/A0 */
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