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x86: remove the write-only timer_uses_ioapic_pin_0

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This patch removes the write-only timer_uses_ioapic_pin_0
(gsi can't be <= 15 in the line of it's fake usage in mpparse_32.c).

Spotted by the GNU C compiler.

Signed-off-by: Adrian Bunk <bunk@kernel.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Adrian Bunk 2008-03-17 22:29:32 +02:00 committed by Ingo Molnar
parent 6542fe80e6
commit ede1389f8a
3 changed files with 1 additions and 8 deletions
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5
arch/x86/kernel/io_apic_32.c
View file

@ -2114,8 +2114,6 @@ static inline void unlock_ExtINT_logic(void)
ioapic_write_entry(apic, pin, entry0);
}
int timer_uses_ioapic_pin_0;
/*
* This code may look a bit paranoid, but it's supposed to cooperate with
* a wide range of boards and BIOS bugs. Fortunately only the timer IRQ
@ -2155,9 +2153,6 @@ static inline void __init check_timer(void)
pin2 = ioapic_i8259.pin;
apic2 = ioapic_i8259.apic;
if (pin1 == 0)
timer_uses_ioapic_pin_0 = 1;
printk(KERN_INFO "..TIMER: vector=0x%02X apic1=%d pin1=%d apic2=%d pin2=%d\n",
vector, apic1, pin1, apic2, pin2);

3
arch/x86/kernel/mpparse_32.c
View file

@ -1176,8 +1176,7 @@ int mp_register_gsi(u32 gsi, int triggering, int polarity)
* So test for this condition, and if necessary, avoid
* the pin collision.
*/
if (gsi > 15 || (gsi == 0 && !timer_uses_ioapic_pin_0))
gsi = pci_irq++;
gsi = pci_irq++;
/*
* Don't assign IRQ used by ACPI SCI
*/

1
include/asm-x86/io_apic.h
View file

@ -146,7 +146,6 @@ extern int io_apic_get_version(int ioapic);
extern int io_apic_get_redir_entries(int ioapic);
extern int io_apic_set_pci_routing(int ioapic, int pin, int irq,
int edge_level, int active_high_low);
extern int timer_uses_ioapic_pin_0;
#endif /* CONFIG_ACPI */
extern int (*ioapic_renumber_irq)(int ioapic, int irq);