iommu/amd: Fix deadlock in ppr-handling error path
In the error path of the ppr_notifer it can happen that the iommu->lock is taken recursivly. This patch fixes the problem by releasing the iommu->lock before any notifier is invoked. This also requires to move the erratum workaround for the ppr-log (interrupt may be faster than data in the log) one function up. Cc: stable@vger.kernel.org # v3.3, v3.4 Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
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c1bf94ec1e
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eee53537c4
1 changed files with 44 additions and 27 deletions
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@ -547,26 +547,12 @@ static void iommu_poll_events(struct amd_iommu *iommu)
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spin_unlock_irqrestore(&iommu->lock, flags);
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}
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static void iommu_handle_ppr_entry(struct amd_iommu *iommu, u32 head)
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static void iommu_handle_ppr_entry(struct amd_iommu *iommu, u64 *raw)
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{
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struct amd_iommu_fault fault;
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volatile u64 *raw;
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int i;
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INC_STATS_COUNTER(pri_requests);
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raw = (u64 *)(iommu->ppr_log + head);
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/*
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* Hardware bug: Interrupt may arrive before the entry is written to
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* memory. If this happens we need to wait for the entry to arrive.
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*/
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for (i = 0; i < LOOP_TIMEOUT; ++i) {
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if (PPR_REQ_TYPE(raw[0]) != 0)
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break;
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udelay(1);
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}
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if (PPR_REQ_TYPE(raw[0]) != PPR_REQ_FAULT) {
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pr_err_ratelimited("AMD-Vi: Unknown PPR request received\n");
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return;
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@ -578,12 +564,6 @@ static void iommu_handle_ppr_entry(struct amd_iommu *iommu, u32 head)
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fault.tag = PPR_TAG(raw[0]);
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fault.flags = PPR_FLAGS(raw[0]);
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/*
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* To detect the hardware bug we need to clear the entry
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* to back to zero.
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*/
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raw[0] = raw[1] = 0;
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atomic_notifier_call_chain(&ppr_notifier, 0, &fault);
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}
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@ -595,25 +575,62 @@ static void iommu_poll_ppr_log(struct amd_iommu *iommu)
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if (iommu->ppr_log == NULL)
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return;
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/* enable ppr interrupts again */
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writel(MMIO_STATUS_PPR_INT_MASK, iommu->mmio_base + MMIO_STATUS_OFFSET);
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spin_lock_irqsave(&iommu->lock, flags);
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head = readl(iommu->mmio_base + MMIO_PPR_HEAD_OFFSET);
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tail = readl(iommu->mmio_base + MMIO_PPR_TAIL_OFFSET);
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while (head != tail) {
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volatile u64 *raw;
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u64 entry[2];
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int i;
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/* Handle PPR entry */
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iommu_handle_ppr_entry(iommu, head);
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raw = (u64 *)(iommu->ppr_log + head);
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/* Update and refresh ring-buffer state*/
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/*
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* Hardware bug: Interrupt may arrive before the entry is
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* written to memory. If this happens we need to wait for the
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* entry to arrive.
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*/
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for (i = 0; i < LOOP_TIMEOUT; ++i) {
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if (PPR_REQ_TYPE(raw[0]) != 0)
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break;
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udelay(1);
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}
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/* Avoid memcpy function-call overhead */
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entry[0] = raw[0];
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entry[1] = raw[1];
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/*
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* To detect the hardware bug we need to clear the entry
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* back to zero.
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*/
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raw[0] = raw[1] = 0UL;
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/* Update head pointer of hardware ring-buffer */
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head = (head + PPR_ENTRY_SIZE) % PPR_LOG_SIZE;
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writel(head, iommu->mmio_base + MMIO_PPR_HEAD_OFFSET);
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/*
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* Release iommu->lock because ppr-handling might need to
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* re-aquire it
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*/
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spin_unlock_irqrestore(&iommu->lock, flags);
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/* Handle PPR entry */
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iommu_handle_ppr_entry(iommu, entry);
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spin_lock_irqsave(&iommu->lock, flags);
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/* Refresh ring-buffer information */
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head = readl(iommu->mmio_base + MMIO_PPR_HEAD_OFFSET);
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tail = readl(iommu->mmio_base + MMIO_PPR_TAIL_OFFSET);
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}
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/* enable ppr interrupts again */
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writel(MMIO_STATUS_PPR_INT_MASK, iommu->mmio_base + MMIO_STATUS_OFFSET);
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spin_unlock_irqrestore(&iommu->lock, flags);
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}
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