reset: zx2967: use the reset-simple driver
The reset-simple driver can be used without changes. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Alexandru Gagniuc <alex.g@adaptrum.com>
This commit is contained in:
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0af8a13736
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5 changed files with 4 additions and 109 deletions
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@ -2124,7 +2124,6 @@ F: drivers/gpio/gpio-zx.c
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F: drivers/i2c/busses/i2c-zx2967.c
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F: drivers/i2c/busses/i2c-zx2967.c
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F: drivers/mmc/host/dw_mmc-zx.*
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F: drivers/mmc/host/dw_mmc-zx.*
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F: drivers/pinctrl/zte/
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F: drivers/pinctrl/zte/
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F: drivers/reset/reset-zx2967.c
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F: drivers/soc/zte/
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F: drivers/soc/zte/
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F: drivers/thermal/zx2967_thermal.c
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F: drivers/thermal/zx2967_thermal.c
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F: drivers/watchdog/zx2967_wdt.c
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F: drivers/watchdog/zx2967_wdt.c
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@ -77,14 +77,14 @@ config RESET_PISTACHIO
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config RESET_SIMPLE
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config RESET_SIMPLE
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bool "Simple Reset Controller Driver" if COMPILE_TEST
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bool "Simple Reset Controller Driver" if COMPILE_TEST
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default ARCH_SOCFPGA || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI
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default ARCH_SOCFPGA || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX
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help
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help
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This enables a simple reset controller driver for reset lines that
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This enables a simple reset controller driver for reset lines that
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that can be asserted and deasserted by toggling bits in a contiguous,
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that can be asserted and deasserted by toggling bits in a contiguous,
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exclusive register space.
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exclusive register space.
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Currently this driver supports Altera SoCFPGAs, the RCC reset
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Currently this driver supports Altera SoCFPGAs, the RCC reset
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controller in STM32 MCUs, and Allwinner SoCs.
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controller in STM32 MCUs, Allwinner SoCs, and ZTE's zx2967 family.
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config RESET_SUNXI
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config RESET_SUNXI
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bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI
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bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI
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@ -121,12 +121,6 @@ config RESET_UNIPHIER
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Say Y if you want to control reset signals provided by System Control
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Say Y if you want to control reset signals provided by System Control
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block, Media I/O block, Peripheral Block.
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block, Media I/O block, Peripheral Block.
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config RESET_ZX2967
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bool "ZTE ZX2967 Reset Driver"
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depends on ARCH_ZX || COMPILE_TEST
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help
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This enables the reset controller driver for ZTE's zx2967 family.
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config RESET_ZYNQ
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config RESET_ZYNQ
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bool "ZYNQ Reset Driver" if COMPILE_TEST
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bool "ZYNQ Reset Driver" if COMPILE_TEST
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default ARCH_ZYNQ
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default ARCH_ZYNQ
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@ -17,6 +17,5 @@ obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o
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obj-$(CONFIG_RESET_TI_SCI) += reset-ti-sci.o
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obj-$(CONFIG_RESET_TI_SCI) += reset-ti-sci.o
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obj-$(CONFIG_RESET_TI_SYSCON) += reset-ti-syscon.o
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obj-$(CONFIG_RESET_TI_SYSCON) += reset-ti-syscon.o
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obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o
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obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o
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obj-$(CONFIG_RESET_ZX2967) += reset-zx2967.o
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obj-$(CONFIG_RESET_ZYNQ) += reset-zynq.o
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obj-$(CONFIG_RESET_ZYNQ) += reset-zynq.o
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@ -123,6 +123,8 @@ static const struct of_device_id reset_simple_dt_ids[] = {
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{ .compatible = "st,stm32-rcc", },
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{ .compatible = "st,stm32-rcc", },
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{ .compatible = "allwinner,sun6i-a31-clock-reset",
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{ .compatible = "allwinner,sun6i-a31-clock-reset",
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.data = &reset_simple_active_low },
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.data = &reset_simple_active_low },
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{ .compatible = "zte,zx296718-reset",
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.data = &reset_simple_active_low },
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{ /* sentinel */ },
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{ /* sentinel */ },
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};
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};
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@ -1,99 +0,0 @@
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/*
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* ZTE's zx2967 family reset controller driver
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*
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* Copyright (C) 2017 ZTE Ltd.
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*
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* Author: Baoyou Xie <baoyou.xie@linaro.org>
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*
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* License terms: GNU General Public License (GPL) version 2
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*/
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#include <linux/of_address.h>
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#include <linux/platform_device.h>
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#include <linux/reset-controller.h>
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struct zx2967_reset {
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void __iomem *reg_base;
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spinlock_t lock;
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struct reset_controller_dev rcdev;
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};
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static int zx2967_reset_act(struct reset_controller_dev *rcdev,
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unsigned long id, bool assert)
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{
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struct zx2967_reset *reset = NULL;
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int bank = id / 32;
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int offset = id % 32;
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u32 reg;
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unsigned long flags;
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reset = container_of(rcdev, struct zx2967_reset, rcdev);
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spin_lock_irqsave(&reset->lock, flags);
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reg = readl_relaxed(reset->reg_base + (bank * 4));
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if (assert)
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reg &= ~BIT(offset);
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else
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reg |= BIT(offset);
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writel_relaxed(reg, reset->reg_base + (bank * 4));
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spin_unlock_irqrestore(&reset->lock, flags);
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return 0;
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}
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static int zx2967_reset_assert(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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return zx2967_reset_act(rcdev, id, true);
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}
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static int zx2967_reset_deassert(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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return zx2967_reset_act(rcdev, id, false);
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}
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static const struct reset_control_ops zx2967_reset_ops = {
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.assert = zx2967_reset_assert,
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.deassert = zx2967_reset_deassert,
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};
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static int zx2967_reset_probe(struct platform_device *pdev)
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{
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struct zx2967_reset *reset;
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struct resource *res;
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reset = devm_kzalloc(&pdev->dev, sizeof(*reset), GFP_KERNEL);
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if (!reset)
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return -ENOMEM;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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reset->reg_base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(reset->reg_base))
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return PTR_ERR(reset->reg_base);
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spin_lock_init(&reset->lock);
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reset->rcdev.owner = THIS_MODULE;
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reset->rcdev.nr_resets = resource_size(res) * 8;
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reset->rcdev.ops = &zx2967_reset_ops;
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reset->rcdev.of_node = pdev->dev.of_node;
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return devm_reset_controller_register(&pdev->dev, &reset->rcdev);
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}
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static const struct of_device_id zx2967_reset_dt_ids[] = {
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{ .compatible = "zte,zx296718-reset", },
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{},
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};
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static struct platform_driver zx2967_reset_driver = {
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.probe = zx2967_reset_probe,
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.driver = {
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.name = "zx2967-reset",
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.of_match_table = zx2967_reset_dt_ids,
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},
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};
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builtin_platform_driver(zx2967_reset_driver);
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