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Merge branch 'fixes-s3c-2632-rc5' of git://git.fluff.org/bjdooks/linux

Browse source 
* 'fixes-s3c-2632-rc5' of git://git.fluff.org/bjdooks/linux:
  ARM: S3C2410: Fix sparse warnings in arch/arm/mach-s3c2410/gpio.c
  ARM: S3C2440: mini2440: Fix spare warnings
  ARM: S3C24XX: Fix warnings in arch/arm/plat-s3c24xx/gpio.c
  ARM: S3C2440: mini2440: Fix missing CONFIG_S3C_DEV_USB_HOST
  ARM: S3C24XX: arch/arm/plat-s3c24xx: Move dereference after NULL test
  ARM: S3C: Fix adc function exports
  ARM: S3C2410: Fix link if CONFIG_S3C2410_IOTIMING is not set
  ARM: S3C24XX: Introduce S3C2442B CPU
  ARM: S3C24XX: Define a macro to avoid compilation error
  ARM: S3C: Add info for supporting circular DMA buffers
  ARM: S3C64XX: Set rate of crystal mux
  ARM: S3C64XX: Fix S3C64XX_CLKDIV0_ARM_MASK value
This commit is contained in:
Linus Torvalds 2009-11-03 07:46:05 -08:00
commit fcef24d38e
14 changed files with 59 additions and 12 deletions
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1
arch/arm/mach-s3c2410/gpio.c
View file

@ -28,6 +28,7 @@
#include <linux/io.h>
#include <mach/hardware.h>
#include <mach/gpio-fns.h>
#include <asm/irq.h>
#include <mach/regs-gpio.h>

7
arch/arm/mach-s3c2410/include/mach/dma.h
View file

@ -110,6 +110,8 @@ enum s3c2410_dma_loadst {
* waiting for reloads */
#define S3C2410_DMAF_AUTOSTART (1<<1) /* auto-start if buffer queued */
#define S3C2410_DMAF_CIRCULAR (1 << 2) /* no circular dma support */
/* dma buffer */
struct s3c2410_dma_buf;
@ -194,4 +196,9 @@ struct s3c2410_dma_chan {
typedef unsigned long dma_device_t;
static inline bool s3c_dma_has_circular(void)
{
return false;
}
#endif /* __ASM_ARCH_DMA_H */

1
arch/arm/mach-s3c2440/Kconfig
View file

@ -103,6 +103,7 @@ config MACH_MINI2440
select LEDS_TRIGGER_BACKLIGHT
select SND_S3C24XX_SOC_S3C24XX_UDA134X
select S3C_DEV_NAND
select S3C_DEV_USB_HOST
help
Say Y here to select support for the MINI2440. Is a 10cm x 10cm board
available via various sources. It can come with a 3.5" or 7" touch LCD.

4
arch/arm/mach-s3c2440/mach-mini2440.c
View file

@ -144,7 +144,7 @@ static struct s3c2410_udc_mach_info mini2440_udc_cfg __initdata = {
.type = (S3C2410_LCDCON1_TFT16BPP |\
S3C2410_LCDCON1_TFT)
struct s3c2410fb_display mini2440_lcd_cfg[] __initdata = {
static struct s3c2410fb_display mini2440_lcd_cfg[] __initdata = {
[0] = { /* mini2440 + 3.5" TFT + touchscreen */
_LCD_DECLARE(
7, /* The 3.5 is quite fast */
@ -191,7 +191,7 @@ struct s3c2410fb_display mini2440_lcd_cfg[] __initdata = {
#define S3C2410_GPCCON_MASK(x) (3 << ((x) * 2))
#define S3C2410_GPDCON_MASK(x) (3 << ((x) * 2))
struct s3c2410fb_mach_info mini2440_fb_info __initdata = {
static struct s3c2410fb_mach_info mini2440_fb_info __initdata = {
.displays = &mini2440_lcd_cfg[0], /* not constant! see init */
.num_displays = 1,
.default_display = 0,

5
arch/arm/mach-s3c6400/include/mach/dma.h
View file

@ -68,6 +68,11 @@ static __inline__ int s3c_dma_has_circular(void)
#define S3C2410_DMAF_CIRCULAR (1 << 0)
static inline bool s3c_dma_has_circular(void)
{
return false;
}
#include <plat/dma.h>
#endif /* __ASM_ARCH_IRQ_H */

2
arch/arm/plat-s3c24xx/adc.c
View file

@ -189,7 +189,7 @@ int s3c_adc_read(struct s3c_adc_client *client, unsigned int ch)
err:
return ret;
}
EXPORT_SYMBOL_GPL(s3c_adc_convert);
EXPORT_SYMBOL_GPL(s3c_adc_read);
static void s3c_adc_default_select(struct s3c_adc_client *client,
unsigned select)

10
arch/arm/plat-s3c24xx/cpu.c
View file

@ -61,6 +61,7 @@ static const char name_s3c2410[] = "S3C2410";
static const char name_s3c2412[] = "S3C2412";
static const char name_s3c2440[] = "S3C2440";
static const char name_s3c2442[] = "S3C2442";
static const char name_s3c2442b[] = "S3C2442B";
static const char name_s3c2443[] = "S3C2443";
static const char name_s3c2410a[] = "S3C2410A";
static const char name_s3c2440a[] = "S3C2440A";
@ -111,6 +112,15 @@ static struct cpu_table cpu_ids[] __initdata = {
.init = s3c2442_init,
.name = name_s3c2442
},
{
.idcode = 0x32440aab,
.idmask = 0xffffffff,
.map_io = s3c244x_map_io,
.init_clocks = s3c244x_init_clocks,
.init_uarts = s3c244x_init_uarts,
.init = s3c2442_init,
.name = name_s3c2442b
},
{
.idcode = 0x32412001,
.idmask = 0xffffffff,

6
arch/arm/plat-s3c24xx/dma.c
View file

@ -208,14 +208,14 @@ s3c2410_dma_loadbuffer(struct s3c2410_dma_chan *chan,
{
unsigned long reload;
pr_debug("s3c2410_chan_loadbuffer: loading buff %p (0x%08lx,0x%06x)\n",
buf, (unsigned long)buf->data, buf->size);
if (buf == NULL) {
dmawarn("buffer is NULL\n");
return -EINVAL;
}
pr_debug("s3c2410_chan_loadbuffer: loading buff %p (0x%08lx,0x%06x)\n",
buf, (unsigned long)buf->data, buf->size);
/* check the state of the channel before we do anything */
if (chan->load_state == S3C2410_DMALOAD_1LOADED) {

1
arch/arm/plat-s3c24xx/gpio.c
View file

@ -29,6 +29,7 @@
#include <linux/io.h>
#include <mach/hardware.h>
#include <mach/gpio-fns.h>
#include <asm/irq.h>
#include <mach/regs-gpio.h>

9
arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h
View file

@ -222,7 +222,9 @@ extern struct clk *s3c_cpufreq_clk_get(struct device *, const char *);
/* S3C2410 and compatible exported functions */
extern void s3c2410_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg);
extern void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg);
#ifdef CONFIG_S3C2410_IOTIMING
extern int s3c2410_iotiming_calc(struct s3c_cpufreq_config *cfg,
struct s3c_iotimings *iot);
@ -231,8 +233,11 @@ extern int s3c2410_iotiming_get(struct s3c_cpufreq_config *cfg,
extern void s3c2410_iotiming_set(struct s3c_cpufreq_config *cfg,
struct s3c_iotimings *iot);
extern void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg);
#else
#define s3c2410_iotiming_calc NULL
#define s3c2410_iotiming_get NULL
#define s3c2410_iotiming_set NULL
#endif /* CONFIG_S3C2410_IOTIMING */
/* S3C2412 compatible routines */

1
arch/arm/plat-s3c24xx/include/plat/s3c2410.h
View file

@ -27,6 +27,7 @@ extern void s3c2410_init_clocks(int xtal);
#define s3c2410_init_uarts NULL
#define s3c2410_map_io NULL
#define s3c2410_init NULL
#define s3c2410a_init NULL
#endif
extern int s3c2410_baseclk_add(void);

4
arch/arm/plat-s3c64xx/include/plat/regs-clock.h
View file

@ -51,8 +51,8 @@
#define S3C6400_CLKDIV0_HCLK_SHIFT (8)
#define S3C6400_CLKDIV0_MPLL_MASK (0x1 << 4)
#define S3C6400_CLKDIV0_MPLL_SHIFT (4)
#define S3C6400_CLKDIV0_ARM_MASK (0x3 << 0)
#define S3C6410_CLKDIV0_ARM_MASK (0x7 << 0)
#define S3C6400_CLKDIV0_ARM_MASK (0x7 << 0)
#define S3C6410_CLKDIV0_ARM_MASK (0xf << 0)
#define S3C6400_CLKDIV0_ARM_SHIFT (0)
/* CLKDIV1 */

3
arch/arm/plat-s3c64xx/s3c6400-clock.c
View file

@ -677,6 +677,9 @@ void __init_or_cpufreq s3c6400_setup_clocks(void)
printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal);
/* For now assume the mux always selects the crystal */
clk_ext_xtal_mux.parent = xtal_clk;
epll = s3c6400_get_epll(xtal);
mpll = s3c6400_get_pll(xtal, __raw_readl(S3C_MPLL_CON));
apll = s3c6400_get_pll(xtal, __raw_readl(S3C_APLL_CON));

17
sound/soc/s3c24xx/s3c24xx-pcm.c
View file

@ -75,11 +75,19 @@ static void s3c24xx_pcm_enqueue(struct snd_pcm_substream *substream)
{
struct s3c24xx_runtime_data *prtd = substream->runtime->private_data;
dma_addr_t pos = prtd->dma_pos;
unsigned int limit;
int ret;
pr_debug("Entered %s\n", __func__);
while (prtd->dma_loaded < prtd->dma_limit) {
if (s3c_dma_has_circular()) {
limit = (prtd->dma_end - prtd->dma_start) / prtd->dma_period;
} else
limit = prtd->dma_limit;
pr_debug("%s: loaded %d, limit %d\n", __func__, prtd->dma_loaded, limit);
while (prtd->dma_loaded < limit) {
unsigned long len = prtd->dma_period;
pr_debug("dma_loaded: %d\n", prtd->dma_loaded);
@ -123,7 +131,7 @@ static void s3c24xx_audio_buffdone(struct s3c2410_dma_chan *channel,
snd_pcm_period_elapsed(substream);
spin_lock(&prtd->lock);
if (prtd->state & ST_RUNNING) {
if (prtd->state & ST_RUNNING && !s3c_dma_has_circular()) {
prtd->dma_loaded--;
s3c24xx_pcm_enqueue(substream);
}
@ -164,6 +172,11 @@ static int s3c24xx_pcm_hw_params(struct snd_pcm_substream *substream,
printk(KERN_ERR "failed to get dma channel\n");
return ret;
}
/* use the circular buffering if we have it available. */
if (s3c_dma_has_circular())
s3c2410_dma_setflags(prtd->params->channel,
S3C2410_DMAF_CIRCULAR);
}
s3c2410_dma_set_buffdone_fn(prtd->params->channel,